STD10PF06 P-CHANNEL 60V - 0.18 Ω - 10A IPAK/DPAK STripFET II POWER MOSFET ■ ■ ■ ■ ■ ■ ■ TYPE VDSS RDS(on) ID STD10PF06 60 V < 0.20 Ω 10 A TYPICAL RDS(on) = 0.18 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE APPLICATION ORIENTED CHARACTERIZATION THROUGH-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX “-1”) SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4”) 3 3 1 2 1 IPAK TO-251 (Suffix “-1”) DPAK TO-252 (Suffix “T4”) INTERNAL SCHEMATIC DIAGRAM DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique ”Single Feature Size ” stripbased process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS ■ MOTOR CONTROL ■ DC-DC & DC-AC CONVERTERS ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR VGS ID ID IDM(•) Ptot Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Tstg Tj V V Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C 10 A 7 A Drain Current (pulsed) 40 A Total Dissipation at TC = 25°C Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Note: P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed March 2002 V 60 (•) Pulse width limited by safe operating area. . Unit 60 ± 20 Gate- source Voltage Derating Factor dv/dt (1) Value 40 W 0.27 W/°C 6 V/ns -65 to 175 °C 175 °C (1) ISD ≤10A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/9 STD10PF06 THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max 3.75 100 275 °C/W °C/W °C Max Value Unit AVALANCHE CHARACTERISTICS Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 10 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 25 V) 125 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (V GS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C 1 10 µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V ±1 µA Max. Unit 4 V 0.18 0.20 Ω Min. Typ. Max. Unit 2 5 S 850 230 75 pF pF pF V(BR)DSS 60 V ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS I D = 250 µA R DS(on) Static Drain-source On Resistance VGS = 10 V ID = 5 A Min. Typ. 2 DYNAMIC Symbol 2/9 Parameter Test Conditions gfs (*) Forward Transconductance VDS = 25 V C iss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V f = 1 MHz VGS = 0 ID=5 A STD10PF06 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 30 V ID = 5 A V GS = 10 V R G = 4.7 Ω (Resistive Load, Figure 3) 20 40 Qg Qgs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD= 48 V ID= 10 A VGS= 10 V 16 4 6 21 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol Parameter Test Conditions Min. td(off) tf Turn-off Delay Time Fall Time VDD = 30 V ID = 5 A VGS = 10 V RG = 4.7Ω, (Resistive Load, Figure 3) 40 10 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp = 48 V ID = 10 A VGS = 10 V RG = 4.7Ω, (Inductive Load, Figure 5) 10 17 30 ns ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 10 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 10 A di/dt = 100A/µs T j = 150°C VDD = 30 V (see test circuit, Figure 5) trr Qrr IRRM (*)Pulsed: Pulse duration = 300 µs, duty cycle (•)Pulse width limit ed by safe operating area. Safe Operating Area Test Conditions Min. Typ. VGS = 0 100 260 5.2 Max. Unit 10 40 A A 2.5 V ns µC A 1.5 %. Thermal Impedance 3/9 STD10PF06 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STD10PF06 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage Temperature . . 5/9 STD10PF06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STD10PF06 TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A1 C2 A3 A C H B B3 = 1 = 2 G = = = E B2 = 3 B5 L D B6 L2 L1 0068771-E 7/9 STD10PF06 TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L2 0.8 L4 0.031 0.6 1 0.023 0.039 A1 C2 A H A2 C DETAIL ”A” L2 D = 1 = G 2 = = = E = B2 3 B DETAIL ”A” L4 0068772-B 8/9 STD10PF06 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in lif e support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics 2002 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://w ww.st.com 9/9