ETC 1.5SMC6.8AT3SERIES

1.5SMC6.8AT3 Series
1500 Watt Peak Power Zener
Transient Voltage Suppressors
Unidirectional*
The SMC series is designed to protect voltage sensitive
components from high voltage, high energy transients. They have
excellent clamping capability, high surge capability, low zener
impedance and fast response time. The SMC series is supplied in
ON Semiconductor’s exclusive, cost-effective, highly reliable
Surmetic package and is ideally suited for use in communication
systems, automotive, numerical controls, process controls, medical
equipment, business machines, power supplies and many other
industrial/consumer applications.
Specification Features:
•
•
•
•
•
•
•
•
•
Working Peak Reverse Voltage Range – 5.8 to 77.8 V
Standard Zener Breakdown Voltage Range – 6.8 to 91 V
Peak Power – 1500 Watts @ 1 ms
ESD Rating of Class 3 (>16 KV) per Human Body Model
Maximum Clamp Voltage @ Peak Pulse Current
Low Leakage < 5 µA Above 10 V
UL 497B for Isolated Loop Circuit Protection
Maximum Temperature Coefficient Specified
Response Time is Typically < 1 ns
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PLASTIC SURFACE MOUNT
ZENER OVERVOLTAGE
TRANSIENT SUPPRESSORS
5.8–78 VOLTS
1500 WATT PEAK POWER
Cathode
Anode
SMC
CASE 403
PLASTIC
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
FINISH: All external surfaces are corrosion resistant and leads are
MARKING DIAGRAM
readily solderable
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
YWW
xxxA
260°C for 10 Seconds
LEADS: Modified L–Bend providing more contact area to bond pads
POLARITY: Cathode indicated by molded polarity notch
MOUNTING POSITION: Any
MAXIMUM RATINGS
Symbol
Value
Unit
Peak Power Dissipation (Note 1.)
@ TL = 25°C, Pulse Width = 1 ms
Rating
PPK
1500
W
DC Power Dissipation @ TL = 75°C
Measured Zero Lead Length (Note 2.)
Derate Above 75°C
Thermal Resistance from Junction to Lead
PD
4.0
W
RJL
54.6
18.3
mW/°C
°C/W
PD
0.75
W
RJA
6.1
165
mW/°C
°C/W
–65 to
+150
°C
DC Power Dissipation (Note 3.) @ TA = 25°C
Derate Above 25°C
Thermal Resistance from Junction
to Ambient
Operating and Storage
Temperature Range
March, 2001 – Rev. 3
= Year
= Work Week
= Specific Device Code
= (See Table Next Page)
ORDERING INFORMATION
TJ, Tstg
1. 10 X 1000 s, non–repetitive
2. 1″ square copper pad, FR–4 board
3. FR–4 board, using ON Semiconductor minimum recommended footprint, as
shown in 403B case outline dimensions spec.
 Semiconductor Components Industries, LLC, 2001
Y
WW
xxxA
1
Device Package
Shipping
1.5SMCxxxAT3
SMC
2500/Tape & Reel
Devices listed in bold, italic are ON Semiconductor
Preferred devices. Preferred devices are recommended
choices for future use and best overall value.
*Bidirectional devices will not be available in this
series.
†The “T3” suffix refers to a 13 inch reel.
Publication Order Number:
1.5SMC6.8AT3/D
1.5SMC6.8AT3 Series
ELECTRICAL CHARACTERISTICS (TA = 25°C unless
I
otherwise noted, VF = 3.5 V Max. @ IF (Note 4.) = 100 A)
Symbol
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
IF
Parameter
VC VBR VRWM
Working Peak Reverse Voltage
VBR
IT
V
IR VF
IT
Maximum Reverse Leakage Current @ VRWM
Breakdown Voltage @ IT
Test Current
VBR
Maximum Temperature Coefficient of VBR
IF
Forward Current
VF
Forward Voltage @ IF
IPP
Uni–Directional TVS
ELECTRICAL CHARACTERISTICS (Devices listed in bold, italic are ON Semiconductor Preferred devices.)
Breakdown Voltage
VC @ IPP (Note 6.)
VRWM
IR @ VRWM
@ IT
VC
IPP
VBR
Volts
µA
Min
Nom
Max
mA
Volts
Amps
%/°C
VBR (Note 5.) Volts
Device
Device
Marking
1.5SMC6.8AT3
1.5SMC7.5AT3
1.5SMC8.2AT3
1.5SMC9.1AT3
6V8A
7V5A
8V2A
9V1A
5.8
6.4
7.02
7.78
1000
500
200
50
6.45
7.13
7.79
8.65
6.8
7.5
8.2
9.1
7.14
7.88
8.61
9.55
10
10
10
1
10.5
11.3
12.1
13.4
143
132
124
112
0.057
0.061
0.065
0.068
1.5SMC10AT3
1.5SMC11AT3
1.5SMC12AT3
1.5SMC13AT3
10A
11A
12A
13A
8.55
9.4
10.2
11.1
10
5
5
5
9.5
10.5
11.4
12.4
10
11
12
13
10.5
11.6
12.6
13.7
1
1
1
1
14.5
15.6
16.7
18.2
103
96
90
82
0.073
0.075
0.078
0.081
1.5SMC15AT3
1.5SMC16AT3
1.5SMC18AT3
1.5SMC20AT3
15A
16A
18A
20A
12.8
13.6
15.3
17.1
5
5
5
5
14.3
15.2
17.1
19
15
16
18
20
15.8
16.8
18.9
21
1
1
1
1
21.2
22.5
25.2
27.7
71
67
59.5
54
0.084
0.086
0.088
0.09
1.5SMC22AT3
1.5SMC24AT3
1.5SMC27AT3
1.5SMC30AT3
22A
24A
27A
30A
18.8
20.5
23.1
25.6
5
5
5
5
20.9
22.8
25.7
28.5
22
24
27
30
23.1
25.2
28.4
31.5
1
1
1
1
30.6
33.2
37.5
41.4
49
45
40
36
0.092
0.094
0.096
0.097
1.5SMC33AT3
1.5SMC36AT3
1.5SMC39AT3
1.5SMC43AT3
33A
36A
39A
43A
28.2
30.8
33.3
36.8
5
5
5
5
31.4
34.2
37.1
40.9
33
36
39
43
34.7
37.8
41
45.2
1
1
1
1
45.7
49.9
53.9
59.3
33
30
28
25.3
0.098
0.099
0.1
0.101
1.5SMC47AT3
1.5SMC51AT3
1.5SMC56AT3
1.5SMC62AT3
47A
51A
56A
62A
40.2
43.6
47.8
53
5
5
5
5
44.7
48.5
53.2
58.9
47
51
56
62
49.4
53.6
58.8
65.1
1
1
1
1
64.8
70.1
77
85
23.2
21.4
19.5
17.7
0.101
0.102
0.103
0.104
1.5SMC68AT3
1.5SMC75AT3
1.5SMC82AT3
1.5SMC91AT3
68A
75A
82A
91A
58.1
64.1
70.1
77.8
5
5
5
5
64.6
71.3
77.9
86.5
68
75
82
91
71.4
78.8
86.1
95.5
1
1
1
1
92
103
113
125
16.3
14.6
13.3
12
0.104
0.105
0.105
0.106
4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.
5. VBR measured at pulse test current IT at an ambient temperature of 25°C.
6. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data – 1500 Watt at the beginning of this group.
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2
1.5SMC6.8AT3 Series
NONREPETITIVE
PULSE WAVEFORM
SHOWN IN FIGURE 2
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE PEAK
CURRENT DECAYS TO 50%
OF IPP.
tr≤ 10 µs
100
PEAK VALUE - IPP
VALUE (%)
Ppk, PEAK POWER (kW)
100
10
HALF VALUE 50
IPP
2
tP
1
0.1 µs
1 µs
10 µs
100 µs
1 ms
0
10 ms
0
1
2
3
4
tP, PULSE WIDTH
t, TIME (ms)
Figure 1. Pulse Rating Curve
Figure 2. Pulse Waveform
1000
140
IT, TEST CURRENT (AMPS)
PEAK PULSE DERATING IN % OF
PEAK POWER OR CURRENT @ TA = 25° C
160
120
100
80
60
40
20
0
0
25
50
75
100
125
150
500
VBR(NOM)=6.8TO13V
20V
43V
24V
75V
TL=25°C
tP=10µs
200
100
120V
50
180V
20
10
5
2
1
0.3
0.5 0.7 1
2
3
5
7
10
20
30
TA, AMBIENT TEMPERATURE (°C)
∆VBR, INSTANTANEOUS INCREASE IN VBR ABOVE VBR (NOM) (VOLTS)
Figure 3. Pulse Derating Curve
Figure 4. Dynamic Impedance
UL RECOGNITION
including Strike Voltage Breakdown test, Endurance
Conditioning, Temperature test, Dielectric Voltage-Withstand
test, Discharge test and several more.
Whereas, some competitors have only passed a
flammability test for the package material, we have been
recognized for much more to be included in their Protector
category.
The entire series has Underwriters Laboratory
Recognition for the classification of protectors (QVGV2)
under the UL standard for safety 497B and File #116110.
Many competitors only have one or two devices recognized
or have recognition in a non-protective category. Some
competitors have no recognition at all. With the UL497B
recognition, our parts successfully passed several tests
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3
1.5SMC6.8AT3 Series
APPLICATION NOTES
RESPONSE TIME
minimum lead lengths and placing the suppressor device as
close as possible to the equipment or components to be
protected will minimize this overshoot.
Some input impedance represented by Zin is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitive
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 5.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 6. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is to clamp voltage spikes. The SMC series have
a very good response time, typically < 1 ns and negligible
inductance. However, external inductive effects could
produce unacceptable overshoot. Proper circuit layout,
DUTY CYCLE DERATING
The data of Figure 1 applies for non-repetitive conditions
and at a lead temperature of 25°C. If the duty cycle increases,
the peak power must be reduced as indicated by the curves
of Figure 7. Average power must be derated as the lead or
ambient temperature rises above 25°C. The average power
derating curve normally given on data sheets may be
normalized and used for this purpose.
At first glance the derating curves of Figure 7 appear to be
in error as the 10 ms pulse has a higher derating factor than
the 10 µs pulse. However, when the derating factor for a
given pulse of Figure 7 is multiplied by the peak power value
of Figure 1 for the same pulse, the results follow the
expected trend.
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4
1.5SMC6.8AT3 Series
TYPICAL PROTECTION CIRCUIT
Zin
LOAD
Vin
V
V
Vin (TRANSIENT)
VL
OVERSHOOT DUE TO
INDUCTIVE EFFECTS
Vin (TRANSIENT)
VL
VL
Vin
td
tD = TIME DELAY DUE TO CAPACITIVE EFFECT
t
t
Figure 5.
Figure 6.
1
0.7
DERATING FACTOR
0.5
0.3
0.2
PULSE WIDTH
10 ms
0.1
0.07
0.05
1 ms
0.03
100 µs
0.02
10 µs
0.01
0.1 0.2
0.5
1
2
5
10
D, DUTY CYCLE (%)
20
50 100
Figure 7. Typical Derating Factor for Duty Cycle
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1.5SMC6.8AT3 Series
OUTLINE DIMENSIONS
Transient Voltage Suppressors – Surface Mounted
1500 Watt Peak Power
SMC
CASE 403–03
ISSUE B
S
A
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. D DIMENSION SHALL BE MEASURED WITHIN
DIMENSION P.
B
INCHES
DIM MIN
MAX
A
0.260
0.280
B
0.220
0.240
C
0.075
0.095
D
0.115
0.121
H 0.0020 0.0060
J
0.006
0.012
K
0.030
0.050
P
0.020 REF
S
0.305
0.320
C
K
P
J
H
0.171
4.343
0.150
3.810
0.110
2.794
inches
mm
SMC Footprint
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MILLIMETERS
MIN
MAX
6.60
7.11
5.59
6.10
1.90
2.41
2.92
3.07
0.051
0.152
0.15
0.30
0.76
1.27
0.51 REF
7.75
8.13
1.5SMC6.8AT3 Series
Notes
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1.5SMC6.8AT3 Series
Surmetic is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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1.5SMC6.8AT3/D