ETC DDU18-8

DDU18
data 3 
delay
devices, inc.
8-TAP, ECL-INTERFACED
FIXED DELAY LINE
(SERIES DDU18)
FEATURES
•
•
•
PACKAGES
Eight equally spaced outputs
Fits in 400 mil 24-pin DIP socket
Input & outputs fully 100K-ECL interfaced & buffered
GND
1
T1
3
T2
T3
4
GND
GND
T4
T5
T6
DDU18-xx
DDU18-xxM
DIP
Military DIP
5
6
7
8
24
IN
19
18
GND
13
GND
VEE
9
T7
10
11
T8
12
FUNCTIONAL DESCRIPTION
GND
N/C
T1
T2
T3
GND
GND
T4
T5
T6
T7
T8
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
DDU18-xxC3
DDU18-xxMC3
IN
N/C
N/C
N/C
N/C
GND
VEE
N/C
N/C
N/C
N/C
T10
SMD
Mil SMD
PIN DESCRIPTIONS
The DDU18-series device is a 8-tap digitally buffered delay line. The
IN
Signal Input
signal input (IN) is reproduced at the outputs (T1-T8), shifted in time by an
T1-T8 Tap Outputs
amount determined by the device dash number (See Table). For dash
VEE
-5 Volts
numbers less than 16, the total delay of the line is measured from T1 to
GND Ground
T8. The nominal tap-to-tap delay increment is given by one-seventh of
the total delay, and the inherent delay from IN to T1 is nominally 2.0ns. For dash numbers greater than or
equal to 16, the total delay of the line is measured from IN to T8. The nominal tap-to-tap delay increment
is given by one-eighth of this number.
SERIES SPECIFICATIONS
DASH NUMBER SPECIFICATIONS
•
•
•
•
•
•
Part
Number
DDU18-4
DDU18-8
DDU18-12
DDU18-16
DDU18-20
DDU18-24
DDU18-32
DDU18-40
DDU18-48
DDU18-56
DDU18-64
DDU18-72
DDU18-80
DDU18-100
DDU18-120
DDU18-160
DDU18-200
Minimum input pulse width: 40% of total delay
Output rise time: 2ns typical
Supply voltage: -5VDC ± 5%
Power dissipation: 500mw typical (no load)
Operating temperature: 0° to 85° C
Temp. coefficient of total delay: 100 PPM/°C
2.0ns
VCC IN
1/7
T1
1/7
T2
1/7
T3
1/7
1/7
T4
T5
1/7
T6
1/7
T8 GND
T7
Functional diagram for dash numbers < 16
1/8
1/8
1/8
1/8
1/8
1/8
1/8
1/8
Total
Delay (ns)
3.5 ± 1.0 *
7.0 ± 1.0 *
10.5 ± 1.0 *
16 ± 1.0
20 ± 1.0
24 ± 1.2
32 ± 1.6
40 ± 2.0
48 ± 2.4
56 ± 2.8
64 ± 3.2
72 ± 3.6
80 ± 4.0
100 ± 5.0
120 ± 6.0
160 ± 8.0
200 ± 10.0
Delay Per
Tap (ns)
0.5 ± 0.3
1.0 ± 0.4
1.5 ± 0.4
2.0 ± 0.5
2.5 ± 1.0
3.0 ± 1.5
4.0 ± 2.0
5.0 ± 2.0
6.0 ± 2.0
7.0 ± 2.0
8.0 ± 2.0
9.0 ± 2.0
10.0 ± 2.5
12.5 ± 2.5
15.0 ± 3.0
20.0 ± 4.0
25.0 ± 5.0
* Total delay is referenced to first tap output
Input to first tap = 2.0ns ± 1ns
VCC IN
T1
T2
T3
T4
T5
T6
T7
T8 GND
Functional diagram for dash numbers >= 16
NOTE: Any dash number between 4 and 200
not shown is also available.
1997 Data Delay Devices
Doc #97041
12/12/97
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DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
DDU18
APPLICATION NOTES
Delay Devices if your application requires device
testing at a specific input condition.
HIGH FREQUENCY RESPONSE
The DDU18 tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 40% of the total delay and periods as
small as 80% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
POWER SUPPLY BYPASSING
The DDU18 relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VEE to GND,
located as close as possible to the VEE pin, is
recommended. A wide VEE trace and a clean
ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
VEE
VIN
TSTRG
TLEAD
MIN
-7.0
VEE - 0.3
-55
MAX
0.3
0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 85C)
PARAMETER
High Level Output Voltage
Low Level Output Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Doc #97041
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SYMBOL
VOH
VOL
VIH
VIL
IIH
IIL
MIN
-1.025
-1.810
-1.165
-1.810
TYP
MAX
-0.880
-1.620
-0.880
-1.475
340
0.5
UNITS
V
V
V
V
µA
µA
NOTES
VIH = MAX,50Ω to -2V
VIL = MIN, 50Ω to -2V
VIH = MAX
VIL = MIN
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672
Electronic-Library Service CopyRight 2003
http://www.datadelay.com
2
DDU18
PACKAGE DIMENSIONS
24
19 18
13
.530
MAX.
1
3
4
5
6
7
8
9 10 11 12
1.300 MAX.
.015 .300
TYP. MAX.
.130
±.030
.018 TYP.
.012 TYP.
.100 TYP.
.400
TYP.
1.100 TYP.
DDU18-xx (Commercial DIP)
DDU18-xxM (Military DIP)
.020 TYP.
.040 TYP.
.010±.002
24 23 22 21 20 19 18 17 16 15 14 13
.882
±.005
.710 .590
±.005 MAX.
1
2
3
4
5
6
7
8
.090
9
.007
±.005
10 11 12
.100
1.100
1.280±.020
.280
MAX.
.050
±.010
DDU18-xxC4 (Commercial SMD)
DDU18-xxMC4 (Military SMD)
Doc #97041
12/12/97
Powered by ICminer.com Electronic-Library Service CopyRight 2003
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DDU18
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature: 25oC ± 3oC
Supply Voltage (Vcc): -5.0V ± 0.1V
Input Pulse:
Standard 10KH ECL
levels
Source Impedance:
50Ω Max.
Rise/Fall Time:
2.0 ns Max. (measured
between 20% and 80%)
Pulse Width:
PWIN = 1.5 x Total Delay
Period:
PERIN = 10 x Total Delay
OUTPUT:
Load:
Cload:
Threshold:
50Ω to -2V
5pf ± 10%
(VOH + VOL) / 2
(Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PULSE
GENERATOR
OUT
IN
TRIG
DEVICE UNDER
TEST (DUT)
T1
REF
T2
IN
T3
TRIG
OSCILLOSCOPE
T4
T5
T6
T7
T8
Test Setup
PERIN
PWIN
TRISE
INPUT
SIGNAL
TFALL
VIH
80%
50%
20%
80%
50%
20%
TRISE
OUTPUT
SIGNAL
VIL
TFALL
VOH
50%
50%
VOL
Timing Diagram For Testing
Doc #97041
Powered
12/12/97
by ICminer.com
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672
Electronic-Library Service CopyRight 2003
http://www.datadelay.com
4