EL5174, EL5374 ® Data Sheet October 1, 2003 FN7313.3 550MHz Differential Twisted-Pair Drivers Features The EL5174 and EL5374 are single and triple high bandwidth amplifiers with an output in differential form. They are primarily targeted for applications such as driving twisted-pair lines in component video applications. The inputs can be in either single-ended or differential form but the outputs are always in differential form. • Fully differential inputs, outputs, and feedback On the EL5174 and EL5374, two feedback inputs provide the user with the ability to set the gain of each device (stable at minimum gain of one). For a fixed gain of two, please see EL5173 and EL5373. • Single 5V or dual ±5V supplies The output common mode level for each channel is set by the associated REF pin, which have a -3dB bandwidth of over 110MHz. Generally, these pins are grounded but can be tied to any voltage reference. • Differential input range ±2.3V • 550MHz 3dB bandwidth • 1100V/µs slew rate • Low distortion at 5MHz • 60mA maximum output current • Low power - 12.5mA per channel Applications • Twisted-pair driver • Differential line driver All outputs are short circuit protected to withstand temporary overload condition. • VGA over twisted-pair The EL5174 is available in 8-pin SO packages and EL5374 is available in a 28-pin QSOP package. All specified for operation over the full -40°C to +85°C temperature range. • Single ended to differential amplification • Transmission of analog signals in a noisy environment Pinouts Ordering Information PART NUMBER • ADSL/HDSL driver PACKAGE TAPE & REEL PKG. DWG. # EL5174IS 8-Pin SO - MDP0027 EL5174IS-T7 8-Pin SO 7” MDP0027 EL5174IS-T13 8-Pin SO 13” MDP0027 EL5374IU 28-Pin QSOP - MDP0040 EL5374IU-T7 28-Pin QSOP 7” MDP0040 EL5374IU-T13 28-Pin QSOP 13” MDP0040 EL5374 (28-PIN QSOP) TOP VIEW EL5174 (8-PIN SO) TOP VIEW FBP 1 IN+ 2 REF 3 FBN 4 8 OUT+ + - NC 1 7 VS- INP1 2 6 VS+ INN1 3 5 OUT- REF1 4 + - 27 FBP1 26 FBN1 25 OUT1B NC 5 24 VSP INP2 6 23 VSN INN2 7 22 OUT2 REF2 8 NC 9 + - 21 FBP2 20 FBN2 INP3 10 19 OUT2B INN3 11 18 OUT3 REF3 12 NC 13 EN 14 1 28 OUT1 + - 17 FBP3 16 FBN3 15 OUT3B CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL5174, EL5374 Absolute Maximum Ratings (TA = 25°C) Supply Voltage (VS+ to VS-) . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications VS+ = +5V, VS- = -5V, TA = 25°C, VIN = 0V, RLD = 1kΩ, RF = 0, RG = OPEN, CLD = 2.7pF, Unless Otherwise Specified PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT AC PERFORMANCE BW -3dB Bandwidth AV = 1, CLD = 2.7pF 550 MHz AV = 2, RF = 500, CLD = 2.7pF 130 MHz AV = 10, RF = 500, CLD = 2.7pF 20 MHz 120 MHz BW ±0.1dB Bandwidth AV = 1, CLD = 2.7pF SR Slew Rate (EL5174) VOUT = 3VP-P, 20% to 80% 800 1100 V/µs Slew Rate (EL5374) VOUT = 3VP-P, 20% to 80% 600 850 V/µs TSTL Settling Time to 0.1% VOUT = 2VP-P 10 ns TOVR Output Overdrive Recovery Time 20 ns GBWP Gain Bandwidth Product 200 MHz VREFBW (-3dB) VREF -3dB Bandwidth AV =1, CLD = 2.7pF 110 MHz VREFSR+ VREF Slew Rate - Rise VOUT = 2VP-P, 20% to 80% 134 V/µs VREFSR- VREF Slew Rate - Fall VOUT = 2VP-P, 20% to 80% 70 V/µs VN Input Voltage Noise at 10kHz 21 nV/√Hz IN Input Current Noise at 10kHz 2.7 pA/√Hz HD2 Second Harmonic Distortion VOUT = 2VP-P, 5MHz -95 dBc VOUT = 2VP-P, 20MHz -94 dBc VOUT = 2VP-P, 5MHz -88 dBc VOUT = 2VP-P, 20MHz -87 dBc HD3 Third Harmonic Distortion dG Differential Gain at 3.58MHz RLD = 300Ω, AV =2 0.06 % dθ Differential Phase at 3.58MHz RLD = 300Ω, AV =2 0.13 ° eS Channel Separation - for EL5374 only at f = 1MHz 90 dB INPUT CHARACTERISTICS VOS Input Referred Offset Voltage (EL5174) ±1.4 ±25 mV (EL5374) ±2.2 ±25 mV IIN Input Bias Current (VIN+, VIN-) -20 -14 -7 µA IREF Input Bias Current (VREF) 0.5 2.3 4 µA RIN Differential Input Resistance 150 kΩ CIN Differential Input Capacitance 1 pF DMIR Differential Mode Input Range CMIR+ Common Mode Positive Input Range at VIN+, VIN- 3.4 V CMIR- Common Mode Negative Input Range at VIN+, VIN- -4.3 V 2 ±2.1 ±2.3 ±2.5 V EL5174, EL5374 Electrical Specifications VS+ = +5V, VS- = -5V, TA = 25°C, VIN = 0V, RLD = 1kΩ, RF = 0, RG = OPEN, CLD = 2.7pF, Unless Otherwise Specified (Continued) PARAMETER DESCRIPTION CONDITIONS VIN+ = VIN- = 0V MIN TYP 3.4 3.7 MAX UNIT VREFIN + Positive Reference Input Voltage Range (EL5374) V VREFIN - Negative Reference Input Voltage Range (EL5374) VIN+ = VIN- = 0V -3.3 -3 V VREFOS Output Offset Relative to VREF (EL5374) ±50 ±100 mV CMRR Input Common Mode Rejection Ratio (EL5374) VIN = ±2.5V Gain Gain Accuracy 65 78 dB VIN = 1V (EL5174) 0.980 0.995 1.010 V VIN = 1V (EL5374) 0.978 0.993 1.008 V OUTPUT CHARACTERISTICS VOUT Output Voltage Swing IOUT(Max) Maximum Output Current ROUT Output Impedance RL = 500Ω to GND (EL5174) ±3.4 V V RL = 500Ω to GND (EL5374) ±3.6 ±3.8 RL = 10Ω, VIN+ = ±3.2V ±50 ±60 ±100 130 mA mΩ SUPPLY VSUPPLY Supply Operating Range IS(ON) Power Supply Current - Per Channel IS(OFF)+ Positive Power Supply Current - Disabled (EL5374) EN pin tied to 4.8V IS(OFF)- Negative Power Supply Current - Disabled (EL5374) PSRR Power Supply Rejection Ratio VS+ to VS- 4.75 10 VS from ±4.5V to ±5.5V 11 V 12.5 14 mA 1.7 10 µA -200 -120 µA 60 75 dB ENABLE (EL5374 ONLY) tEN Enable Time 130 ns tDS Disable Time 1.2 µs VIH EN Pin Voltage for Power-Up VIL EN Pin Voltage for Shut-Down IIH-EN EN Pin Input Current High At VEN = 5V IIL-EN EN Pin Input Current Low At VEN = 0V VS+ 1.5 VS+ 0.5 V 123 -10 130 -8 Pin Descriptions EL5174 EL5374 PIN NAME 1 17, 21, 27 FBP1, 2, 3 Feedback from non-inverting outputs 2 2, 6, 10 INP1, 2, 3 Non-inverting inputs 3 3, 7, 11 INN1, 2, 3 Inverting inputs, note that on EL5174, this pin is also the REF pin 4 16, 20, 26 FBN1, 2, 3 Feedback from inverting outputs 5 15, 19, 25 OUT1B, 2B, 3B 6 24 VSP Positive supply 7 23 VSN Negative supply 8 18, 22, 28 OUT1, 2, 3 1, 5, 9, 13 NC No connect; grounded for best crosstalk performance 4, 8, 12 REF1, 2, 3 Reference inputs, sets common-mode output voltage 14 EN 3 PIN FUNCTION Inverting outputs Non-inverting outputs ENABLE V µA µA Connection Diagrams EL5174 RF1 IN+ RG REF 4 RS1 50Ω RS1 50Ω 1 FBP OUT 8 2 INP VSN 7 3 REF VSP 6 4 FBN CL1 5pF -5V 0Ω OUT RLD 1kΩ OUTB OUTB 5 RF2 +5V CL2 5pF 0Ω EL5374 INP1 INN1 REF1 INP2 INN2 REF2 INP3 INN3 REF3 RSP1 50Ω RSN1 50Ω RSR1 50Ω RSP2 50Ω RSN2 50Ω RSR2 50Ω RSP3 50Ω RSN3 50Ω RSR3 50Ω 1 NC OUT1 28 2 INP1 FBP1 27 3 INN1 FBN1 26 4 REF1 OUT1B 25 5 NC VSP 24 6 INP2 VSN 23 7 INN2 OUT2 22 8 REF2 FBP2 21 9 NC FBN2 20 10 INP3 OUT2B 19 11 INN3 OUT3 18 12 REF3 FBP3 17 13 NC FBN3 16 14 EN OUT3B 15 RF RG 0Ω RLD1 1kΩ RF 0Ω RF RG RLD2 1kΩ 0Ω RF 0Ω RF RG 0Ω RLD3 1kΩ RF 0Ω -5V ENABLE EL5174, EL5374 +5V CL1 5pF CL1B 5pF CL2 5pF CL2B 5pF CL3 5pF CL3B 5pF EL5174, EL5374 Typical Performance Curves AV = 1, RLD = 1kΩ, CLD = 2.7pF RLD = 1kΩ, CLD = 2.7pF 4 NORMALIZED MAGNITUDE (dB) 4 3 MAGNITUDE (dB) 2 VOP-P = 200mV 1 0 -1 -2 VOP-P = 1V -3 -4 -5 -6 1M 10M 100M 3 2 1 AV = 1 0 -1 AV = 2 -2 -3 AV = 10 -4 -5 -6 1M 1G FREQUENCY (Hz) 100M 1G FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS GAIN AV = 1, CLD = 2.7pF AV = 1, RLD = 1kΩ 10 4 CLD = 50pF 8 6 3 CLD = 23pF CLD = 34pF 4 2 0 CLD = 9pF -2 -4 2 MAGNITUDE (dB) MAGNITUDE (dB) 10M FREQUENCY (Hz) FIGURE 1. FREQUENCY RESPONSE CLD = 2.7pF 0 -1 -3 -8 -5 100M RLD = 500Ω -2 -4 10M RLD= 1kΩ 1 -6 -10 1M RLD= 200Ω -6 1M 1G FIGURE 3. FREQUENCY RESPONSE vs CLD AV = 2, RLD = 1kΩ, CLD = 2.7pF 1G AV = 2, CLD = 2.7pF, RF = 750Ω 10 9 9 RF = 1kΩ 8 MAGNITUDE (dB) 8 7 6 RF = 500Ω 4 RF = 200Ω 3 7 5 3 1 1 100M FREQUENCY (Hz) FIGURE 5. FREQUENCY RESPONSE 5 400M RLD = 500Ω 4 2 10M RLD = 1kΩ 6 2 0 1M 100M FIGURE 4. FREQUENCY RESPONSE vs RLD 10 5 10M FREQUENCY (Hz) FREQUENCY (Hz) MAGNITUDE (dB) AV = 5 0 1M RLD = 200Ω 10M 100M FREQUENCY (Hz) FIGURE 6. FREQUENCY RESPONSE vs RLD 400M EL5174, EL5374 Typical Performance Curves (Continued) 5 0 4 -10 -20 2 -30 PSRR (dB) MAGNITUDE (dB) 3 1 0 -1 -2 -40 -60 -3 -70 -4 -80 -5 100K 1M 10M -90 10K 100M PSRR- -50 PSRR+ FIGURE 8. PSRR vs FREQUENCY 100 1K VOLTAGE NOISE (nV/√Hz), CURRENT NOISE (pA/√Hz) 80 CMRR (dB) 100M 10M FREQUENCY (Hz) FIGURE 7. FREQUENCY RESPONSE - VREF 60 40 20 0 -20 1K 1M 100K FREQUENCY (Hz) 10K 1M 100K 10M 100M 100 EN 10 IN 1 10 1G 100 1K FREQUENCY (Hz) 10K 100K 1M 10M FREQUENCY (Hz) FIGURE 9. CMRR vs FREQUENCY FIGURE 10. VOLTAGE AND CURRENT NOISE vs FREQUENCY 0 100 -10 -20 IMPEDENCE (Ω) GAIN (dB) -30 -40 -50 -60 CH1 <=> CH2, CH2 <=> CH3 -70 -80 10 1 CH1 <=> CH3 -90 -100 100K 1M 10M 100M 1G FREQUENCY (Hz) FIGURE 11. CHANNEL ISOLATION (EL5374 ONLY) 6 0.1 10K 100K 1M 10M 100M FREQUENCY (Hz) FIGURE 12. OUTPUT IMPEDANCE vs FREQUENCY EL5174, EL5374 Typical Performance Curves (Continued) VS = ±5V, AV = 1, RLD = 1kΩ VS = ±5V, AV = 2, RLD = 1kΩ -40 -40 HD3 (f = 5MHz) DISTORTION (dB) -50 -50 DISTORTION (dB) -60 HD3 (f = 20MHz) -70 -80 -90 -60 HD3 (f = 20MHz) -70 -80 HD3 -90 -100 1 1.5 2 2.5 3 HD2 (f = 20MH HD2 (f = 20MHz) HD2 (f = 5MHz) 3.5 4 4.5 -100 5 1 2 3 -55 -55 -60 -60 -65 -70 -75 HD3 H D2 -90 HD2 -95 -100 100 200 (f = HD3 (f 20M Hz) (f = 5 MHz) 300 400 = 5M (f = 2 0MH Hz) z) DISTORTION (dB) 8 9 10 HD3 (f = 5MHz) -70 -75 -80 HD2 (f = 20MHz) -85 HD2 (f = 5MHz) 700 900 1000 800 -100 200 300 400 500 600 700 RLD (Ω) 800 900 1000 FIGURE 16. HARMONIC DISTORTION vs RLD VS = ±5V, RLD = 1kΩ, VOP-P, DM = 1V for AV = 1, VOP-P, DM = 2V for AV = 2 -50 HD3 (AV = 2) -60 2 HD -70 (A V HD3 (AV -80 2( HD -90 -100 -65 -90 FIGURE 15. HARMONIC DISTORTION vs RLD -40 HD2 (f = 5MHz) HD3 (f = 20MHz) -95 500 600 RLD (Ω) z) VS = ±5V, AV = 2, VOP-P, DM = 2V -50 DISTORTION (dB) DISTORTION (dB) VS = ±5V, AV = 1, VOP-P, DM = 1V -85 z) FIGURE 14. HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE -50 -80 5 MH 5 6 7 VOP-P, DM (V) 4 VOP-P, DM (V) FIGURE 13. HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (f = 0 10 20 30 40 FREQUENCY (MHz) AV = 50 =2 ) = 1) 50mV/DIV 1) 60 FIGURE 17. HARMONIC DISTORTION vs FREQUENCY 7 10ns/DIV FIGURE 18. SMALL SIGNAL TRANSIENT RESPONSE EL5174, EL5374 Typical Performance Curves (Continued) M = 400ns, CH1 = 500mV/DIV, CH2 = 5V/DIV 0.5V/DIV CH1 CH2 10ns/DIV 400ns/DIV FIGURE 19. LARGE SIGNAL TRANSIENT RESPONSE FIGURE 20. ENABLED RESPONSE M = 400ns, CH1 = 200mV/DIV, CH2 = 5V/DIV JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD POWER DISSIPATION (W) 1.2 CH1 CH2 1.010W 1 QSOP28 θJA=99°C/W 0.8 625mW 0.6 0.4 SO8 θJA=160°C/W 0.2 0 0 25 400ns/DIV 50 125 150 AMBIENT TEMPERATURE (°C) FIGURE 21. DISABLED RESPONSE POWER DISSIPATION (W) 1.4 FIGURE 22. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.2 1.266W 1 909mW QSOP28 θJA=79°C/W 0.8 0.6 SO8 θJA=110°C/W 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 23. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 8 75 85 100 EL5174, EL5374 Simplified Schematic VS+ R1 IN+ R3 R2 IN- FBP R4 R7 R8 FBN VB1 OUT+ RCD REF RCD VB2 CC OUT- R9 R10 CC R5 R6 VS- Description of Operation and Application Information Product Description The EL5174 and EL5374 are wide bandwidth, low power and single/differential ended to differential output amplifiers. The EL5174 is a single channel differential amplifier. Since the IN- pin and REF pin are tired together internally, the EL5174 can be used as a single ended to differential converter. The EL5374 is a triple channel differential amplifier. The EL5374 have a separate IN- pin and REF pin for each channel. It can be used as single/differential ended to differential converter. The EL5174 and EL5374 are internally compensated for closed loop gain of +1 of greater. Connected in gain of 1 and driving a 1kΩ differential load, the EL5174 and EL5374 have a -3dB bandwidth of 550MHz. Driving a 200Ω differential load at gain of 2, the bandwidth is about 130MHz. The EL5374 is available with a power down feature to reduce the power while the amplifier is disabled. Input, Output, and Supply Voltage Range The EL5174 and EL5374 have been designed to operate with a single supply voltage of 5V to 10V or a split supplies with its total voltage from 5V to 10V. The amplifiers have an input common mode voltage range from -4.3V to 3.4V for ±5V supply. The differential mode input range (DMIR) between the two inputs is from -2.3V to +2.3V. The input voltage range at the REF pin is from -3.3V to 3.7V. If the input common mode or differential mode signal is outside the above-specified ranges, it will cause the output signal distorted. The output of the EL5174 and EL5374 can swing from -3.8V to +3.8V at 1kΩ differential load at ±5V supply. As the load resistance becomes lower, the output swing is reduced. 9 Differential and Common Mode Gain Settings For EL5174, since the IN- pin and REF pin are bounded together as the REF pin in an 8-pin package, the signal at the REF pin is part of the common mode signal and also part of the differential mode signal. For the true balance differential outputs, the REF pin must be tired to the same bias level as the IN+ pin. For a ±5V supply, just tire the REF pin to GND if the IN+ pin is biased at 0V with a 50Ω or 75Ω termination resistor. For a single supply application, if the IN+ is biased to half of the rail, the REF pin should be biased to half of the rail also. The gain setting for EL5174 is: R F1 + R F2 V ODM = V IN + × 1 + --------------------------- RG 2R V ODM = V IN + × 1 + ----------F- RG V OCM = V REF = 0V Where: • VREF = 0V • RF1 = RF2 = RF EL5374 have a separate IN- pin and REF pin. It can be used as a single/differential ended to differential converter. The voltage applied at REF pin can set the output common mode voltage and the gain is one. EL5174, EL5374 Driving Capacitive Loads and Cables The gain setting for EL5374 is: The EL5174 and EL5374 can drive 23pF differential capacitor in parallel with 1kΩ differential load with less than 5dB of peaking at gain of +1. If less peaking is desired in applications, a small series resistor (usually between 5Ω to 50Ω) can be placed in series with each output to eliminate most peaking. However, this will reduce the gain slightly. If the gain setting is greater than 1, the gain resistor RG can then be chosen to make up for any gain loss which may be created by the additional series resistor at the output. R F1 + R F2 V ODM = ( V IN + – V IN - ) × 1 + --------------------------- RG 2R V ODM = ( V IN + – V IN - ) × 1 + ----------F- RG V OCM = V REF Where: • RF1 = RF2 = RF RF1 FBP VIN+ VIN- RG VREF V O+ IN+ INREF V O- FBN RF2 FIGURE 24. Choice of Feedback Resistor and Gain Bandwidth Product For applications that require a gain of +1, no feedback resistor is required. Just short the OUT+ pin to FBP pin and OUT- pin to FBN pin. For gains greater than +1, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value that should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few Pico farad range in parallel with RF can help to reduce the ringing and peaking at the expense of reducing the bandwidth. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking. Disable/Power-Down (for EL5374 only) The EL5374 can be disabled and placed its outputs in a high impedance state. The turn off time is about 1.2µs and the turn on time is about 130ns. When disabled, the amplifier's supply current is reduced to 1.7µA for IS+ and 120µA for IStypically, thereby effectively eliminating the power consumption. The amplifier's power down can be controlled by standard CMOS signal levels at the EN pin. The applied logic signal is relative to VS+ pin. Letting the EN pin float or applying a signal that is less than 1.5V below VS+ will enable the amplifier. The amplifier will be disabled when the signal at EN pin is above VS+ - 0.5V. Output Drive Capability The EL5174 and EL5374 have internal short circuit protection. Its typical short circuit current is ±60mA. If the output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output current never exceeds ±60mA. This limit is set by the design of the internal metal interconnections. The bandwidth of the EL5174 and EL5374 depends on the load and the feedback network. RF and RG appear in parallel with the load for gains other than +1. As this combination gets smaller, the bandwidth falls off. Consequently, RF also has a minimum value that should not be exceeded for optimum bandwidth performance. For gain of +1, RF = 0 is optimum. For the gains other than +1, optimum response is obtained with RF between 500Ω to 1kΩ. Power Dissipation The EL5174 and EL5374 have a gain bandwidth product of 200MHz for RLD = 1kΩ. For gains ≥5, its bandwidth can be predicted by the following equation: The maximum power dissipation allowed in a package is determined according to: With the high output drive capability of the EL5174 and EL5374. It is possible to exceed the 135°C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if the load conditions or package types need to be modified for the amplifier to remain in the safe operating area. T JMAX – T AMAX PD MAX = -------------------------------------------Θ JA Gain × BW = 200MHz 10 EL5174, EL5374 Power Supply Bypassing and Printed Circuit Board Layout Where: • TJMAX = Maximum junction temperature • TAMAX = Maximum ambient temperature • θJA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: ∆V O PD = i × V S × I SMAX + V S × ------------ R LD Where: • VS = Total supply voltage • ISMAX = Maximum quiescent supply current per channel • ∆VO = Maximum differential output voltage of the application • RLD = Differential load resistance • ILOAD = Load current • i = Number of channels As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as sort as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces. By setting the two PDMAX equations equal to each other, we can solve the output current and RLD to avoid the device overheat. Typical Applications RF FBP 50 TWISTED PAIR IN+ IN+ RT RG INREF EL5174/ EL5374 50 IN- ZO = 100Ω FBN REF RF RFR RGR FIGURE 25. TWISTED PAIR CABLE RECEIVER As the signal is transmitted through a cable, the high frequency signal will be attenuated. One way to compensate this loss is to boost the high frequency gain at the receiver side. 11 EL5175/ EL5375 VO EL5174, EL5374 RF Gain (dB) FBP RT 75 RGC VO+ IN+ RG IN- CL REF VO- FBN fL RF 2R DC Gain = 1 + ----------FRG 1 f L ≅ ------------------------2πR G C C 2R F ( HF )Gain = 1 + -------------------------R G || R GC 1 f H ≅ ----------------------------2πR GC C C FIGURE 26. TRANSMIT EQUALIZER SO Package Outline Drawing 12 fH frequency EL5174, EL5374 QSOP Package Outline Drawing NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at http://www.intersil.com/design/packages/index.asp All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 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