Quad SPST JFET Analog Switches LF11331, LF13331 4 Normally Open Switches with Disable LF11332, LF13332 4 Normally Closed Switches with Disable LF11333, LF13333 2 Normally Closed Switches and 2 Normally Open Switches with Disable LF11201, LF13201 4 Normally Closed Switches LF11202, LF13202 4 Normally Open Switches General Description Features These devices are a monolithic combination of bipolar and JFET technology producing the industry’s first one chip quad JFET switch. A unique circuit technique is employed to maintain a constant resistance over the analog voltage range of g 10V. The input is designed to operate from minimum TTL levels, and switch operation also ensures a breakbefore-make action. These devices operate from g 15V supplies and swing a g 10V analog signal. The JFET switches are designed for applications where a dc to medium frequency analog signal needs to be controlled. Y Y Y Y Y Y Y Y Y Y Analog signals are not loaded Constant ‘‘ON’’ resistance for signals up to g 10V and 100 kHz Pin compatible with CMOS switches with the advantage of blow out free handling Small signal analog signals to 50 MHz Break-before-make action tOFF k tON b 50 dB High open switch isolation at 1.0 MHz k 1.0 nA Low leakage in ‘‘OFF’’ state TTL, DTL, RTL compatibility Single disable pin opens all switches in package on LF11331, LF11332, LF11333 LF11201 is pin compatible with DG201 Test Circuit and Schematic Diagram TL/H/5667 – 2 FIGURE 1. Typical Circuit for One Switch TL/H/5667 – 12 FIGURE 2. Schematic Diagram (Normally Open) C1995 National Semiconductor Corporation TL/H/5667 RRD-B30M75/Printed in U. S. A. LF11331/LF13331/LF11332/LF13332/LF11333/LF13333/LF11201/ LF13201/LF11202/LF13202 Quad SPST JFET Analog Switches January 1995 Absolute Maximum Ratings Power Dissipation (Note 2) Molded DIP (N Suffix) Cavity DIP (D Suffix) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. (Note 1) Supply Voltage (VCCbVEE) 36V Reference Voltage Logic Input Voltage Analog Voltage Operating Temperature Range LF11201, 2 and LF11331, 2, 3 LF13201, 2 and LF13331, 2, 3 VEEsVRsVCC VRb4.0VsVINsVR a 6.0V VEEsVAsVCC a 6V; VAsVEE a 36V lIAl k20 mA Analog Current 500 mW 900 mW b 55§ C to a 125§ C 0§ C to a 70§ C Storage Temperature Soldering Information N and D Package (10 sec.) SO Package Vapor Phase (60 sec.) Infrared (15 sec.) b 65§ C to a 150§ C 300§ C 215§ C 220§ C Electrical Characteristics (Note 3) Symbol Parameter LF11331/2/3 LF11201/2 Conditions LF13331/2/3 LF13201/2 Units Min Typ Max Min Typ Max RON ‘‘ON’’ Resistance RON Match ‘‘ON’’ Resistance Matching Analog Range VA Leakage Current in ‘‘ON’’ Condition IS(ON) a ID(ON) VA e 0, ID e 1 mA Switch ‘‘ON,’’ VS e VD e g 10V Switch ‘‘OFF,’’ VS e a 10V, VD eb10V Switch ‘‘OFF,’’ VS e a 10V, VD eb10V TA e 25§ C 150 200 TA e 25§ C 5 g 10 g 11 TA e 25§ C 0.3 3 TA e 25§ C 200 300 20 150 200 10 g 10 g 11 5 0.3 100 3 0.4 5 3 100 0.1 5 3 100 10 30 X X X V nA nA 10 30 10 30 nA nA nA nA 0.8 3.6 40 100 0.1 1 V V mA mA mA mA ns ns ns pF pF pF IS(OFF) Source Current in ‘‘OFF’’ Condition ID(OFF) Drain Current in ‘‘OFF’’ Condition VINH VINL IINH Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Input Current VIN e 5V TA e 25§ C IINL Logical ‘‘0’’ Input Current VIN e 0.8 TA e 25§ C tON tOFF tONbtOFF CS(OFF) CD(OFF) CS(ON) a CD(ON) Delay Time ‘‘ON’’ Delay Time ‘‘OFF’’ Break-Before-Make Source Capacitance Drain Capacitance Active Source and Drain Capacitance VS e g 10V, (Figure 3) VS e g 10V, (Figure 3) VS e g 10V, (Figure 3) Switch ‘‘OFF,’’ VS e g 10V Switch ‘‘OFF,’’ VD e g 10V Switch ‘‘ON,’’ VS e VD e 0V TA e 25§ C TA e 25§ C TA e 25§ C TA e 25§ C TA e 25§ C TA e 25§ C 500 90 80 4.0 3.0 5.0 500 90 80 4.0 3.0 5.0 ISO(OFF) CT SR IDIS ‘‘OFF’’ Isolation Crosstalk Analog Slew Rate Disable Current (Figure 4) , (Note 4) (Figure 4) , (Note 4) (Note 5) (Figure 5) , (Note 6) TA e 25§ C TA e 25§ C TA e 25§ C TA e 25§ C b 50 b 65 b 50 b 65 IEE Negative Supply Current All Switches ‘‘OFF,’’ VS e g 10V TA e 25§ C IR Reference Supply Current All Switches ‘‘OFF,’’ VS e g 10V TA e 25§ C ICC Positive Supply Current All Switches ‘‘OFF,’’ VS e g 10V TA e 25§ C TA e 25§ C 2.0 250 350 50 0.4 3 0.1 3 2.0 3.6 0.8 10 25 0.1 1 dB dB V/ms 1.5 mA 2.3 mA 50 0.4 0.6 1.0 1.5 50 0.6 0.9 3.0 4.2 2.0 2.8 4.5 6.3 5.0 7.5 4.0 6.0 6.0 9.0 4.3 7.0 mA 6.0 10.5 mA 2.7 5.0 mA 3.8 7.5 mA 7.0 9.0 mA 9.8 13.5 mA Note 1: Refer to RETSF11201X, RETSF11331X, RETSF11332X and RETSF11333X for military specifications. Note 2: For operating at high temperature the molded DIP products must be derated based on a a 100§ C maximum junction temperature and a thermal resistance of a 150§ C/W, devices in the cavity DIP are based on a a 150§ C maximum junction temperature and are derated at g 100§ C/W. Note 3: Unless otherwise specified, VCC e a 15V, VEE eb 15V, VR e 0V, and limits apply for b 55§ C s TA s a 125§ C for the LF11331/2/3 and the LF11201/2, b 25§ C s TA s a 85§ C for the LF13331/2/3 and the LF13201/2. Note 4: These parameters are limited by the pin to pin capacitance of the package. Note 5: This is the analog signal slew rate above which the signal is distorted as a result of finite internal slew rates. Note 6: All switches in the device are turned ‘‘OFF’’ by saturating a transistor at the disable node as shown in Figure 5 . The delay time will be approximately equal to the tON or tOFF plus the delay introduced by the external transistor. Note 7: This graph indicates the analog current at which 1% of the analog current is lost when the drain is positive with respect to the source. Note 8: iJA (Typical) Thermal Resistance Molded DIP (N) 85§ C/W Cavity DIP (D) 100§ C/W Small Outline (M) 105§ C/W 2 Connection Diagrams (Top View for SO and Dual-In-Line Packages) (All Switches Shown are For Logical ‘‘0’’) LF11331/LF13331 LF11332/LF13332 TL/H/5667 – 13 TL/H/5667 – 1 LF11333/LF13333 LF11201/LF13201 TL/H/5667 – 15 TL/H/5667 – 14 LF11202/LF13202 Order Number LF13201D, LF11201D, LF11201D/883, LF13202D, LF11202D, LF11202D/883, LF13331D, LF11331D, LF11331D/883, LF13332D, LF11332D, LF11332D/883, LF13333D, LF11333D or LH11333D/883 See NS Package Number D16C Order Number LF13201M, LF13202M, LF13331M, LF13332M or LF13333M See NS Package Number M16A Order Number LF13201N, LF13202N, LF13331N, LF13332N or LF13333N See NS Package Number N16A TL/H/5667 – 16 3 Test Circuit and Typical Performance Curves Delay Time, Rise Time, Settling Time, and Switching Transients TL/H/5667 – 3 Additional Test Circuits FIGURE 3. tON, tOFF Test Circuit and Waveforms for a Normally Open Switch TL/H/5667 – 4 FIGURE 4. ‘‘OFF’’ Isolation, Crosstalk, Small Signal Response 4 Typical Performance Characteristics ‘‘ON’’ Resistance ‘‘ON’’ Resistance ‘‘ON’’ Resistance Break-Before-Make Action Switching Times Crosstalk and ‘‘OFF’’ Isolation vs Frequency Using Test Circuit of Figure 5 Supply Current Supply Current Supply Current Switch Leakage Currents Switch Leakage Current Switch Capacitances Slew Rate of Analog Voltage Above Which Signal Loading Occurs Small Signal Response Maximum Accurate Analog Current vs Temperature Logical ‘‘1’’ Input Bias Current TL/H/5667 – 5 5 Application Hints GENERAL INFORMATION LEAKAGE CURRENTS These devices are monolithic quad JFET analog switches with ‘‘ON’’ resistances which are essentially independent of analog voltage or analog current. The leakage currents are typically less than 1 nA at 25§ C in both the ‘‘OFF’’and ‘‘ON’’ switch states and introduce negligible errors in most applications. Each switch is controlled by minimum TTL logic levels at its input and is designed to turn ‘‘OFF’’ faster than it will turn ‘‘ON.’’ This prevents two analog sources from being transiently connected together during switching. The switches were designed for applications which require break-before-make action, no analog current loss, medium speed switching times and moderate analog currents. Because these analog switches are JFET rather than CMOS, they do not require special handling. The drain and source leakage currents, in both the ON and the OFF states of each switch, are typically less than 1 nA at 25§ C and less than 100 nA at 125§ C. As shown in the typical curves, these leakage currents are Dependent on power supply voltages, analog voltage, analog current and the source to drain voltage. DELAY TIMES The delay time OFF (tOFF) is essentially independent of both the analog voltage and temperature. The delay time ON (tON) will decrease as either (VCCbVA) decreases or the temperature decreases. POWER SUPPLIES The voltage between the positive supply (VCC) and either the negative supply (VEE) or the reference supply (VR) can be as much as 36V. To accommodate variations in input logic reference voltages, VR can range from VEE to (VCCb4.5V). Care should be taken to ensure that the power supply leads for the device never become reversed in polarity or that the device is never inadvertantly installed backwards in a test socket. If one of these conditions occurs, the supplies would zener an internal diode to an unlimited current; and result in a destroyed device. LOGIC INPUTS The logic input (IN), of each switch, is referenced to two forward diode drops (1.4V at 25§ C) from the reference supply (VR) which makes it compatible with DTL, RTL, and TTL logic families. For normal operation, the logic ‘‘0’’ voltage can range from 0.8V to b4.0V with respect to VR and the logic ‘‘1’’ voltage can range from 2.0V to 6.0V with respect to VR, provided VIN is not greater than (VCCb2.5V). If the input voltage is greater than (VCC b2.5V), the input current will increase. If the input voltage exceeds 6.0V or b4.0V with respect to VR, a resistor in series with the input should be used to limit the input current to less than 100mA. SWITCHING TRANSIENTS When a switch is turned OFF or ON, transients will appear at the load due to the internal transient voltage at the gate of the switch JFET being coupled to the drain and source by the junction capacitances of the JFET. The magnitude of these transients is dependent on the load. A lower value RL produces a lower transient voltage. A negative transient occurs during the delay time ON, while a positive transient occurs during the delay time OFF. These transients are relatively small when compared to faster switch families. ANALOG VOLTAGE AND CURRENT Analog Voltage Each switch has a constant ‘‘ON’’ resistance (RON) for analog voltages from (VEE a 5V) to (VCCb5V). For analog voltages greater than (VCCb5V), the switch will remain ON independent of the logic input voltage. For analog voltages less than (VEE a 5V), the ON resistance of the switch will increase. Although the switch will not operate normally when the analog voltage is out of the previously mentioned range, the source voltage can go to either (VEE a 36V) or (VCC a 6V), whichever is more positive, and can go as negative as VEE without destruction. The drain (D) voltage can also go to either (VEE a 36V) or (VCC a 6V), whichever is more positive, and can go as negative as (VCCb36V) without destruction. DISABLE NODE This node can be used, as shown in Figure 5 , to turn all the switches in the unit off independent of logic inputs. Normally, the node floats freely at an internal diode drop ( & 0.7V) above VR. When the external transistor in Figure 5 is saturated, the node is pulled very close to VR and the unit is disabled. Typically, the current from the node will be less than 1 mA. This feature is not available on the LF11201 or LF11202 series. Analog Current With the source (S) positive with respect to the drain (D), the RON is constant for low analog currents, but will increase at higher currents (l5 mA) when the FET enters the saturation region. However, if the drain is positive with respect to the source and a small analog current loss at high analog currents (Note 6) is tolerable, a low RON can be maintained for analog currents greater than 5 mA at 25§ C. TL/H/5667 – 6 FIGURE 5. Disable Function 6 Typical Applications Sample and Hold with Reset Programmable Inverting Non-Inverting Operational Amplifier Programmable Gain Operational Amplifier TL/H/5667 – 7 7 Typical Applications (Continued) Demultiplexer Multiplexer/Mixer 8-Channel Analog Commutator with 6-Channel Select Logic TL/H/5667 – 8 8 Typical Applications (Continued) Chopper Channel Amplifier Self-Zeroing Operational Amplifier TL/H/5667 – 9 9 Typical Applications (Continued) Programmable Integrator with Reset and Hold Staircase Transfer Function Operational Amplifier TL/H/5667 – 10 10 Typical Applications (Continued) DSB Modulator-Demodulator TL/H/5667 – 11 11 12 Physical Dimensions inches (millimeters) Order Number LF11201D, LF11201D/883, LF13201D, LF11202D, LF11202D/883, LF13202D, LF11331D, LF11331D/883, LF13331D, LF11332D, LF11332D/883, LF13332D, LF11333D, LF11333D/883 or LF13333D NS Package Number D16C Order Number LF13201M, LF13202M, LF13331M, LF13332M or LF13333M NS Package Number M16A 13 LF11331/LF13331/LF11332/LF13332/LF11333/LF13333/LF11201/ LF13201/LF11202/LF13202 Quad SPST JFET Analog Switches Physical Dimensions inches (millimeters) Order Number LF13201N, LF13202N, LF13331N, LF13332N or LF13333N NS Package Number N16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 2900 Semiconductor Drive P.O. Box 58090 Santa Clara, CA 95052-8090 Tel: 1(800) 272-9959 TWX: (910) 339-9240 National Semiconductor GmbH Livry-Gargan-Str. 10 D-82256 F4urstenfeldbruck Germany Tel: (81-41) 35-0 Telex: 527649 Fax: (81-41) 35-1 National Semiconductor Japan Ltd. Sumitomo Chemical Engineering Center Bldg. 7F 1-7-1, Nakase, Mihama-Ku Chiba-City, Ciba Prefecture 261 Tel: (043) 299-2300 Fax: (043) 299-2500 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductores Do Brazil Ltda. Rue Deputado Lacorda Franco 120-3A Sao Paulo-SP Brazil 05418-000 Tel: (55-11) 212-5066 Telex: 391-1131931 NSBR BR Fax: (55-11) 212-1181 National Semiconductor (Australia) Pty, Ltd. Building 16 Business Park Drive Monash Business Park Nottinghill, Melbourne Victoria 3168 Australia Tel: (3) 558-9999 Fax: (3) 558-9998 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.