ETC LT1806IS6

LT1806/LT1807
325MHz, Single/Dual,
Rail-to-Rail Input and Output, Low Distortion,
Low Noise Precision Op Amps
DESCRIPTIO
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FEATURES
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Gain Bandwidth Product: 325MHz
Slew Rate: 140V/µs
Wide Supply Range: 2.5V to 12.6V
Large Output Current: 85mA
Low Distortion, 5MHz: –80dBc
Low Voltage Noise: 3.5nV/√Hz
Input Common Mode Range Includes Both Rails
Output Swings Rail-to-Rail
Input Offset Voltage (Rail-to-Rail): 550µV Max
Common Mode Rejection: 106dB Typ
Power Supply Rejection: 105dB Typ
Unity-Gain Stable
Power Down Pin (LT1806)
Single in SO-8 and 6-Pin SOT-23 Packages
Dual in SO-8 and 8-Pin MSOP Packages
Operating Temperature Range: –40°C to 85°C
The LT®1806/LT1807 are single/dual low noise rail-to-rail
input and output unity-gain stable op amps that feature a
325MHz gain-bandwidth product, a 140V/µs slew rate and
a 85mA output current. They are optimized for low voltage,
high performance signal conditioning systems.
Low Voltage, High Frequency Signal Processing
Driving A/D Converters
Rail-to-Rail Buffer Amplifiers
Active Filters
Video Line Driver
The LT1806 is available in an 8-pin SO package with the
standard op amp pinout and a 6-pin SOT-23 package. The
LT1807 features the standard dual op amp pinout and is
available in 8-pin SO and MSOP packages.These devices
can be used as plug-in replacements for many op amps to
improve input/output range and performance.
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APPLICATIO S
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, LTC and LT are registered trademarks of Linear Technology Corporation.
The LT1806/LT1807 have a very low distortion of – 80dBc
at 5MHz, a low input referred noise voltage of 3.5nV/√Hz
and a maximum offset voltage of 550µV that allows them
to be used in high performance data acquisition systems.
The LT1806/LT1807 have an input range that includes
both supply rails and an output that swings within 20mV
of either supply rail to maximize the signal dynamic range
in low supply applications.
The LT1806/LT1807 maintain their performance for supplies from 2.5V to 12.6V and are specified at 3V, 5V and
±5V supplies. The inputs can be driven beyond the supplies without damage or phase reversal of the output.
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TYPICAL APPLICATIO
Gain of 20 Differential A/D Driver
4096 Point FFT Response
0
+
1/2 LT1807
R1
100Ω
R2
909Ω
C1 5.6pF
VIN
5V
R5
49.9Ω
C3
470pF
C2 5.6pF
+AVIN
LTC®1420
PGA GAIN = 1
V
–AVIN REF = 4.096V
R6
49.9Ω
12 BITS
10Msps
AMPLITUDE (dB)
–
VS = ±5V
AV = 20
fSAMPLE = 10Msps
fIN = 1.4086MHz
SFDR = 83dB
NONAVERAGED
VIN = 200mVP-P
–20
–40
–60
–80
–100
18067 TA01
R3
100Ω
–
R4
1k
1/2 LT1807
–5V
–120
0
1
2
3
FREQUENCY (MHz)
4
5
18067 TA02
+
1
LT1806/LT1807
W W
W
AXI U
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ABSOLUTE
RATI GS
(Note 1)
Total Supply Voltage (V + to V –) ............................ 12.6V
Input Voltage (Note 2) ............................................. ±VS
Input Current (Note 2) ........................................ ±10mA
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range (Note 4) .. – 40°C to 85°C
Specified Temperature Range (Note 5) ... – 40°C to 85°C
Junction Temperature ........................................... 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
U
U
W
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
V– 2
5 SHDN
+IN 3
4 –IN
TJMAX = 150°C, θJA = 160°C/W (Note 9)
TOP VIEW
1
2
3
4
8
7
6
5
V+
OUT B
–IN B
+IN B
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 135°C/W (Note 9)
8
NC
–IN 2
7
V+
6
OUT
5
NC
+IN 3
V– 4
S6 PART MARKING
S6 PACKAGE
6-LEAD PLASTIC SOT-23
OUT A
–IN A
+IN A
V–
LT1806CS6
LT1806IS6
SHDN 1
LT1806CS8
LT1806IS8
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
LTNK
LTNL
TJMAX = 150°C, θJA = 100°C/W (Note 9)
1806
1806I
ORDER PART
NUMBER
TOP VIEW
ORDER PART
NUMBER
LT1807CMS8
LT1807IMS8
OUT A 1
8
V+
–IN A 2
7
OUT B
6
–IN B
5
+IN B
+IN A 3
+
–
6 V+
OUT 1
ORDER PART
NUMBER
TOP VIEW
+
–
TOP VIEW
V– 4
MS8 PART MARKING
–
+
LT1807CS8
LT1807IS8
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
LTTT
LTTV
1807
1807I
TJMAX = 150°C, θJA = 100°C/W (Note 9)
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
TYP
MAX
UNITS
VOS
Input Offset Voltage
VCM = V +
VCM = V –
VCM = V + (LT1806 SOT-23)
VCM = V – (LT1806 SOT-23)
100
100
100
100
550
550
700
700
µV
µV
µV
µV
∆VOS
Input Offset Voltage Shift
VCM = V – to V +
VCM = V – to V + (LT1806 SOT-23)
50
100
550
700
µV
µV
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
VCM = V – to V +
200
1000
µV
Input Bias Current
VCM = V +
VCM = V – + 0.2V
1
–5
4
µA
µA
6
17
µA
0.03
0.05
1.2
3.0
µA
µA
IB
∆IB
2
Input Bias Current Shift
VCM = V – to V +
Input Bias Current Match (Channel-to-Channel)
(Note 10)
VCM = V +
VCM = V – +
0.2V
MIN
–13
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
TYP
MAX
UNITS
IOS
Input Offset Current
VCM = V +
VCM = V – + 0.2V
MIN
0.03
0.05
0.6
1.5
µA
µA
∆IOS
Input Offset Current Shift
VCM = V – + 0.2V to V +
0.08
2.1
µA
Input Noise Voltage
0.1Hz to 10Hz
800
nVP-P
en
Input Noise Voltage Density
f = 10kHz
3.5
nV/√Hz
in
Input Noise Current Density
f = 10kHz
1.5
pA/√Hz
CIN
Input Capacitance
AVOL
Large-Signal Voltage Gain
VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2
VS = 5V, VO = 1V to 4V, RL = 100 to VS/2
VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2
75
9
60
220
22
150
V/mV
V/mV
V/mV
CMRR
Common Mode Rejection Ratio
VS = 5V, VCM = V – to V +
VS = 3V, VCM = V – to V+
79
74
100
95
dB
dB
CMRR Match (Channel-to-Channel) (Note 10)
VS = 5V, VCM = V – to V +
VS = 3V, VCM = V – to V+
73
68
100
95
dB
dB
2
V–
Input Common Mode Range
PSRR
V+
Power Supply Rejection Ratio
VS = 2.5V to 10V, VCM = 0V
90
105
PSRR Match (Channel-to-Channel) (Note 10)
VS = 2.5V to 10V, VCM = 0V
84
105
Minimum Supply Voltage (Note 6)
pF
V
dB
dB
2.3
2.5
V
VOL
Output Voltage Swing LOW (Note 7)
No Load
ISINK = 5mA
ISINK = 25mA
8
50
170
50
130
375
mV
mV
mV
VOH
Output Voltage Swing HIGH (Note 7)
No Load
ISOURCE = 5mA
ISOURCE = 25mA
15
85
350
65
180
650
mV
mV
mV
ISC
Short-Circuit Current
VS = 5V
VS = 3V
IS
Supply Current per Amplifier
ISHDN
VL
±35
±30
±85
±65
mA
mA
9
13
mA
Disable Supply Current
VS = 5V, VSHDN = 0.3V
VS = 3V, VSHDN = 0.3V
0.40
0.22
0.9
0.7
mA
mA
SHDN Pin Current
VS = 5V, VSHDN = 0.3V
VS = 3V, VSHDN = 0.3V
150
100
350
300
µA
µA
Shutdown Output Leakage Current
VSHDN = 0.3V
0.1
75
µA
0.3
V
SHDN Pin Input Voltage LOW
V+
VH
SHDN Pin Input Voltage HIGH
tON
Turn-On Time
VSHDN = 0.3V to 4.5V, RL = 100Ω
– 0.5
V
tOFF
Turn-Off Time
VSHDN = 4.5V to 0.3V, RL = 100Ω
50
ns
GBW
Gain Bandwidth Product
Frequency = 6MHz
325
MHz
80
ns
SR
Slew Rate
VS = 5V, AV = –1, RL = 1k, VO = 4V
125
V/µs
FPBW
Full Power Bandwidth
VS = 5V, VOUT = 4VP-P
10
MHz
HD
Harmonic Distortion
VS = 5V, AV = 1, RL = 1k, VO = 2VP-P, fC = 5MHz
–78
dBc
tS
Settling Time
0.01%, VS = 5V, VSTEP = 2V, AV = 1, RL = 1k
60
ns
∆G
Differential Gain (NTSC)
VS = 5V, AV = 2, RL = 150
0.015
%
∆θ
Differential Phase (NTSC)
VS = 5V, AV = 2, RL = 150
0.05
Deg
3
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the 0°C < TA < 70°C
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
TYP
MAX
UNITS
VOS
Input Offset Voltage
VCM = V +
VCM = V –
VCM = V + (LT1806 SOT-23)
VCM = V – (LT1806 SOT-23)
●
●
●
●
200
200
200
200
700
700
850
850
µV
µV
µV
µV
VOS TC
Input Offset Voltage Drift (Note 8)
VCM = V +
VCM = V –
●
●
1.5
1.5
5
5
∆VOS
Input Offset Voltage Shift
VCM = V – to V+
VCM = V – to V+ (LT1806 SOT-23)
●
●
100
100
700
850
µV
µV
●
300
1200
µV
1
–5
5
µA
µA
IB
∆IB
MIN
Input Offset Voltage Match (Channel-to-Channel) VCM = V –, VCM = V +
(Note 10)
Input Bias Current
VCM = V + – 0.2V
VCM = V – + 0.4V
●
●
–15
µV/°C
µV/°C
Input Bias Current Shift
VCM = V – + 0.4V to V + – 0.2V
●
6
20
µA
Input Bias Current Match (Channel-to-Channel)
(Note 10)
VCM = V + – 0.2V
VCM = V – + 0.4V
VCM = V + – 0.2V
VCM = V – + 0.4V
VCM = V – + 0.4V to
●
●
0.03
0.05
1.5
3.5
µA
µA
●
●
0.03
0.05
0.75
1.80
µA
µA
0.08
2.55
IOS
Input Offset Current
∆IOS
Input Offset Current Shift
AVOL
Large-Signal Voltage Gain
VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2
VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2
VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2
●
●
●
60
7.5
45
175
20
140
V/mV
V/mV
V/mV
CMRR
Common Mode Rejection Ratio
VS = 5V, VCM = V – to V +
VS = 3V, VCM = V – to V+
●
●
77
72
94
89
dB
dB
CMRR Match (Channel-to-Channel) (Note 10)
VS = 5V, VCM = V – to V +
VS = 3V, VCM = V – to V+
●
●
71
66
94
89
dB
dB
●
V–
V + – 0.2V
Input Common Mode Range
PSRR
●
V+
µA
V
Power Supply Rejection Ratio
VS = 2.5V to 10V, VCM = 0V
●
88
105
PSRR Match (Channel-to-Channel) (Note 10)
VS = 2.5V to 10V, VCM = 0V
●
82
105
Minimum Supply Voltage (Note 6)
VCM = VO = 0.5V
●
2.3
2.5
V
VOL
Output Voltage Swing LOW (Note 7)
No Load
ISINK = 5mA
ISINK = 25mA
●
●
●
12
60
180
60
140
425
mV
mV
mV
VOH
Output Voltage Swing HIGH (Note 7)
No Load
ISOURCE = 5mA
ISOURCE = 25mA
●
●
●
30
110
360
120
220
700
mV
mV
mV
ISC
Short-Circuit Current
VS = 5V
VS = 3V
●
●
IS
Supply Current per Amplifier
±30
±25
dB
dB
±65
±55
mA
mA
●
10
14
mA
Disable Supply Current
VS = 5V, VSHDN = 0.3V
VS = 3V, VSHDN = 0.3V
●
●
0.40
0.22
1.1
0.9
mA
mA
ISHDN
SHDN Pin Current
VS = 5V, VSHDN = 0.3V
VS = 3V, VSHDN = 0.3V
●
●
160
110
400
350
µA
µA
Shutdown Output Leakage Current
SHDN Pin Input Voltage LOW
VSHDN = 0.3V
●
1
VL
0.3
µA
V
VH
SHDN Pin Input Voltage HIGH
tON
Turn-On Time
VSHDN = 0.3V to 4.5V, RL = 100Ω
●
80
tOFF
Turn-Off Time
VSHDN = 4.5V to 0.3V, RL = 100Ω
●
50
ns
GBW
Gain Bandwidth Product
Frequency = 6MHz
●
300
MHz
●
● V + – 0.5
V
ns
SR
Slew Rate
VS = 5V, AV = –1, RL= 1k, VO = 4V
●
100
V/µs
FPBW
Full Power Bandwidth
VS = 5V, VO = 4VP-P
●
8
MHz
4
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the – 40°C < TA < 85°C
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. (Note 5)
SYMBOL
VOS
PARAMETER
Input Offset Voltage
VOS TC
Input Offset Voltage Drift (Note 8)
∆VOS
Input Offset Voltage Shift
IB
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
Input Bias Current
∆IB
IOS
Input Bias Current Shift
Input Bias Current Match (Channel-to-Channel)
(Note 10)
Input Offset Current
∆IOS
AVOL
Input Offset Current Shift
Large-Signal Voltage Gain
CMRR
Common Mode Rejection Ratio
CMRR Match (Channel-to-Channel) (Note 10)
VOL
Input Common Mode Range
Power Supply Rejection Ratio
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing LOW (Note 7)
VOH
Output Voltage Swing HIGH (Note 7)
ISC
Short-Circuit Current
IS
Supply Current per Amplifier
Disable Supply Current
PSRR
ISHDN
SHDN Pin Current
VL
VH
tON
tOFF
GBW
SR
FPBW
Shutdown Output Leakage Current
SHDN Pin Input Voltage LOW
SHDN Pin Input Voltage HIGH
Turn-On Time
Turn-Off Time
Gain Bandwidth Product
Slew Rate
Full Power Bandwidth
CONDITIONS
VCM = V +
VCM = V –
VCM = V + (LT1806 SOT-23)
VCM = V – (LT1806 SOT-23)
VCM = V +
VCM = V –
VCM = V –
VCM = V – to V + (LT1806 SOT-23)
VCM = V +, VCM = V –
VCM = V + – 0.2V
VCM = V – + 0.4V
VCM = V – + 0.4V to V+ – 0.2V
VCM = V + – 0.2V
VCM = V – + 0.4V
VCM = V + – 0.2V
VCM = V – + 0.4V
VCM = V – + 0.4V to V+ – 0.2V
VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2
VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2
VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2
VS = 5V, VCM = V – to V +
VS = 3V, VCM = V – to V+
VS = 5V, VCM = V – to V +
VS = 3V, VCM = V – to V+
MIN
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
VS = 2.5V to 10V, VCM = 0V
VS = 2.5V to 10V, VCM = 0V
VCM = VO = 0.5V
No Load
ISINK = 5mA
ISINK = 20mA
No Load
ISOURCE = 5mA
ISOURCE = 20mA
VS = 5V
VS = 3V
–16
●
●
50
6
35
75
71
69
65
V–
86
80
●
●
●
●
●
●
●
●
●
±22
±20
●
VS = 5V, VSHDN = 0.3.V
VS = 3V, VSHDN = 0.3V
VS = 5V, VSHDN = 0.3V
VS = 3V, VSHDN = 0.3V
VSHDN = 0.3V
●
●
●
●
●
TYP
200
200
200
200
1.5
1.5
100
100
200
MAX
800
800
950
950
5
5
800
950
1400
UNITS
µV
µV
µV
µV
µV/°C
µV/°C
µV
µV
µV
1
–5
6
0.02
0.05
0.02
0.05
0.07
140
16
100
94
89
94
89
6
µA
µA
µA
µA
µA
µA
µA
µA
V/mV
V/mV
V/mV
dB
dB
dB
dB
V
dB
dB
V
mV
mV
mV
mV
mV
mV
mA
mA
mA
mA
mA
µA
µA
µA
V
V
ns
ns
MHz
V/µV
MHz
V+
105
105
2.3
15
65
170
30
110
350
±45
±40
11
0.4
0.3
170
120
1.2
● V + – 0.5
●
●
●
●
●
2.5
70
150
400
130
240
700
16
1.2
1.0
450
400
0.3
●
VSHDN = 0.3V to 4.5V, RL = 100Ω
VSHDN = 4.5V to 0.3V, RL = 100Ω
Frequency = 6MHz
VS= 5V, AV = –1, RL= 1k, VO = 4V
VS = 5V, VO = 4VP-P
22
1.8
4.0
0.9
2.1
3
80
50
250
80
6
5
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = ± 5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
VOS
Input Offset Voltage
∆VOS
IB
∆IB
IOS
∆IOS
en
in
CIN
AVOL
CMRR
PSRR
VOL
VOH
ISC
IS
ISHDN
VL
VH
tON
tOFF
GBW
SR
FPBW
HD
tS
∆G
∆θ
6
CONDITIONS
VCM = V +
VCM = V –
VCM = V + (LT1806 SOT-23)
VCM = V – (LT1806 SOT-23)
Input Offset Voltage Shift
VCM = V – to V +
VCM = V – to V + (LT1806 SOT-23)
Input Offset Voltage Match (Channel-to-Channel) VCM = V –, VCM = V +
(Note 10)
Input Bias Current
VCM = V +
VCM = V – + 0.2V
Input Bias Current Shift
VCM = V – + 0.2V to V +
Input Bias Current Match (Channel-to-Channel) VCM = V +
(Note 10)
VCM = V – + 0.2V
Input Offset Current
VCM = V +
VCM = V – + 0.2V
Input Offset Current Shift
VCM = V – + 0.2V to V+
Input Noise Voltage
0.1Hz to 10Hz
Input Noise Voltage Density
f = 10kHz
Input Noise Current Density
f = 10kHz
Input Capacitance
f = 100kHz
Large-Signal Voltage Gain
VO = –4V to 4V, RL = 1k
VO = –2.5V to 2.5V, RL = 100Ω
Common Mode Rejection Ratio
VCM = V – to V +
CMRR Match (Channel-to-Channel) (Note 10)
VCM = V – to V +
Input Common Mode Range
Power Supply Rejection Ratio
V+ = 2.5V to 10V, V – = 0V
PSRR Match (Channel-to-Channel) (Note 10)
V+ = 2.5V to 10V, V – = 0V
Output Voltage Swing LOW (Note 7)
No Load
ISINK = 5mA
ISINK = 25mA
Output Voltage Swing HIGH (Note 7)
No Load
ISOURCE = 5mA
ISOURCE = 25mA
Short-Circuit Current
Supply Current per Amplifier
Disable Supply Current
VSHDN = 0.3V
SHDN Pin Current
VSHDN = 0.3V
Shutdown Output Leakage Current
VSHDN = 0.3V
SHDN Pin Input Voltage LOW
SHDN Pin Input Voltage HIGH
Turn-On Time
VSHDN = 0.3V to 4.5V, RL = 100Ω
Turn-Off Time
VSHDN = 4.5V to 0.3V, RL = 100Ω
Gain Bandwidth Product
Frequency = 6MHz
Slew Rate
AV = –1, RL = 1k, VO = ±4V, Measured at VO = ±3V
Full Power Bandwidth
VO = 8VP-P
Harmonic Distortion
AV = 1, RL = 1k, VO = 2VP-P, fC = 5MHz
Settling Time
0.01%, VSTEP = 8V, AV = 1, RL = 1k
Differential Gain (NTSC)
AV = 2, RL = 150
Differential Phase (NTSC)
AV = 2, RL = 150
MIN
–14
100
10
83
77
V–
90
84
±40
TYP
100
100
100
100
50
50
200
MAX
700
700
750
750
700
750
1200
1
–5
6
0.03
0.05
0.03
0.04
0.07
800
3.5
1.5
2
300
27
106
106
5
V+
105
105
14
55
180
20
90
360
±85
11
0.4
150
0.3
V + – 0.5
170
70
19
1.4
3.2
0.7
1.6
2.3
80
50
325
140
5.5
–80
120
0.01
0.01
60
140
450
70
200
700
16
1.2
350
75
0.3
UNITS
µV
µV
µV
µV
µV
µV
µV
µA
µA
µA
µA
µA
µA
µA
µA
nVP-P
nV/√Hz
pA/√Hz
pF
V/mV
V/mV
dB
dB
V
dB
dB
mV
mV
mV
mV
mV
mV
mA
mA
mA
µA
µA
V
V
ns
ns
MHz
V/µs
MHz
dBc
ns
%
Deg
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the 0°C < TA < 70°C
temperature range. VS = ± 5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
TYP
MAX
UNITS
VOS
Input Offset Voltage
VCM = V +
VCM = V –
VCM = V + (LT1806 SOT-23)
VCM = V – (LT1806 SOT-23)
●
●
●
●
200
200
200
200
800
800
900
900
µV
µV
µV
µV
VOS TC
Input Offset Voltage Drift (Note 8)
VCM = V +
VCM = V –
●
●
1.5
1.5
5
5
∆VOS
Input Offset Voltage Shift
VCM = V – to V +
VCM = V – to V + (LT1806 SOT-23)
●
●
100
100
800
900
µV
µV
Input Offset Voltage Match (Channel-to Channel)
(Note 10)
VCM = V –, VCM = V +
●
300
1400
µV
Input Bias Current
VCM = V + – 0.2V
VCM = V – + 0.4V
●
●
1
–6
6
µA
µA
Input Bias Current Shift
VCM = V – + 0.4V to V + – 0.2V
●
7
21
µA
Input Bias Current Match (Channel-to-Channel)
(Note 10)
VCM = V + – 0.2V
VCM = V – + 0.4V
●
●
0.03
0.04
1.8
3.8
µA
µA
IOS
Input Offset Current
VCM = V + – 0.2V
VCM = V – + 0.4V
●
●
0.03
0.04
0.9
1.9
µA
µA
∆IOS
Input Offset Current Shift
VCM = V – + 0.4V to V + – 0.2V
●
0.07
2.8
µA
AVOL
Large-Signal Voltage Gain
VO = –4V to 4V, RL = 1k
VO = –2.5V to 2.5V, RL = 100Ω
●
●
80
8
250
25
V/mV
V/mV
CMRR
Common Mode Rejection Ratio
VCM = V – to V +
●
81
100
dB
= V – to V +
●
75
100
IB
∆IB
CMRR Match (Channel-to-Channel) (Note 10)
VCM
MIN
–15
µV/°C
µV/°C
dB
●
V–
Power Supply Rejection Ratio
V+ = 2.5V to 10V, V – = 0V
●
88
105
dB
PSRR Match (Channel-to-Channel) (Note 10)
V+ = 2.5V to 10V, V – = 0V
●
82
106
dB
VOL
Output Voltage Swing LOW (Note 7)
No Load
ISINK = 5mA
ISINK = 25mA
●
●
●
18
60
185
80
160
500
mV
mV
mV
VOH
Output Voltage Swing HIGH (Note 7)
No Load
ISOURCE = 5mA
ISOURCE = 25mA
●
●
●
40
110
360
140
240
750
mV
mV
mV
ISC
Short-Circuit Current
IS
Supply Current per Amplifier
Input Common Mode Range
PSRR
ISHDN
●
±35
V+
±75
V
mA
●
14
20
mA
Disable Supply Current
VSHDN = 0.3V
●
0.4
1.4
mA
SHDN Pin Current
VSHDN = 0.3V
●
160
400
µA
Shutdown Output Leakage Current
VSHDN = 0.3V
●
1
VL
SHDN Pin Input Voltage LOW
●
VH
SHDN Pin Input Voltage HIGH
● V + – 0.5
tON
Turn-On Time
VSHDN = 0.3V to 4.5V, RL = 100Ω
●
µA
0.3
V
V
80
ns
tOFF
Turn-Off Time
VSHDN = 4.5V to 0.3V, RL = 100Ω
●
50
ns
GBW
Gain Bandwidth Product
Frequency = 6MHz
●
150
300
MHz
SR
Slew Rate
AV = –1, RL = 1k, VO = ±4V,
Measure at VO = ±3V
●
60
120
V/µs
FPBW
Full Power Bandwidth
VO = 8VP-P
●
4.5
MHz
7
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the –40°C < TA < 85°C
temperature range. VS = ± 5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
TYP
MAX
UNITS
VOS
Input Offset Voltage
VCM = V +
VCM = V –
VCM = V + (LT1806 SOT-23)
VCM = V – (LT1806 SOT-23)
●
●
●
●
200
200
200
200
900
900
975
975
µV
µV
µV
µV
VOS TC
Input Offset Voltage Drift (Note 8)
VCM = V +
VCM = V –
●
●
1.5
1.5
5
5
∆VOS
Input Offset Voltage Shift
VCM = V – to V+
VCM = V – to V+ (LT1806 SOT-23)
●
●
100
100
900
975
µV
µV
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
VCM = V – to V+
●
300
1600
µV
Input Bias Current
VCM = V + – 0.2V
VCM = V – + 0.4V
●
●
1.2
–5
7
µA
µA
Input Bias Current Shift
VCM = V – + 0.4V to V + – 0.2V
●
6
23
µA
Input Bias Current Match (Channel-to-Channel)
(Note 10)
VCM = V + – 0.2V
VCM = V – + 0.4V
●
●
0.03
0.04
2.0
4.5
µA
µA
IOS
Input Offset Current
VCM = V + – 0.2V
VCM = V – + 0.4V
●
●
0.03
0.04
1.0
2.2
µA
µA
∆IOS
Input Offset Current Shift
VCM = V – + 0.4V to V + – 0.2V
●
0.07
3.2
AVOL
Large-Signal Voltage Gain
VO = –4V to 4V, RL = 1k
VO = –2V to 2V, RL =100Ω
●
●
60
7
175
17
V/mV
V/mV
CMRR
Common Mode Rejection Ratio
VCM = V – to V +
●
80
100
dB
V–
●
74
100
●
V–
●
86
105
●
80
105
IB
∆IB
CMRR Match (Channel-to-Channel) (Note 10)
VCM =
MIN
to V +
Input Common Mode Range
PSRR
Power Supply Rejection Ratio
V+ = 2.5V to 10V, V – = 0V
PSRR Match (Channel-to-Channel) (Note 10)
–16
µV/°C
µV/°C
µA
dB
V+
V
dB
dB
VOL
Output Voltage Swing LOW (Note 7)
No Load
ISINK = 5mA
ISINK = 20mA
●
●
●
20
65
200
100
170
500
mV
mV
mV
VOH
Output Voltage Swing HIGH (Note 7)
No Load
ISOURCE = 5mA
ISOURCE = 20mA
●
●
●
50
115
360
160
260
700
mV
mV
mV
ISC
Short-Circuit Current
●
IS
Supply Current
●
15
ISHDN
±25
±55
mA
22
mA
Disable Supply Current
VSHDN = 0.3V
●
0.45
1.5
mA
SHDN Pin Current
VSHDN = 0.3V
●
170
450
µA
Shutdown Output Leakage Current
VSHDN = 0.3V
●
1.2
µA
VL
SHDN Pin Input Voltage LOW
●
VH
SHDN Pin Input Voltage HIGH
● V + – 0.5
tON
Turn-On Time
VSHDN = 0.3V to 4.5V, RL = 100Ω
●
80
ns
tOFF
Turn-Off Time
VSHDN = 4.5V to 0.3V, RL = 100Ω
●
50
ns
GBW
Gain Bandwidth Product
Frequency = 6MHz
●
125
290
MHz
SR
Slew Rate
AV = –1, RL = 1k, VO = ±4V,
Measured at VO = ±3V
●
50
100
V/µs
FPBW
Full Power Bandwidth
VO = 8VP-P
●
4
MHz
Note 1: Absolute maximum ratings are those values beyond which the life
of the device may be impaired.
8
0.3
V
V
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 1.4V, the input current should be limited to less than
10mA.
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4: The LT1806C/LT1806I and LT1807C/LT1807I are guaranteed
functional over the temperature range of –40°C and 85°C.
Note 5: The LT1806C/LT1807C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1806C/LT1807C are designed,
characterized and expected to meet specified performance from –40°C to
85°C but are not tested or QA sampled at these temperatures. The
LT1806I/LT1807I are guaranteed to meet specified performance from
–40°C to 85°C.
Note 6: Minimum supply voltage is guaranteed by power supply rejection
ratio test.
Note 7: Output voltage swings are measured between the output and
power supply rails.
Note 8: This parameter is not 100% tested.
Note 9: Thermal resistance varies depending upon the amount of PC board
metal attached to the V – pin of the device. θJA is specified for a certain
amount of 2oz copper metal trace connecting to the V – pin as described in
the thermal resistance tables in the Applications Information section.
Note 10: Matching parameters are the difference between the two
amplifiers of the LT1807.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
VOS Distribution, VCM = 0V
(PNP Stage)
50
VOS Distribution, VCM = 5V
(NPN Stage)
50
VS = 5V, 0V
VCM = 0V
50
VS = 5V, 0V
VCM = 5V
30
20
10
30
20
10
0
–500
–300
100
300
–100
INPUT OFFSET VOLTAGE (µV)
–300
100
300
–100
INPUT OFFSET VOLTAGE (µV)
18067 G01
TA = 25°C
TA = –55°C
200
TA = 25°C
100
0
–100
TA = –55°C
–200
–300
1
2
3 4 5 6 7 8 9 10 11 12
TOTAL SUPPLY VOLTAGE (V)
18067 G04
–500
TA = 125°C
TA = 25°C
TA = –55°C
0
–5
TA = 125°C
TA = 25°C
TA = –55°C
VS = 5V, 0V
TYPICAL PART
–400
0
VS = 5V, 0V
TA = 125°C
INPUT BIAS CURRENT (µA)
10
OFFSET VOLTAGE (µV)
TA = 125°C
500
Input Bias Current
vs Common Mode Voltage
5
300
15
–300
100
300
–100
INPUT OFFSET VOLTAGE (µV)
18067 G03
500
400
SUPPLY CURRENT (mA)
0
–500
500
Offset Voltage
vs Input Common Mode
20
0
20
18067 G02
Supply Current per Amp
vs Supply Voltage
5
30
10
0
–500
500
VS = 5V, 0V
40
PERCENT OF UNITS (%)
40
PERCENT OF UNITS (%)
PERCENT OF UNITS (%)
40
∆VOS Shift for VCM = 0V to 5V
–10
0
1
3
4
2
INPUT COMMON MODE VOLTAGE (V)
5
18067 G05
–1
0
1
2
3
4
5
COMMON MODE VOLTAGE (V)
6
18067 G06
9
LT1806/LT1807
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output Saturation Voltage
vs Load Current (Output Low)
10
2
NPN ACTIVE
VS = 5V, 0V
VCM = 5V
0
–1
–2
–3
PNP ACTIVE
VS = 5V, 0V
VCM = 0V
–4
–5
–6
–7
–8
–50 –35 –20 – 5 10 25 40 55
TEMPERATURE (°C)
70
1
0.1
TA = 125°C
0.01
TA = 25°C
TA = –55°C
0.001
0.01
85
10
VS = ±5V
0.1
1
10
LOAD CURRENT (mA)
100
0.6
0.4
TA = 125°C
–0.2
–0.4
TA = 25°C
–0.6
TA = –55°C
–0.8
2.0 2.5 3.0 3.5 4.0 4.5
TOTAL SUPPLY VOLTAGE (V)
TA = 25°C
60
16
TA = 125°C
14
“SINKING”
40
20
0
–20
“SOURCING”
–40
TA = –55°C
–60
TA = 125°C
–80 TA = 25°C
5.0
4.0 4.5
2.0 2.5 3.0 3.5
POWER SUPPLY VOLTAGE (±V)
TA = 25°C
TA = –55°C
–120
8
6
0
VS = 3V, 0V
RL TO GND
300
200
RL = 1k
100
0
–100
RL = 100Ω
–200
200
100
–200
–300
–500
18067 G13
10
RL = 1k
0
–100
–400
5
VS = 5V, 0V
RL TO GND
400
–400
3
4
2
SHDN PIN VOLTAGE (V)
5
4
3
2
SHDN PIN VOLTAGE (V)
500
–300
1
1
18067 G12
–160
0
TA = –55°C
4
–140
–180
TA = 25°C
10
5.0
INPUT VOLTAGE (µV)
–80
TA = 125°C
2
300
–100
VS = 5V, 0V
Open-Loop Gain
400
TA = 125°C
100
12
Open-Loop Gain
500
–20
–60
0.1
1
10
LOAD CURRENT (mA)
18067 G11
VS = 5V, 0V
–40
TA = –55°C
0
1.5
INPUT VOLTAGE (µV)
SHDN PIN CURRENT (µA)
TA = –55°C
80
SHDN Pin Current
vs SHDN Pin Voltage
0
0.01
18
100
18067 G10
20
TA = 25°C
Supply Current
vs SHDN Pin Voltage
–100
–1.0
1.0 1.5
TA = 125°C
18067 G09
120
OUTPUT SHORT-CIRCUIT CURRENT (mA)
CHANGE IN OFFSET VOLTAGE (mV)
1.0
0
0.1
Output Short-Circuit Current
vs Power Supply Voltage
Minimum Supply Voltage
0.2
1
18067 G08
18067 G07
0.8
VS = ±5V
0.001
0.01
SUPPLY CURRENT (mA)
INPUT BIAS (µA)
OUTPUT SATURATION VOLTAGE (V)
1
Output Saturation Voltage
vs Load Current (Output High)
OUTPUT SATURATION VOLTAGE (V)
Input Bias Current vs Temperature
RL = 100Ω
–500
0
0.5
1.5
2.0
1.0
OUTPUT VOLTAGE (V)
2.5
3.0
18067 G14
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT VOLTAGE (V)
18067 G15
LT1806/LT1807
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Open-Loop Gain
2.5
VS = ±5V
2.0
200
RL = 1k
100
0
RL = 100Ω
–200
40
TA = 125°C
1.5
OFFSET VOLTAGE (mV)
300
INPUT VOLTAGE (µV)
45
OFFSET VOLTAGE DRIFT (µV)
VS = ±5V
400
–100
Warm-Up Drift vs Time (LT1806S8)
Offset Voltage vs Output Current
500
TA = 25°C
1.0
0.5
0
TA = –55°C
–0.5
–1.0
25
20
15
VS = ±2.5V
10
VS = ±1.5V
–300
–1.5
–400
–2.0
5
–2.5
–100 –80 –60 –40 –20 0 20 40 60 80 100
OUTPUT CURRENT (mA)
0
–500
–5 –4 –3 –2 –1 0 1 2 3
OUTPUT VOLTAGE (V)
4
5
18067 G16
0
20
40 60 80 100 120 140 160
TIME AFTER POWER-UP (SEC)
18067 G17
Input Noise Voltage vs Frequency
12
VS = ±5V
35
30
18067 G18
0.1Hz to 10Hz
Output Voltage Noise
Input Noise Current vs Frequency
12
VS = 5V, 0V
1000
VS = 5V, 0V
800
10
8
NPN ACTIVE
VCM = 4.5V
PNP ACTIVE
VCM = 2.5V
4
8
6
4
2
2
0
0
0.1
1
10
FREQUENCY (kHz)
PNP ACTIVE
VCM = 2.5V
1
10
FREQUENCY (kHz)
PHASE MARGIN
VS = ±5V
10
18067 G22
GAIN BANDWIDTH (MHz)
GBW PRODUCT
VS = ±5V
350
250
9
40
30
400
250
2 3 4 5 6 7 8
TOTAL SUPPLY VOLTAGE (V)
45
35
300
1
PHASE MARGIN
VS = 3V
200
–55 –35 –15
GBW PRODUCT
VS = 3V
5 25 45 65 85 105 125
TEMPERATURE (°C)
18067 G23
175
PHASE MARGIN (DEG)
PHASE MARGIN (DEG)
GAIN BANDWIDTH (MHz)
50
300
0
1
2
3
4 5 6
TIME (SEC)
7
8
9
10
Slew Rate vs Temperature
50
30
200
0
18067 G21
55
35
GAIN BANDWIDTH PRODUCT
100
55
40
350
–1000
Gain Bandwidth and Phase Margin
vs Temperature
45
400
–400
18067 G19
Gain Bandwidth and Phase Margin
vs Supply Voltage
PHASE MARGIN
0
–200
–800
18067 G19
TA = 25°C
200
–600
NPN ACTIVE
VCM = 4.5V
0.1
100
400
AV = –1
RF = RG = 1k
RL = 1k
150
SLEW RATE (µV/µs)
6
600
OUTPUT VOLTAGE (nV)
NOISE CURRENT (pA/√Hz)
NOISE VOLTAGE (nV/√Hz)
10
VS = ±5V
125
VS = ±2.5V
100
75
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
18067 G24
11
LT1806/LT1807
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Gain and Phase vs Frequency
Gain vs Frequency (AV = 1)
18
15
90
12
12
6
9
30
PHASE
VS = 3V
0
10
–45
0
–90
GAIN
VS = ±5V
–10
–20 CL = 5pF
RL = 100Ω
–30
1
0.1
10
FREQUENCY (MHz)
GAIN
VS = 3V
VS = ±5V
–6
VS = 3V
–12
–18
–3
–6
1
10
FREQUENCY (MHz)
100
100
COMMON MODE REJECTION RATIO (dB)
OUTPUT IMPEDANCE (Ω)
100
AV = 2
AV = 10
1
AV = 1
0.1
0.01
0.001
100k
1M
10M
FREQUENCY (Hz)
100M
80
70
60
50
40
30
20
10
0
0.01
500M
0.1
1
10
FREQUENCY (MHz)
500
ROS = 20Ω
30
25
20
15
35
80
70
POSITIVE SUPPLY
60
50
NEGATIVE SUPPLY
40
30
20
10
0
0.001
0.01
0.1
1
FREQUENCY (MHz)
10
100
18067 G30
OUTPUT
SETTLING
RESOLUTION
(2mV/DIV)
ROS = 10Ω
30
25
20
ROS = 20Ω
15
10
ROS = RL = 50Ω
ROS = RL = 50Ω
5
0
0
100
CAPACITIVE LOAD (pF)
1000
18067 G31
12
VS = 5V, 0V
TA = 25°C
90
INPUT SIGNAL
GENERATION
(2V/DIV)
40
ROS = 10Ω
10
100
0.01% Settling Time
VS = 5V, 0V
45 AV = 2
OVERSHOOT (%)
OVERSHOOT (%)
100
500
50
VS = 5V, 0V
45 AV = 1
5
100
18067 G27
Series Output Resistor
vs Capacitive Load
50
10
10
FREQUENCY (MHz)
18067 G29
Series Output Resistor
vs Capacitive Load
35
1
Power Supply Rejection Ratio
vs Frequency
VS = 5V, 0V
90
18067 G28
40
–9
0.1
500
Common Mode Rejection Ratio
vs Frequency
VS = 5V, 0V
VS = 3V
18067 G26
Output Impedance vs Frequency
10
0
–24
18067 G25
600
3
–180
–36
0.1
VS = ±5V
6
–135
–225
500
100
0
POWER SUPPLY REJECTION RATIO (dB)
20
CL = 10pF
18 RL = 100Ω
GAIN (dB)
45
GAIN (dB)
PHASE
VS = ±5V
40
GAIN (dB)
135
60
PHASE (DEG)
180
CL = 10pF
24 RL = 100Ω
21
225
50
Gain vs Frequency (AV = 2)
30
70
10
100
CAPACITIVE LOAD (pF)
1000
18067 G32
VS = ±5V
20ns/DIV
VOUT = ±4V
RL = 500Ω
tS = 120ns (SETTLING TIME)
18067 G33
LT1806/LT1807
U W
TYPICAL PERFOR A CE CHARACTERISTICS
–50
Distortion vs Frequency
–40
AV = 1
VOUT = 2VP-P
VS = ±5V
–50
DISTORTION (dBc)
DISTORTION (dBc)
–60
–70
RL = 100Ω, 2ND
–80
RL = 100Ω, 3RD
RL = 1k, 3RD
–90
RL = 1k, 2ND
AV = 1
VOUT = 2VP-P
VS = 5V, 0V
–50
RL = 100Ω, 3RD
–70
RL = 100Ω, 2ND
–80
RL = 1k, 2ND
–90
10
1
FREQUENCY (MHz)
10
–120
0.3
1
4.6
OUTPUT VOLTAGE SWING (VP-P)
RL = 100Ω, 2ND
–70
RL = 1k, 2ND
–80
RL = 1k, 3RD
–90
–100
–110
1
10
30
18067 G36
VS = 5V, 0V
4.5
AV = –1
4.4
4.3
AV = +2
4.2
4.1
4.0
3.9
0.1
30
FREQUENCY (MHz)
1
10
FREQUENCY (MHz)
18067 G37
±5V Large-Signal Response
100
18067 G38
±5V Small-Signal Response
0V
10
Maximum Undistorted Output
Signal vs Frequency
–60
DISTORTION (dBc)
30
18067 G35
AV = 2
VOUT = 2VP-P
VS = 5V, 0V RL = 100Ω, 3RD
–120
0.3
RL = 1k, 3RD
FREQUENCY (MHz)
Distortion vs Frequency
–50
RL = 1k, 2ND
–90
FREQUENCY (MHz)
18067 G34
–40
RL = 100Ω, 2ND
–80
–110
–110
0.3
30
RL = 100Ω, 3RD
–70
–100
–100
1
AV = 2
VOUT = 2VP-P
VS = ±5V
–60
–60
RL = 1k, 3RD
–100
–110
0.3
Distortion vs Frequency
–40
DISTORTION (dBc)
Distortion vs Frequency
–40
5V Large-Signal Response
0V
0.5V
VS = ±5V
FREQ = 1.92MHz
AV = 1
RL = 1k
40ns/DIV
18067 G39
VS = ±5V
FREQ = 4.48MHz
AV = 1
RL = 1k
20ns/DIV
18067 G40
VS = 5V, 0V
FREQ = 5.29MHz
AV = 1
RL = 1k
20ns/DIV
18067 G41
13
LT1806/LT1807
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TYPICAL PERFOR A CE CHARACTERISTICS
5V Small-Signal Response
Output Overdriven Recovery
0V
10ns/DIV
VIN
(1V/DIV)
VSHDN
(2V/DIV)
0V
VOUT
(2V/DIV)
0V
0V
VOUT
(2V/DIV)
0V
VS = 5V, 0V
AV = 2
RL = 1k
18067 G42
100ns/DIV
VS = 5V, 0V
AV = 2
RL = 100Ω
18067 G43
200ns/DIV
18067 G44
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VS = 5V, 0V
AV = 1
RL = 1k
Shutdown Response
U U
APPLICATIO S I FOR ATIO
Rail-to-Rail Characteristics
The LT1806/LT1807 have input and output signal range
that covers from negative power supply to positive power
supply. Figure 1 depicts a simplified schematic of the
amplifier. The input stage is comprised of two differential
amplifiers, a PNP stage Q1/Q2 and a NPN stage Q3/Q4 that
are active over different ranges of common mode input
voltage. The PNP differential pair is active between the
negative supply to approximately 1.5V below the positive
supply. As the input voltage moves closer toward the
positive supply, the transistor Q5 will steer the tail current
I1 to the current mirror Q6/Q7, activating the NPN differential pair. The PNP pair becomes inactive for the rest of
the input common mode range up to the positive supply.
A pair of complementary common emitter stages Q14/
Q15 that enable the output to swing from rail to rail
constructs the output stage. The capacitors C1 and C2
form the local feedback loops that lower the output
V+
R6
40k
R3
Q16
V+
Q17
V+
ESDD5
D9
SHDN
R7
100k
R4
R5
V–
ESDD1
+
D1
ESDD2
Q12
Q11
I1
Q13
+IN
D6
D8
D5
D7
ESDD6
V–
–IN
Q5
I2
OUT
CC
D3
BUFFER
AND
OUTPUT BIAS
Q10
V+
D4
Q9
Q8
C1
Q7
Q14
Q6
R1
V–
R2
18067 F01
Figure 1. LT1806 Simplified Schematic Diagram
14
V–
Q1 Q2
ESDD3
V–
+
VBIAS
Q4 Q3
ESDD4
BIAS
GENERATION
D2
Q15
C2
LT1806/LT1807
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APPLICATIO S I FOR ATIO
impedance at high frequency. These devices are fabricated on Linear Technology’s proprietary high speed
complementary bipolar process.
Power Dissipation
The LT1806/LT1807 amplifiers combine high speed with
large output current in a small package, so there is a need
to ensure that the die’s junction temperature does not
exceed 150°C. The LT1806 is housed in an SO-8 package
or a 6-lead SOT-23 package and the LT1807 is in an SO-8
or 8-lead MSOP package. All packages have the V – supply
pin fused to the lead frame to enhance the thermal conductance when connecting to a ground plane or a large metal
trace. Metal trace and plated through-holes can be used to
spread the heat generated by the device to the backside of
the PC board. For example, on a 3/32" FR-4 board with 2oz
copper, a total of 660 square millimeters connects to Pin␣ 4
of LT1807 in an SO-8 package (330 square millimeters on
each side of the PC board) will bring the thermal resistance, θJA, to about 85°C/W. Without extra metal trace
beside the power line connecting to the V – pin to provide
a heat sink, the thermal resistance will be around 105°C/W.
More information on thermal resistance for all packages
with various metal areas connecting to the V – pin is
provided in Tables 1, 2 and 3.
Table 1. LT1806 6-Lead SOT-23 Package
COPPER AREA
TOPSIDE (mm2)
BOARD AREA
(mm2)
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
270
2500
135°C/W
100
2500
145°C/W
20
2500
160°C/W
0
2500
200°C/W
Device is mounted on topside.
Table 2. LT1806/LT1807 SO-8 Package
COPPER AREA
TOPSIDE
BACKSIDE
(mm2)
(mm2)
Table 3. LT1807 8-Lead MSOP Package
COPPER AREA
TOPSIDE
BACKSIDE
(mm2)
(mm2)
BOARD AREA THERMAL RESISTANCE
(mm2)
(JUNCTION-TO-AMBIENT)
540
540
2500
110°C/W
100
100
2500
120°C/W
100
0
2500
130°C/W
30
0
2500
135°C/W
0
0
2500
140°C/W
Device is mounted on topside.
Junction temperature TJ is calculated from the ambient
temperature TA and power dissipation PD as follows:
TJ = TA + (PD • θJA)
The power dissipation in the IC is the function of the supply
voltage, output voltage and the load resistance. For a given
supply voltage, the worst-case power dissipation PD(MAX)
occurs at the maximum quiescent supply current and at
the output voltage which is half of either supply voltage (or
the maximum swing if it is less than 1/2 the supply
voltage). PD(MAX) is given by:
PD(MAX) = (VS • IS(MAX)) + (VS/2)2/RL
Example: An LT1807 in SO-8 mounted on a 2500mm 2
area of PC board without any extra heat spreading plane
connected to its V – pin has a thermal resistance of
105°C/W, θJA. Operating on ±5V supplies with both
amplifiers simultaneously driving 50Ω loads, the worstcase power dissipation is given by:
PD(MAX) = 2 • (10 • 14mA) + 2 • (2.5)2/50
= 0.28 + 0.25 = 0.53W
The maximum ambient temperature that the part is
allowed to operate is:
TA = TJ – (PD(MAX) • 105°C/W)
BOARD AREA
(mm2)
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
1100
1100
2500
65°C/W
330
330
2500
85°C/W
35
35
2500
95°C/W
35
0
2500
100°C/W
0
0
2500
105°C/W
= 150°C – (0.53W • 105°C/W) = 94°C
To operate the device at higher ambient temperature,
connect more metal area to the V – pin to reduce the
thermal resistance of the package as indicated in Table 2.
Device is mounted on topside.
15
LT1806/LT1807
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APPLICATIO S I FOR ATIO
Input Offset Voltage
The offset voltage will change depending upon which input
stage is active and the maximum offset voltage is guaranteed to less than 550µV. To maintain the precision characteristics of the amplifier, the change of VOS over the entire
input common mode range (CMRR) is limited to be less
than 550µV on a single 5V and 3V supply.
Input Bias Current
The input bias current polarity depends on a given input
common voltage at which the input stage is operating.
When the PNP input stage is active, the input bias currents
flow out of the input pins. When the NPN input stage is
activated, the input bias current flows into the input pins.
Because the input offset current is less than the input bias
current, matching the source resistances at the input pins
will reduce total offset error.
Output
The LT1806/LT1807 can deliver a large output current, so
the short-circuit current limit is set around 90mA to
prevent damage to the device. Attention must be paid to
keep the junction temperature of the IC below the absolute
maximum rating of 150°C (refer to the Power Dissipation
section) when the output is continuously short-circuited.
The output of the amplifier has reverse-biased diodes
connected to each supply. If the output is forced beyond
either supply, unlimited current will flow through these
diodes. If the current is transient and limited to one
hundred milliamps or less, no damage to the device will
occur.
Overdrive Protection
When the input voltage exceeds the power supplies, two
pairs of crossing diodes D1 to D4 will prevent the output
from reversing polarity. If the input voltage exceeds either
power supply by 700mV, diode D1/D2 or D3/D4 will turn
on to keep the output at the proper polarity. For the phase
reversal protection to perform properly, the input current
must be limited to less than 5mA. If the amplifier is
16
severely overdriven, an external resistor should be used to
limit the overdrive current.
The LT1806/LT1807’s input stages are also protected
against large differential input voltages of 1.4V or higher
by a pair of back-to-back diodes, D5/D8, that prevent the
emitter-base breakdown of the input transistors. The
current in these diodes should be limited to less than
10mA when they are active. The worst-case differential
input voltage usually occurs when the input is driven while
the output is shorted to ground in a unity gain configuration. In addition, the amplifier is protected against ESD
strikes up to 3kV on all pins by a pair of protection diodes,
ESDD1 to ESDD6, on each pin that are connected to the
power supplies as shown in Figure 1.
Capacitive Load
The LT1806/LT1807 are optimized for high bandwidth and
low distortion applications. They can drive a capacitive
load of about 20pF in a unity-gain configuration, and more
for higher gain. When driving a larger capacitive load, a
resistor of 10Ω to 50Ω should be connected between the
output and the capacitive load to avoid ringing or oscillation. The feedback should still be taken from the output so
that the resistor will isolate the capacitive load to ensure
stability. Graphs on capacitive loads indicate the transient
response of the amplifier when driving the capacitive load
with a specified series resistor.
Feedback Components
When feedback resistors are used to set up gain, care must
be taken to ensure that the pole formed by the feedback
resistors and the total capacitance at the inverting input
does not degrade stability. For instance, the LT1806/
LT1807 in a noninverting gain of 2, set up with two 1k
resistors and a capacitance of 3pF (part plus PC board) will
probably ring in transient response. The pole is formed at
106MHz that will reduce phase margin by 34 degrees
when the crossover frequency of the amplifier is around
70MHz. A capacitor of 3pF or higher connected across the
feedback resistor will eliminate any ringing or oscillation.
LT1806/LT1807
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APPLICATIO S I FOR ATIO
SHDN Pin
The LT1806 has a SHDN pin to reduce the supply current
to less than 0.9mA. When the SHDN pin is pulled low, it will
generate a signal to power down the device. If the pin is left
unconnected, an internal pull-up resistor of 40k will keep
the part fully operating as shown in Figure 1. The output
will be high impedance during shutdown, and the turn-on
and turn-off time is less than 100ns. Because the input is
protected by a pair of back to back diodes, the input signal
will feed through to the output during shutdown mode if
the amplitude of signal between the inputs is larger than
1.4V.
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TYPICAL APPLICATIO S
Driving A/D Converter
The LT1806/LT1807 have 60ns settling time to 0.01% on
a 2V step signal, and 20Ω output impedance at 100MHz,
that makes them ideal for driving high speed A/D converters. With the rail-to-rail input and output, and low supply
voltage operation, the LT1806/LT1807 are also desirable
for single supply applications. As shown in the application
on the front page of this data sheet, the LT1807 drives a
10Msps, 12-bit, LTC1420 ADC in a gain of 20. Driving the
LTC1420 differentially will optimize the signal-to-noise
ratio, SNR, and the total harmonic distortion, THD, of the
A/D converter. The lowpass filter, R5, R6 and C3 reduce
noise or distortion products that might come from the
input signal. High quality capacitors and resistors, NPO
chip capacitor and metal film surface mount resistors,
should be used since these components can add to
distortion. The voltage glitch of the converter, due to its
sampling nature is buffered by the LT1807, and the ability
of the amplifier to settle it quickly will affect the spurious
free dynamic range of the system. Figure 2 depicts the
LT1806 driving LTC1420 at noninverting gain of 2 configuration. The FFT responses show a better than 92dB of
spurious free dynamic range, SFDR.
0
VS = ±5V
AV = 2
fSAMPLE = 10Msps
fIN = 1.4086MHz
SFDR = 92.5dB
–20
VIN
1.5VP-P
+
R3
49.9Ω
LT1806
+AIN
C1
470pF
–
–5V
–AIN
LTC1420
PGA GAIN = 1
REF = 2.048V
R2
1k
•
•
•
18067 F02
12 BITS
10Msps
AMPLITUDE (dB)
5V
5V
–40
–60
–80
–100
–5V
–120
R1
1k
0
1
2
3
FREQUENCY (MHz)
5
4
18067 F03
Figure 2. Noninverting A/D Driver
Figure 3. 4096 Point FFT Response
17
LT1806/LT1807
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TYPICAL APPLICATIO S
resistor, R5. The back termination will eliminate any
reflection of the signal that comes from the load. The input
termination resistor, RT, is optional—it is used only if
matching of the incoming line is necessary. The values of
C1, C2 and C3 are selected to minimize the droop of the
luminance signal. In some less stringent requirements,
the value of capacitors could be reduced. The – 3dB
bandwidth of the driver is about 90MHz on 5V supply, and
the amount of peaking will vary upon the value of capacitor
C4.
Single Supply Video Line Driver
The LT1806/LT1807 are wideband rail-to-rail op amps
with large output current that allows them to drive video
signals in low supply applications. Figure 4 depicts a
single supply video line driver with AC coupling to minimize the quiescent power dissipation. Resistors R1 and
R2 are used to level-shift the input and output to provide
the largest signal swing. The gain of 2 is set up with R3 and
R4 to restore the signal at VOUT, which is attenuated by 6dB
due to the matching of the 75Ω line with the back-terminated
5V
+
R1
5k
VIN
RT
75Ω
3
R2
5k
C3
1000µF
7
+
6
LT1806
2
–
4
75Ω
COAX CABLE
VOUT
RLOAD
75Ω
R4
1k
18067 F04
C4
3pF
R3
1k
+
R5
75Ω
+
C1
33µF
C2
150µF
Figure 4. 5V Single Supply Video Line Driver
5
4
VS = 5V, 0V
VOLTAGE GAIN (dB)
3
2
1
0
–1
–2
–3
–4
–5
0.2
1
10
FREQUENCY (MHz)
100
18067 F05
Figure 5. Video Line Driver Frequency Response
18
LT1806/LT1807
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TYPICAL APPLICATIO S
Single 3V Supply, 4MHz, 4th Order Butterworth Filter
Benefiting from a low voltage supply operation, low distortion and rail-to-rail output of LT1806/LT1807, a low distortion filter that is suitable for antialiasing can be built as
shown in Figure 6.
On a 3V supply, the filter built with LT1807 has a passband
of 4MHz with 2.5VP-P signal and stopband that is greater
than 70dB to frequency of 100MHz. As an option to
minimize the DC offset voltage at the output, connect a
series resistor of 365Ω and a bypass capacitor at the
noninverting inputs of the amplifiers as shown in Figure 6.
232Ω
274Ω
47pF
22pF
232Ω
665Ω
–
VIN
220pF
VS
+
365Ω
(OPTIONAL)
2
274Ω
562Ω
–
1/2 LT1807
470pF
1/2 LT1807
VOUT
+
18067 F06
4.7µF
(OPTIONAL)
Figure 6. Single 3V Supply, 4MHz, 4th Order Butterworth Filter
10
0
–10
GAIN (dB)
–20
–30
–40
–50
–60
–70
–80
VS = 3V, 0V
VIN = 2.5VP-P
–90
10k
100k
1M
10M
FREQUENCY (Hz)
100M
18067 F07
Figure 7. Filter Frequency Response
19
LT1806/LT1807
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TYPICAL APPLICATIO S
edge and the crystal capacitance (middle trace of Figure␣ 9). Sinusoid amplitude stability is maintained by the
fact that the sine wave is basically a filtered version of the
square wave; the usual amplitude control loops associated with sinusoidal oscillators are not immediately necessary.1 One can make use of this sine wave by buffering
and filtering it, and this is the combined task of the LT1806.
It is configured as a bandpass filter with a Q of 5 and does
a good job of cleaning up and buffering the sine wave.
Distortion was measured at –70dBc and – 60dBc on the
second and third harmonics.
1MHz Series Resonant Crystal Oscillator with Square
and Sinusoid Outputs
Figure 8 shows a classic 1MHz series resonant crystal
oscillator. At series resonance, the crystal is a low impedance and the positive feedback connection is what brings
about oscillation at the series resonance frequency. The
RC feedback around the other path ensures that the circuit
does not find a stable DC operating point and refuse to
oscillate. The comparator output is a 1MHz square wave
with a measured jitter of 28psRMS with a 5V supply and
40psRMS with a 3V supply. On the other side of the crystal,
however, is an excellent looking sine wave except for the
fact of the small high frequency glitch caused by the fast
1k
1MHZ
AT-CUT
R4
210Ω
1Amplitude will be a linear function of comparator output swing, which is supply dependent and
therefore controllable. The important difference here is that any added amplitude stabilization loop
will not be faced with the classical task of avoiding regions of nonoscillation versus clipping.
C4
100pF
R5
6.49k
C3
100pF
VS
R1
1k
R2
1k
R7
15.8k
R6
162Ω
100pF
VS
2
1
+
R9
2k
7
3
–
LE
5
8
4
7
–
LT1806
C2
0.1µF
SQUARE WAVE
2
3
VS
LT1713
VS
+
R8
2k
6
4
18067 F08
6
R3
1k
VS = 2.7V TO 6V
C1
0.1µF
Figure 8. LT1713 Comparator is Configured as a Series Resonant Crystal Oscillator.
The LT1806 Op Amp is Configured in a Q = 5 Bandpass Filter with fC = 1MHz
3V/DIV
1V/DIV
1V/DIV
200ns/DIV
1806 F09
Figure 9. Oscillator Waveforms with VS = 3V. Top Trace is Comparator Output.
Middle Trace is Crystal Feedback to Pin 2 at LT1713. Bottom Trace is Buffered,
Inverted and Bandpass Filtered with a Q of 5 by the LT1806
20
SINE WAVE
1 (NC)
LT1806/LT1807
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S6 Package
6-Lead Plastic SOT-23
(LTC DWG # 05-08-1634)
2.80 – 3.00
(0.110 – 0.118)
(NOTE 3)
2.6 – 3.0
(0.110 – 0.118)
1.50 – 1.75
(0.059 – 0.069)
0.35 – 0.55
(0.014 – 0.022)
0.09 – 0.20
(0.004 – 0.008)
(NOTE 2)
1.90
(0.074)
REF
0.00 – 0.15
(0.00 – 0.006)
0.95
(0.037)
REF
0.90 – 1.45
(0.035 – 0.057)
0.35 – 0.50
0.90 – 1.30
(0.014 – 0.020)
(0.035 – 0.051)
S6 SOT-23 0898
SIX PLACES (NOTE 2)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DIMENSIONS ARE INCLUSIVE OF PLATING
3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
4. MOLD FLASH SHALL NOT EXCEED 0.254mm
5. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)
21
LT1806/LT1807
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7 6
5
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
1
2 3
4
0.043
(1.10)
MAX
0.007
(0.18)
0° – 6° TYP
0.021 ± 0.006
(0.53 ± 0.015)
SEATING
PLANE
0.009 – 0.015
(0.22 – 0.38)
0.0256
(0.65)
BSC
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
22
0.034
(0.86)
REF
0.005 ± 0.002
(0.13 ± 0.05)
MSOP (MS8) 1100
LT1806/LT1807
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2
3
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SO8 1298
23
LT1806/LT1807
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TYPICAL APPLICATIO
FET Input, Fast, High Gain Photodiode Amplifier
noise was below 1mVRMS measured over a 10MHz
bandwidth. Table 4 shows results achieved with various
values of RF and Figure 11 shows the time domain
response with RF = 499k.
Figure 10 shows a fast, high gain transimpedance amplifier applied to a photodiode. A JFET buffer is used for its
extremely low input bias current and high speed. The
LT1097 and 2N3904 keep the JFET biased at IDSS for zero
offset and lowest voltage noise. The JFET then drives the
LT1806, with RF closing the high speed loop back to the
JFET input and setting the transimpedance gain. C4 helps
improve the phase margin of the fast loop. Output voltage
noise density was measured as 9nV/√Hz with RF short
circuited. With RF varied from 100k to 1M, total output
Table 4. Results Achieved for Various RF, 1.2V Output Step
VS+
100k
64ns
6.8MHz
200k
94ns
4.6MHz
499k
154ns
3MHz
1M
263ns
1.8MHz
C4
3pF
VS+
R2
1M
VS–
VS+
2
+
–
4
VS–
–
7
LT1806
C1
100pF
3
7
LT1097
2
–3dB
BANDWIDTH
*
R1
10M
3
10% to 90%
RISE TIME
RF
2N5486
SIEMENS/
INFINEON
SFH213FA
PHOTODIODE
RF
6
+
6
49.9Ω
VOUT
50Ω
4
VS–
18067 F10
R3
10k
C2
2200pF
2N3904
C3
0.1µF
R4
2.4k
R5
33Ω
*ADJUST PARASITIC CAPACITANCE AT
RF FOR DESIRED RESPONSE
CHARACTERISTICS
VS = ±5V
VS–
Figure 10. Fast, High Gain Photodiode Amplifier
100mV/DIV
200ns/DIV
18067 F11
Figure 11. Step Response with RF = 499k
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1395
400MHz Current Feedback Amplifier
800V/µs Slew Rate, Shutdown
LT1399
Triple 300MHz Current Feedback Amplifier
0.1dB Gain Flatness to 150MHz, Shutdown
LT1632/LT1633
Dual/Quad 45MHz, 45V/µs Rail-to-Rail Input and Output Amplifiers High DC Accuracy 1.35mV VOS(MAX), 70mA Output Current,
Max Supply Current 5.2mA/Amp
LT1809/LT1810
Single/Dual 180MHz Input and Output Rail-to-Rail Amplifiers
24
Linear Technology Corporation
350V/µs Slew Rate, Shutdown, Low Distortion – 90dBc at 5MHz
18067f LT/LCG 1200 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 2000