ETC PT6921A

PT6920 Series
25 Watt 5V Input Dual Output
Integrated Switching Regulator
SLTS042A
(Revised 6/30/2000)
• Dual Outputs:
The PT6920 is a series of 25W
dual output ISRs that were purposely
designed to power the latest generation DSP chips. Both output voltages
are independently adjustable, allowing
either output voltages to be changed
to accomodate a DSP upgrade. The
internal power sequencing of both
outputs meet the requirements of TI’s
‘C6000 series DSPs.
+3.3V/6A
+2.5V/2.2A or +1.8V/1.5A
•
•
•
•
•
•
•
Adjustable Output Voltage
Remote Sense (both outputs)
Standby Function
Over-Temperature Protection
Soft-Start
Internal Sequencing
23-pin SIPPackage
Patent Pending*
Pin-Out Information
Standard Application
C 1 = Req’d 560µF electrolytic (1)
C 2 = Req’d 330µF electrolytic (1)
C 3 = Optional 100µF electrolytic
V2 Sense
STBY
V1 Sense
3
22
1
V2OUT
18-21
VIN
4,5,6
PT6920
7-11
16
V1OUT
12-15
23
C1
R3
R1
C2
R4
GND
+
C3
+
R2
GND
Note:
for PT6921 only:
with pin 23 open, V2out=2.5V
with pin 23 shorted to pin 22, V2out=1.8V
Ordering Information
PT6921❏
❏ = +3.3 Volts
+2.5/+1.8 Volts
❏ = +3.3 Volts
PT6922❏
+1.5 Volts
Pin Function
Pin
Function
1
V1 Remote Sense
13
V 1out
2
Do Not Connect
14
V 1out
3
STBY
15
V 1out
4
Vin
16
V 1 Adjust
5
Vin
17
Do Not Connect
6
Vin
18
V 2out
7
GND
19
V 2out
8
GND
20
V 2out
9
GND
21
V 2out
10
GND
22
V 2 Remote Sense
11
GND
23
V 2 Adjust*
12
V1out
PT Series Suffix (PT1234X)
Case/Pin
Configuration
Vertical Through-Hole
N
Horizontal Through-Hole A
Horizontal Surface Mount C
(For dimensions and PC board layout,
see Package Styles 1100 and 1110.)
Specifications
PT6920 SERIES
Characteristics
(Ta= 25°C unless noted)
Symbols
Output Current
Io
Conditions
Ta = +60°C, 200 LFM, pkg N
Min
Typ
Max
Units
—
—
—
—
5.5 (3)
2.2 (3)
1.75(3)
1.2 (3)
A
0.1
0
0
0
—
—
—
—
6.0
2.2
1.75
1.2
A
V1 = 3.3V
V2 = 2.5V
V2 = 1.8V
V2 = 1.2V
0.1
0
0
0
Ta = +25°C, natural convection V1 = 3.3V
V2 = 2.5V
V2 = 1.8V
V2 = 1.2V
(2)
Input Voltage Range
Vin
0.1A ≤ Io ≤ I max
4.5
—
5.5
V
Output Voltage Tolerance
∆Vo
Vin = +5V, Io = Imax, both outputs
0°C ≤ Ta ≤ +65°C
Vo-0.1
—
Vo+0.1
V
Line Regulation
Regline
4.5V ≤ Vin ≤ 5.5V, Io = Imax
V1 = 3.3V
V2 = 2.5V
—
—
±7
±7
±17
±13
mV
Load Regulation
Regload
Vin = +5V, 0.1 ≤ Io ≤ Imax
V1 = 3.3V
V2 = 2.5V
—
—
±17
±4
±33
±10
mV
Vo Ripple/Noise
Vn
Vin = +5V, Io = Imax
V1 = 3.3V
V2 = 2.5V
—
—
50
25
—
—
mV
Transient Response
with C2 = 330µF
ttr
Vos
Io step between 0.5xImax and Imax
Vo over/undershoot
V1 = 3.3V
V2 = 2.5V
—
—
—
25
60
60
—
—
—
mV
Efficiency
η
Vin = +5V, Io = 4A total
—
75
—
%
Switching Frequency
ƒo
4.5V ≤ Vin ≤ 5.5V
0.1A ≤ Io ≤ I max
475
600
725
kHz
Absolute Maximum
Operating Temperature Range
Ta
Over Vin Range
–40
—
+85 (5)
°C
(4)
µSec
Storage Temperature
Ts
—
-40
—
+125
°C
Weight
—
Vertical/Horizontal
—
29
—
grams
Notes: (1)
(2)
(3)
(4)
(5)
The PT6920 series requires a 560µF electrolytic capacitor on the input and a 330µF electrolytic capacitor on the output for proper operation in all applications.
Iomin current of 0.1A can be divided btween both outputs; V1, or V2. The ISR will operate down to no-load with reduced specifications.
Iomax listed for each output assumes the maximum current drawn simultaneously on both outputs. Consult the factory for the absolute maximum.
For operating temperatures below 0°C, use tantalum type capacitors on both the input and output.
See Safe Operating Area curves for appropriate derating.
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
Typical Characteristics
PT6920 Series
25 Watt 5V Input Dual Output
Integrated Switching Regulator
PT6921, V2out = 2.5V, I2out = 2.2A
(See Note A)
Total Efficiency vs I1out
100
90
Efficiency (%)
Vin
80
4 .5 V
5 .0 V
5 .5 V
70
60
50
40
0
1
2
3
4
5
6
I1out (A)
Total Power Dissipation vs I1out
10
8
PD (Watts)
Vin
4 .5 V
6
5 .0 V
5 .5 V
4
2
0
0
1
2
3
4
5
6
I1out (A)
V1out Ripple vs I1out
50
40
Ripple (mV)
Vin
4 .5 V
30
5 .0 V
5 .5 V
20
10
0
0
1
2
3
4
5
6
I1out (A)
Safe Operating Area vs I1out (See Note B)
90
80
Ta (°C)
70
N at co nv.
6 0 LF M
2 0 0L F M
60
50
40
30
0
1
2
3
4
5
6
I1out (A)
Note A: All characteristic data listed in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating conditions.
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
A pplication Notes
PT6920/PT6930 Series
Adjusting the Output Voltage of the PT6920 and
PT6930 Dual Output Voltage ISRs
Each output voltage from the PT6920 and PT6930 series
of ISRs can be independantly adjusted higher or lower
than the factory trimmed pre-set voltage. V1 (the voltage
at V1out), or V2 (the voltage at V2out) may each be adjusted either up or down using a single external resistor 2.
Table 1 gives the adjustment range for both V1 and V2 for
each model in the series as Va(min) and Va(max). Note
that V2 must always be lower than V1 3.
V1 Adjust Up:
To increase the output, add a resistor
R4 between pin 16 (V1 Adjust) and pins 7-11 (GND) 2.
5. If V1 is increased above 3.3V, the minimum input
voltage to the ISR must also be increased. The
minimum required input voltage must be (V1 + 1.2)V
or 4.5V, whichever is greater. Do not exceed 5.5V
6. Never connect capacitors to either the V1 Adjust or
V2 Adjust pins. Any capacitance added to these
control pins will affect the stability of the respective
regulated output.
7. Adjusting either voltage (V1 or V2) may increase the
power dissipation in the regulator, and
correspondingly change the maximum current
available at either output. Consult the factory for
application assistance.
The adjust up and adjust down resistor values can also be
calculated using the following formulas. Be sure to select
the correct formula parameter from Table 1 for the output
and model being adjusted.
Ro (Va – 1)
– Rs kΩ
(R1) or (R3) =
Vo – Va
V1 Adjust Down:
Add a resistor (R3), between pin 16
(V1 Adjust) and pin 1 (V1 Remote Sense) 2.
V2 Adjust Up:
Add a resistor R2 between pin 23
(V2 Adjust) and pins 7-11 (GND) 2.
V2 Adjust Down:
Add a resistor (R1) between pin 23
(V2 Adjust) and pin 22 (V2 Remote Sense) 2.
R2 or R4
Refer to Figure 1 and Table 2 for both the placement and value
of the required resistor.
Notes:
1. The output voltages, V1out and V2out, may be
adjusted independantly.
2. Use only a single 1% resistor in either the (R3) or R4
location to adjust V1, and in the (R1) or R2 location
to adjust V2. Place the resistor as close to the ISR as
possible.
3. V2 must always be at least 0.2V lower than V1.
4. V2 on both the PT6921 and PT6931 models may be
adjusted from 2.5V to 1.8V by simply connecting pin
22 (V2 Remote Sense) to pin 23 (V2 Adjust). For
more details, consult the data sheet.
Where:
Ro
Va – Vo
=
Vo
Va
Ro
Rs
– Rs
= Original output voltage, (V1 or V2)
= Adjusted output voltage
= The resistance value from Table 1
= The series resistance from Table 1
Table 1
PT6920 ADJUSTMENT RANGE AND FORMULA PARAMETERS
Output Bus
Ser ies Pt #
Standar d Case
Excalibur Case
Adj. Resistor
V1 out
V2 out
PT6921/22
PT6931/32
(R3)/R4
PT6921
PT6931
(R1)/R2
PT6922
PT6932
(R1)/R2
Vo(nom)
Va(min)
3.3V
2.5V
1.5
2.3V
1.8V
1.2
Va(max)
3.6V
3.0V
Ro (kΩ
Ω)
Ω)
Rs (kΩ
22
10.0
9.76
12.1
11.5
6.49
1
V 1 (sns)
V 2 out
4,5,6
Vin
V 1 out
STBY
3
+
18 - 21
V 2 out
12 - 15
V 1 out
PT6920
Vin
GND
7 - 11
Vo 2 (adj) Vo 1 (adj)
23
16
(R3)
Adj Down
(R1)
C1
+
C2
R4
Adjust Up
+
C3
L
O
A
D
L
O
A
D
R2
COM
COM
Adjust V1out
For technical suppor t and mor e infor mation, see inside back cover or visit www.ti.com/power tr ends
3.0
12.1
Figur e 1
V 2 (sns)
kΩ
Adjust V2out
A pplication Notes continued
PT6920/PT6930 Series
Table 2
PT6920/PT6930 ADJUSTMENT RESISTOR VALUES
Output Bus
V1 out
Ser ies Pt#
Standar d Case PT6921/6922
Excalibur Case PT6931/6932
Adj Resistor
(R3)/R4
Vo(nom)
3.3Vdc
V2 out
PT6921
PT6931
(R1)/R2
2.5Vdc
Va(r eq’d)
1.2
PT6922
PT6932
(R1)/R2
1.5Vdc
(0.0)kΩ
1.25
(3.3)kΩ
1.3
(8.2)kΩ
1.35
(16.3)kΩ
1.4
(32.6)kΩ
1.45
(81.4)kΩ
1.5
1.55
189.0kΩ
1.6
91.1kΩ
1.65
58.6kΩ
1.7
42.3kΩ
1.75
32.6kΩ
1.8
(0.0)kΩ
26.0kΩ
1.85
(1.6)kΩ
21.4kΩ
1.9
(3.5)kΩ
17.9kΩ
1.95
(5.8)kΩ
15.2kΩ
2.0
(8.5)kΩ
13.0kΩ
2.05
(11.8)kΩ
11.3kΩ
2.1
(16.0)kΩ
9.8kΩ
2.15
(21.4)kΩ
8.5kΩ
2.2
(28.5)kΩ
7.5kΩ
2.25
(38.5)kΩ
6.5kΩ
5.7kΩ
2.3
(3.6)kΩ
(53.5)kΩ
2.35
(5.1)kΩ
(78.5)kΩ
5.0kΩ
2.4
(6.7)kΩ
(129.0)kΩ
4.4kΩ
2.45
(8.5)kΩ
(279.0)kΩ
3.8kΩ
2.5
(10.6)kΩ
2.55
(12.9)kΩ
189.0kΩ
2.8kΩ
2.6
(15.6)kΩ
88.5kΩ
2.4kΩ
2.65
(18.6)kΩ
55.2kΩ
2.0kΩ
2.7
(22.2)kΩ See Note 3
38.5kΩ
1.6kΩ
2.75
(26.4)kΩ
28.5kΩ
1.3kΩ
2.8
(31.5)kΩ
21.8kΩ
1.0kΩ
2.85
(37.6)kΩ
17.1kΩ
0.7kΩ
2.9
(45.4)kΩ
13.5kΩ
0.5kΩ
2.95
(55.3)kΩ
10.7kΩ
0.2kΩ
3.0
(68.6)kΩ
8.5kΩ
0.0kΩ
3.05
(87.1)kΩ
3.1
(115.0)kΩ
3.15
(161.0)kΩ
3.2
(254.0)kΩ
3.25
(532.0)kΩ
3.3kΩ
3.3
3.4
3.5
109.0kΩ See Note 5
48.4kΩ
3.6
28.2kΩ
R1/R3 = (Blue)
R2/R4 = Black
For technical suppor t and mor e infor mation, see inside back cover or visit www.ti.com/power tr ends
A pplication Notes
PT6920/PT6930 Series
Using the Standby Function on the PT6920 and
PT6930 Dual Output Voltage Conver ter s
Figur e 1
22
Both output voltages of the 23-pin PT6920/6930 dual
output converter may be disabled using the regulator’s
standby function. This function may be used in applications that require power-up/shutdown sequencing, or
wherever there is a requirement to control the output
voltage On/Off status with external circuitry.
The standby function is provided by the STBY* control,
pin 3. If pin 3 is left open-circuit the regulator operates
normally, and provides a regulated output at both V1out
(pins 12–15) and V2out (pins 18–21) whenever a valid
supply voltage is applied to Vin (pins 4, 5, & 6) with respect to GND (pins 7-11). If a low voltage2 is then
applied to pin-3 both regulator outputs will be simultaneously disabled and the input current drawn by the ISR
will typcially drop to less than 30mA (50mA max). The
standby control may also be used to hold-off both regulator outputs during the period that input power is applied.
The standby pin is ideally controlled using an open-collector (or open-drain) discrete transistor (See Figure 1).
It may also be driven directly from a dedicated TTL3
compatible gate. Table 1 provides details of the threshold
requirements.
Table 1 Inhibit Contr ol Thr esholds 2,3
Par ameter
Min
Max
Enable (VIH)
Disable (VIL)
1.8V
Vin
–0.1V
0.8V
Notes:
1. The Standby/Inhibit control logic is similar for all
Power Trends’ modules, but the flexibility and
threshold tolerances will be different. For specific
information on this function for other regulator
models, consult the applicable application note.
2. The Standby control pin is ideally controlled using an
open-collector (or open-drain) discrete transistor and
requires no external pull-up resistor. To disable the
regulator output, the control pin must be pulled to
less than 0.8Vdc with a low-level 0.5mA sink to
ground.
3. The Standby input on the PT6920/6930 series may
be driven by a differential output device, making it
directly compatible with TTL logic. The control
input has an internal pull-up to the input voltage Vin.
A voltage of 1.8V or greater ensures that the
regulator is enabled. Do not use devices that can drive
the Standby control input above 5.5V or Vin.
V 2 (sns)
1
V 1 (sns)
V 2 out
4,5,6
V in
V 1 out
STBY
3
+
18 - 21
V 2 out
12 - 15
V 1 out
PT6921
Vin
GND
Vo 2 (adj)
7 - 11
23
V 0 1 (adj)
16
C1
+
+
C2
C3
COM
COM
Q1
BSS138
Inhibit
+5V V in
Tur n-On Time: Turning Q1 in Figure 1 off removes the lowvoltage signal at pin 3 and enables both outputs from the
PT6920/6930 regulator. Following a delay of about 5–10ms,
V1out and V2out rise together until the lower voltage, V2out,
reaches its set output. V1out then continues to rise until both
outputs reach full regulation voltage. The total power-up time
is less than 15ms, and is relatively independant of load, temperature, and output capacitance. Figure 2 shows waveforms of
the input current Iin, and output voltages V1out and V2out, for
a PT6921 (3.3V/2.5V). The turn-off of Q1 corresponds to
t =0 secs. The waveforms were measured with a 5Vdc input
voltage, and with resistive loads of 5.5A and 2.2A at the V1out
and V2out outputs respectively.
Figur e 2
V1 (2V/Div)
V2 (2V/Div)
Iin (4A/Div)
0
2
For technical suppor t and mor e infor mation, see inside back cover or visit www.ti.com/power tr ends
4
6
8
t (milli - secs)
10
12
14
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