STB70NF03L N-CHANNEL 30V - 0.008Ω - 70A D2PAK LOW GATE CHARGE STripFET POWER MOSFET TYPE STB70NF03L ■ ■ ■ ■ ■ ■ VDSS RDS(on) ID 30 V < 0.01 Ω 70 A TYPICAL RDS(on) = 0.008Ω TYPICAL Qg= 35 nC @10V OPTIMAL RDS(on) x Qg TRADE-OFF CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL DESCRIPTION This application specific Power MOSFET is the third genaration of STMicroelectronics unique “ Single Feature Size” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. 3 1 D2PAK INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS ■ AUTOMOTIVE ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Value Unit Drain-source Voltage (VGS = 0) Parameter 30 V Drain-gate Voltage (RGS = 20 kΩ) 30 V ± 20 V Gate- source Voltage ID Drain Current (continuos) at TC = 25°C 70 A ID Drain Current (continuos) at TC = 100°C 50 A IDM (●) Drain Current (pulsed) 280 A PTOT Total Dissipation at TC = 25°C 100 W Derating Factor 0.67 W/°C 4 V/ns –60 to 175 °C 175 °C dv/dt (1) Tstg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature ( ●) Pulse width limi ted by safe operating area April 2001 (1) ISD ≤70A, di/dt ≤290A/µs, VDD ≤ V (BR)DSS, Tj ≤ TJMAX. 1/9 STB70NF03L THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 1.5 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 35 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 450 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (V GS = 0) VDS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V V(BR)DSS Min. Typ. Max. 30 Unit V 1 VDS = Max Rating, TC = 125 °C µA 10 µA ±100 nA Typ. Max. Unit ON (1) Symbol Parameter Test Conditions Min. VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 35 A 0.008 0.01 Ω VGS = 5V, I D = 18 A 0.015 0.018 Ω Typ. Max. Unit 1 V DYNAMIC Symbol gfs (1) 2/9 Parameter Test Conditions Forward Transconductance VDS = 25V, ID = 35 A C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 Coss Crss Min. 40 S 1470 pF Output Capacitance 490 pF Reverse Transfer Capacitance 110 pF STB70NF03L ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Q gd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions Min. VDD = 15V, ID = 35A RG = 4.7Ω VGS = 4.5V (see test circuit, Figure 3) VDD = 24V, ID = 46A, VGS = 10V Typ. Max. Unit 20 ns 350 ns 35 5 10 45 nC nC nC Typ. Max. Unit SWITCHING OFF Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Condit ions Min. VDD = 15V, ID = 35A, R G = 4.7Ω, VGS = 4.5V (see test circuit, Figure 3) 35 65 ns ns SOURCE DRAIN DIODE Symbol Max. Unit Source-drain Current 70 A ISDM (1) Source-drain Current (pulsed) 280 A VSD (2) Forward On Voltage ISD = 70A, VGS = 0 1.5 V Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 70A, di/dt = 100A/µs, VDD = 20V, Tj = 150°C (see test circuit, Figure 5) ISD trr Qrr IRRM Parameter Test Conditions Min. Typ. 75 110 2.9 ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/9 STB70NF03L Output Characteristics Transconductance Gate Charge vs Gate-source Voltage 4/9 Transfer Characteristics Static Drain-source On Resistance Capacitance Variations STB70NF03L Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STB70NF03L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STB70NF03L D2PAK MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 D1 E 8 0.315 10 E1 10.4 0.393 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0.015 0º 8º 3 V2 0.4 7/9 1 STB70NF03L D2PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)* REEL MECHANICAL DATA DIM. mm MIN. A B C TAPE MECHANICAL DATA mm MIN. MAX. inch MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D D1 1.5 1.59 1.6 1.61 0.059 0.063 0.062 0.063 E F 1.65 11.4 1.85 11.6 0.065 0.073 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 P2 11.9 1.9 12.1 2.1 0.468 0.476 0.075 0.082 R T 50 0.25 1.574 0.35 0.0098 0.0137 W 23.7 24.3 DIM. * on sales type 8/9 0.933 0.956 1.5 12.8 D 20.2 G 24.4 N T 100 MAX. 330 inch MIN. MAX. 12.992 13.2 0.059 0.504 0.520 26.4 0.960 1.039 0795 3.937 30.4 1.197 BASE QTY BULK QTY 1000 1000 STB70NF03L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2001 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 9/9