AD DAC1136J

ANALOG
DEVICES
16-and18-Bit
HighResolution
Convefte
Digital-to-Analog
:
:.]:;*
FEATURES
DACl138
18'Bit Resolutionand Accuracv (38gV, 1 Part in 262,1441
Nonlinearity1/2LSB max (DACI 138K)
ExcellentStability
Settlinsto 1/2LSB (0.0002%)in 1ops
Semiconductors
Hermetically-Sealed
.it
DAC1136
16-Bit Resolutionand Accuracy n52PV,1 Part in 65,536)
Low Cost
N o n l i n e a r i t y1 / 2 L S Bm a x ( D A C I 1 3 6 K ,L )
Settlingto 1/2LSB max (0.0008%)in Qrs
IV
DEGLITCHER
EliminatesDAC Glitches
Assembly
Availableon DACl 136/1138 Card-Mounted
GENERAL DESCRIPTION
culrent or
The DAC1136/1138 arecompleteself-contained
converterswith
voltageoutput modular digital-to-analog
of 1.6and 18 bits'
and accuracies
resolutions
The DAC1136/1138combineprecisioncurrentsources
steeringswitchesto producea very linear
with state-of-the-art
are compatiblewith TTL
output. Inputsto theseconverters
levels,The convertershavea currentoutput of -2mA full scale.
A voltageoutput can be obtainedby connectingthe internal
amplifier to the current output by meansof jumpers. By using
additionaljumpers,the usercan selectany one of the fol: t o + 5 V , 0 t o + 1 0 V ,l 5 V , o r t 1 0 V .
l o w i n go u t p u t r a n g e sO
The DAC1136/1138 areavailableon Card-MountedAssemblies.
In this configuration,selectableoptions include' input codes,
output amplifiers,and a high speedtransient-suppressing
DeglitcherModule,DeglitcherIV.
WHERETO USEHIGH RESOLUTIONDACS
The DAC1136lll38 deliverexceptionalaccuracyfor a broad
rangeof ciisplay,test and instrumentationapplications.The
DAC1136,with a resolutionof 16 bits or 1 part in 65'536'
and thc DAC1138with a resolutionof 18 bits or 1 Part in
262,1++are ideally suitedfor applicationsrequiringwide
dynamicrangemeasurementand control. Applicationsinclude
data acquisitionsystems'high resolutionCRT displays,automatic semiconductortesting,p hoto-typesetting,f requency
synthesisand nuclearreactorcontrol.
CERTIFICATE OF CALIBRATION
Each DACl138 has been calibrated with equipment and
methoCs that are traceable to the National Bureeu of Standards (NBS). A Certificate of Performance is sent with each
unit, which includes linearity test data.
7I
70
69
68
MSB
atT2
8tT3
B I T4
ZERO
ADJUST
5k SENSE
CURRENTOUT
l0k sENsE
B I T5
B I T6
B I T7
B I T8
B I T9 1 6
BIT1O 1 7
BIT 11 1 8
53 REFIN
5 2 R E FO U T
BIT12 1 9
8tr 13
gtr 14
stT 15
BIT16
*BrT17
23
24
49 GAIN
48 GAIN
26
27
47 AMP OUT
46 tsIPOLAR
OFFSETOUT
' L : : 1 8 29
30
E
AMP IN
,r 5v 32
COMMON 34
* D A C l ] 3 8O N L Y
Figure L Block Diagram and Pin Designations
Information {urnished by Analog Devicesis believedto be accurate
a n d r e l i a b l e . H o w e v e r , n o r e s p o n s i b i l i t yi s a s s u m e db y A n a l o g D e v i c e s
f o r i t s u s e ; n o r f o r a n y i n f r i n g e m e n t so f p a t e n t so r o t h e r r i g h t s o f t h i r d
p a n i e s w h i c h m a y r e s u l t f r o m i t s u s e . N o l i c e n s ei s g r a n t e d b y i m p l i c a i i o n o r o t h e r w i s e u n d e r a n y p a t e n t o r p a t e n t r i g h t so f A n a l o g D e v i c e s .
02062 U.S.A.
P.O. Box 28O; Norwood, Massachusetts
710/394'6577
Twx:
Tel: 617132947O0
Cables:
ANALOGNORWOODMAS
Telex:924491
(typical
noted;
for mounting
unless
othenyise
specifications
cardwith
@ + 25"C,ratedpowersupplies
noted)
IFICATI(INS
ierldeglitc
heropiions
same
aslloduleudgssotherwise
SPEC
Smllif
DACll36 on Mounting Card with
Amplilier/Deglitcher Options.
DACll36
RESOLUTION,BITS
ACCURACY
IntegralNonlinearity
Differential Nonlinearity
Gain and Offset Error (ExternallyAdjustable)
ANALOGOUTPUT
UnipolarMode
BipolarMode
Output Range(Pin Selectable)
Module
I
. :"'-^ _*.. K
L
l6
ILSBmax i :: I/2LSB max I * llzLSBmax
lLSBmax
t I/2LSB max | * lz2LSB-a*
i
Gain, offset and glitch-nulling adjustments
provided on the mounting card.
2mA to OmA
- lmAto + lmA
0to +5V,0to + l0v, -!5v, t l0V
TTL/CMOS; SeeFigure 2
DIGITAL INPUTS
INPUTCODES
Unipolar Mode
Bipolar Mode
ComplementaryBinary (COMP BIN)
ComplementaryOffset Binary (COMP OBIN)
STROBEINPUT
None
DYNAMIC CHARACTERISTICS
S e t t l i n g T i n e t ol i 2 L S B
Current
Full ScaleStep
LSB Step
Voltage
Unipolar(l0V Step)
Bipolar (20V Step)
LSB Step
Slcw Rate
BIN, COMP BIN, 2's COMP, COMP 2's COMP
|
OBIN, COMP OBIN
I
iSIGN PLUS MAGBIN, COMP SIGN PLUS MAG BIN
I
One standard series74LS load, leading-edge
triggered,pulsewidth l00ns minimum
VoltageOutput, Only
VoltageOutput, Only
80ps
90ps
8ps
2Vlps
90ps
250ps
8ps
lV/ps
IEMPERATURE COEFFICIENTS
ppm of FStu"C)r
InregralNonlinearity
DifferentialNonlinearity
Gain iExcluding Vp1;1.)
0ffsct
Unipolar Mode
Bipolar,\lode
25ps
30ps
8ps
20V/ps
45ps
60ps
8ps
6V/ps
t l.5 max
t 1 . 5m a x
t8max
t 0.5
STABILITY,LONGTERM
, p p mo f F S R1r , 0 0 h0 r s . ) 2
BipolarMode l
Output Current (BV -- l0OkHz)
O u t p u t V o l t a g e( B W - 0 . l - l O H z )
, , 0 \ ' i A l I I ' s C o d e ;" Z E R O " )
,, 5\'iMSB = 0Code;"HalfScale")
' , l 0 \ ' r A l I 0 ' sC o d e l" F u l l S c a l e " )
Fl,x Drift
Currcnt Output (pin 69)
!oltage Protection
SourceResistance
Unipolar Mode
Bipolar Mode
SourceCapacitance
RhFERENCE VOLTAGE (VRr,r.)
!oltagc I Z()r-r :200O)
\oisc.BV':0.1-lOHz)
Tcmpco
pbv nn il'pi;li
0 . 5 n Ar m s
4pV pk-pk
6pV pk-pk
9pV pk-pk
30pVrms
t 2mV max
t l00pV
t l0pV/"C
40pVrms
t 50pV
:r 5pV/"C
35pVrms
I
:t20pV
:t0.lpV/"C
!
i
tl0opv
* tSrrVfC
via Internal SchottkyDiodes
>33ko
>5ko
I 50pF
+ 6.000V(Maximum
Error,
3pVpk-pk
5ppm/'C
REaLTTEEMENTS1*
- iV dc. I 59i,
: l5\'dc. t5o/o
PoU'ER SUPPLY REJECTION ( t I 5V dc)
Gain or Offset vs. FSR
Dilfcrential Nonlinearity
-i*r
VoltageOutput, Only
9mA
r 30mA
:t 38mA
80dB
t l/4LSBperVoltAV5
l00dB
rnolirsMAl-*-
Operating'lemperaturc
-femperaturc
Storage
Humiditv
0to +70'C
- 55"Cro + 85"C
5%to95%,Noncondensing
NOTES
r.Vaximum temperature ccfficients guaranteed from l5'C to 35'C, (ypical from 0 to + 70'C.
'RecommendedDNL calibrationcheck: 6 months.
- 55'Cro + 85'C
rRecommendedPower Supply: Analog Devices Model 923.
catronssubiectro changewrthout notice.
Specrfi
-2-
I - : s ' c t o+ s s ' c
55"Cro + 85'C
for mounting
cardwith
otherwise
noted;
specifications
unless
ratedpowersupplies
+ 25"C,
IFtCAT|
SPEC
0NS'y.'[lfi:#
DACll3S
noted)
otherwise
unless
same
asm0dule
DACI138 on Mounting Card with
Amplifi er/Deglitcher Optrons.
Deglitcher IV
Low Drift 2l4L
{
(Internal AD542K)
w,/woDeglitcher
i
Module
RESOLUTION,BITS
ACCURACY
Integral Nonlinearity
Differential Nonlinearity
Gain and Offset Error (Externally Adiustable)
l/2LSB max
l/2LSB max
i
Galn, oftset and glitch-nulling adiustments
provided on the mounting card.
I
I
**1-*-**"--
ANALOGOUTPUT
UnipolarMode
BipolarMode
VoltageOutput Range(Pin Selectable)
- 2mA to OnA
lmA to + lmA
0ro + 5V,0to + lOV,15v, a lov
l
I
I
DIGITAL INPUTS
INPUTCODES
UnipolarMode
BipolarMode
STROBEINPUT
DYNAMIC CHARACTERISTICS
SenlingTimeto li2LSB
Current
Full ScaleStep
LSB Step
Voltage
Unipolar (l0V Step)
Bipolar (20V Step)
LSB Step
SlewRate
TEMPERATURE COEFFICIENTS
(ppm of FSR7"C)
Integral Nonlinearity
Differential Nonlinearity
Gain (ExcludingVpsp)
Offset
Unipolar Mode
Bipolar Mode
l0ps
8ps
VoltageOutput, Only
VoltageOutput, Only
I75ps
l40ps
l8ps
2Vlgs
80ps
90ps
I 8ps
!
J
I
Mlrs
I
:t0.5
I
I
45ps
60ps
l8ps
- "- 9Y/p:*
t 0.3
t 0.4
t 0.8
a 0.5
:tl
tO.l
STABILITY, LONGTERM
(ppm of FSRJl,000hrs.)'
Gain (Excluding Vqsil
Offset
NOISE (Include Vp6p; Double for
Bipolar Mode)
OutputCurrent (B'V - l00kHz)
Output Voltage(BrJfl= 0. l-l0Hz)
( a 0 V ( A l I I ' s C o d e ;" Z E R O " )
(r 5V(MSB = 0Code;"Half Scale")
(rr10V(Al I0'sCode; "Full Scale")
OutputVoltage(BW = l00kHz)
0 . 5 n Ar m s
Voltage Output, Only
4pV pk-pk
6pV pk-pk
9pVpk-pk
30pVrms
40pV rms
VOLTAGE COMPLIANCE (Amolifi er
Max Ee5 Allowed for
Rated Accuracy
Initial Eos (FactoryAdi.)
E65 Drift
Current Output (pin 69)
Voltage Protection
SourceResistance
Unipolar Mode
Bipolar Mode
SourceCapacitance
Voltage (Zour -200Q)
Noise(BrV = 0.1-l0Hz)
Tempco
t 200pVmax
* l00pV
* l0pV/'C
,t 50pV
t 5pVi'C
:t 2OpV
* 0. I pV/'C
viaInternalSchottkyDiodes
>33k()
>5ko
l50pF
I
+0.024V)
+6.000V(MaximumError,
3pVpk-pk
5ppm/"C
i
l
POWERSUPPLYREQUIREMENTS,
+ 5 V d c ,t 5 %
t l 5 V d c ,a 5 %
PO!/ER SUPPLY REJECTION( t l5V dc)
Gain or Offset vs. FSR
Differential Nonlinearitv
Operating Temperature
StorageTemperature
Humidity
80dB
i I/4LSB
Volt AV
0 to + 70'C
55'Cro + 85"C
5% to 95%,
NOTES:
rRecommended
DNL calibrarion check: 6 motrrhs.
2RecommendedPowerSupply Analog
Devices: Model 923
Specificatrons
subjecrro changewrrhournorice.
-3-
- 55'Cro + 85"C
55'C to + 85'C
INPUT CONSIDERATIONS
The DAC113611138may be driven by TTL or CMOS as
shownin Figure 2. Note that the TTL input is shownwith
"totem pole" TTL gate and oPen
inputs for both a direct
"pull-up")
configurations.
collector (or
Curves*
Characteristic
0.1
.g
% L S [email protected] 1 2 B I T S
E o.o1
:R
I
14
l5
u
s
0.001
z
J
F
2b. Switch or RelaY lnqut"
2a. TTL Totem Polet
16
17
g
%[email protected] 18 B|TS
1ps
10ps
lo0gs
SETTLING
TIME
1ms
10ms
Settling Time (Voltage Output) vs. /o-of'Full-Scale-
Enir for 20VOutputStep(+l}v +
-l?v)
.,...,,
""1i..l1"1i"3::.."^.
rrL
w,rH
opEN
, FoB
HAVE INTERNALlOKOPULL-UPON EACHINPUTTO 3.8V.
CONVEFTERS
OR RELAYTO GROUND.WHENSWITCHISOPEN,THE
2. USESPSTSV{ITCH
INTERNALlOKOWILL PULL INPUTUP TO 3.8V.
0.1
G
Figure 2. lnput Connections
% L S [email protected] 1 2 B | T S
OUTPUT CONNECTIONSAND GUARDING
for variousvoltage
The DAC1136/1138 output connections
Figure
in
shown
3.
rangesare
Sincean LSB is only 38pV (at 10 volts full scalefor the
DAC1138),caremust be exercisedto properlyguard the
current output of the converterfrom leakagecurrent. Any
connectionmadeto the DAC's current output (pin 69)
should be guarded.SuggestedPrinted circuit board guarding
is shownin Figure 3. The optional Card-MountedAssemblies
of the DACl136lll38 havebeencarefully designedfor
optimum guardingand performance.
E 0.0r
;e
I
14
G
t
15
o.oor
$
z
16
F
17
l
4
% L S [email protected] 1 8 B r r S
0.0(X)1
llls
'l0ps
100Ps
TIME
SETTLING
lms
10ms
Settling Time (Voltage Output) vs. %'of'Full-Scale'
+l?V)
Error for 10V Ouput Step(0V *
o.1
g
=
--!---
r-+-:
-,--i-
-.-" ":;
E o.or :-...'''."' :.::-"'; _'i"-t:tt, '':'-l-;:-:-;
be
- t -.--- -.1
..-..-.- - - ;:
I
;;^-^-
- --.1
---';a%[email protected] 12 B|TS
G U A R DF O I L
FOR0V ro +5V
DACCONNECTED
13
14
15
u
s
z
0.fi)'l
16
f
F
U
1?
%[email protected] r8 B|TS
FOROVTO +IOV
DACCONNECTED
10ps
1009s
SETTLING
TIME
lms
for
Settling Time (Voltage auQuil vs.o/o'of-Full-Scale-Error
(Essentially
With
Amplifier
Used).
of
lndependent
LSB Steps
Degtitcher I V, the LSB Step at the Maior Carry Settlesas
Fastas the Typical LSB Step, Following the | | W Hold
Period.
DAC CONNECTED FOR !5V
l o l O
,t Issr 6s
O
53
t
O
s2
O
49
:
O
48
o I
47 |
l
DAC CONNECT€D FOR IlOV
Figure 3. Output Voltage Connections and SuggestedPCB
Guarding (Unipolar and Biqolar)
TNOTE: All curves tyPical at rated supply voltage.
F.S. = Full Scale
-L
GAIN AND OFFSET ADJUSTMENTS
The gain and offset adjustments are made with external
potentiometers which the user supplies. With the appropriate
digital inputs applied, these potentiometers are adjusted until
the desired output voltage is obtained. The proper connections for offset and gain are shown in Figure 4. The voltmeter used to measure the output should be capable of stable
resolution of 1/4LSB in the region of zero and full scale.
Because of the interaction berween offset and gain adjustments, the adjustment procedure described below should be
carefully followed. Offset adjustment affects gain, but gain
adjustment does not affect offset.
1 1 3 6 = S H O R Tl l 3 5 = O P E N
cvv 1 1 3 8 = 3 3 0 k 1 1 3 8 =1 5 0 k
1136=56Ok
1 1 3 8 =2 M
100k
100k
20f
OFFSET
ADJUST
cw
erpoLa;OFFSET
TO PIN 34
OR PIN 69
2M
r
r
100k
207
GAIN
ADJUST
T-
l
0
0
6 (
69
46
4 9 4
1. Bit 4 Trim
a . S e tb i t i n p u t st o 1 1 1 1 0 . . . . O .
b. Readthe output voltageby nulling rhe voltmeter.
c . S e tb i t i n p u t st o 1 1 1 0 1. . . . 1 .
d. Readvoltageby nulling voltmeter. This readingshould
be equalto that of step1b plus 1LSB.Adjust bit 4 if
required(see84, Figure6).
1,",*o
tN753A
L
2M
t
DIFFERENTIAL LIN EARITY ADJ USTMENT
EachDAC1136l1138has beenfactory calibratedand
testedto achievethe performanceindicatedin the electrical
specifications.Beforeattempringrecalibration,it is imperative
that the circuit be checkedto confirm that all previouslydescribedprecautions
havebeentakento insureproperapplication at the 16-or 18-birlevel.Basically,the DAC is trimmed
by comparinga bit to the sum of all lower bits, and adjusting,
if necessary,
for a one LSB positivedifference.The top 4
major carries,i.e.,MSB minusthe sum of bits 2-through-theLSB, down through bit 4 minus the sum of bits 5-through-theLSB,can be trimmedusingthe procedureoutlinedbelow.A
differentialvoltmeter capableof 1OOtrrV
Full Scaleshouldbe
connectedto V9g1 of the DAC. This will resolvean LSB
which at 18 bits is 38pV (10V range).A Fluke 895,4,or equivalentis recommended.
3.01k
1%
50mW
3.01k
1%
50mW
DACl 136
DAcl138
"^l
2. Bit 3 Trim
a . S e tb i t i n p u t st o 1 1 1 0 . . . . O .
b. Readoutput voltageby nulling the voltmeter.
c. Setinputsto 1101 . . . . 1.
d. Readvoltageby nulling the voltmeter.This reading
shouldbe equalto that of step2b plus 1LSB.Adjust
bit 3 if required(see83, Figure6).
-15vdc coMMoN
+lsvdc
NorEs:
1. ALL FIXEDRESISTORS
ARE 5%CARBONCOMP,UNLESS
OTHERWISE
NOTED.
2 . A L L P O T E N T I O M E T EARRSE2 O . T U R INN F I N I T ER E S O L U T T O
NP E .
TY
Figure 4. Gain and Offset Adjustments
For unipolarmode, apply a digital input of all "1's" (complementarybinary code for zero ourpur) and adjustthe offset
potentiometeruntil a 0.00000V ourput is obtained (see
Table I). Once the appropriateoffset adjustmenrhasbeen
made,apply a digital input of all "0's". Adjust the gain
potentiometeruntil the plus full scaleoutput is obtained
(seeTableI).
For bipolarmode,apply a digitalinput of all "L's" (comple-
3. Bit 2 Trim
a. Setbit inputsto 110 . . . . 0.
b. Readoutput voltageby nulling the voltmerer.
c. Setbit inputsto 101 . . . . 1.
d. Readvoltageby nulling vokmeter. This readingshould
be equalto that of step3b plus lLSB. Adjust bit 2
if required(see82, Figure6),
4. Bit 1 (MSB) Trim
a. Set bit switchesto 100 . . . . O.
b. Readoutput voltageby nulling the voltmeter.
c. Setbit switchesto 011 . . . . 1.
d. Readvoltageby nulling voltmerer.This readingshould
be equalto that of step4b plus 1LSB.Adjust bit 1
(MSB)if required(seeMSB,Figure6).
mentary offset binary codefor minus full scale)and adjustthe
offset potentiometerfor the proper minus full scaleoutput
voltage(seeTable I). Oncethe appropriateminus full scale
adjustmenthasbeenmade,apply a digital input of all "0's".
Adjust the gain potentiometeruntil the plus full scaleoutpur
shownbelowis obtained.
IDEAL OUTPUT
*'--:-.'
RANGE
All 11...1
Unipolar:
i
OV++lOV
OV--++5V
Bipolar:
-1OV--r+10V
-5V -+ +5V
0.ooooov
0.00000v
l
-lo.ooooov
l+9.999934Y+9.999695v
-5.ooo0ov i+4.999962Y++.9998+8v
-
To adjust,
l DACl138 ; DAC1136
i
All 00...0
:+9.999962V +9.999848V
:+4.99998IY +4.999924V
i
-
iAdjust ZERO potl
Adjust GAIN pot
Table l. Full Sale Output
.L
If insufficientrangeexistson any adjustment,then a separate
(see
adjustrnentfor the rygightof bits 5-through-the-LSB
Sum B5 -+ LSB, Figure6) shouldbe performeil.This condition
will probably not occur on bit 2, 3 and 4 but might occur on
the MSB.If adjusfinentof the sum of bits 5-through-the-LSB
is
made,the trim procedurefor all bits shouldbe repeated.Obviously, sincethe procedureaffectsthe weight of individual
bits, it affectsthe overallgain of the DAC. The final step
shouldbe adjustmentof gain (usersuppliedadjustmentexternalto module,or pot at edgeof mountingcard).
OUTLINE DIMENSIONSAND
PIN DESIGNATIONS
Dimensions
shownin inchesand(mm).
l+-
Codi Semiconductor manufactures a reference module called
Ceftavoltl with a 10 volt output accurate to 0.001%. This output is temperature compensated to within lppm/oC from
+15-C to +5 5-C. The Certavolt requires a power supply of
+28V dc @ 2OmA. To convert the +10 volt output of the Certavolt to the +6 volt reguired by the DAC, the circuit shown
in Figure 5 is recommended,
I Certavoltis a registeredtrade nameby Codi Semiconductor.
2.015
(51.181
MAX
Vour
Figure 5. DACI136/1 138 with External PrecisionReference
OPTIONAL CARD-MOUNTEDASSEMBLY
Analog Devicesoffers an optional Card-MountedAssembly
designedto provideoptimum performanceat the 18-bit level.
As shown in Figure6, this 4 L/2" X 6" printed circuit card
includesthe appropriateDAC GAIN and OFFSET adjustment
potentiometers,power supply bypasscapacitorsand input
registers.The Card-MountedAssembly can be ordered with
custom code-settinglogic, externaloutput amplifiers,and a
DeglitcherIV.
0 , 1G R I D
(2.5)
SEENOTE2
Il F,;l''*l
Il
t
t
0.500
112.7|
I
+l
I
I
I
Fo.23o
(5.84)
0 . 1 6D t A
(4.06)
.r,t' I
1 6
l t
I
|
=I
-r-lFll
BIT'I\
0.150
( 3 . 8)r
t.;astas.gt-l
F-
oEG tv Eos
DEGLITCHER
N
{rvtsB}l oero,r_
I
A
-tl
AOTTOM OF CASE
:t:"'
&::q
o.,,u,o#6--)
f-+l r-i
o.3ool-' t 7 . 6 2' 1
o
g
o
B
8
Msa
NOTES:
O E T A I L A ( 2 / 1}
1 . P t N S :0 . 0 1 9 1 0 . 0 0 10 t A .
2 . G R I D A N D M A R K I N G S N S X T T O P I N S A R E F O R R E F E R E N C E O N L YA N D D O
NOT APPEARON UNIT
3 . P I N S 2 7 A N D 2 9 A R E N O T P R E S E N TO N D A C 1 ' 1 3 6 ,
ASSEMBLY INSTRUCTIONS
CAUTION: This module is not an embedded assembly and is
not hermetically sealed. Do not subject to a solvent or water-wash
process that would allow direct contact with free liquids or
vapors. Entrapment of contaminants may occur, causing
performance degradation and permanent damage. Install after
any clean/wash process aod then only spot clean by hand.
3
r
2
DAC
=
.SETTING LOGIC AND
DEGLITCHER
22
USING AN EXTERNAL 6V REFERENCE
The DAC1136/1138can be operatedwith an external
referenceconnectedto pin 53 of the module.The current
drain on the externalreferencewill be 1.125mA in bipolar
mode or O.125mAin unipolar mode (pin 46 should be left
open and not groundedwhen using an externalreference
in the unipolar mode). When an externalreferenceis used,pin
52, (the output of the internal reference)is left open.
W'S INDICATE JUMPERPOSITIONS.
TO ISOLATE ANALOG AND DIGITAL GROUND
W7 IS OMITTED.
W6 AND Wl,I ARE NOT INSTALLED WHEN USER
DESIRES4.WIRE CONNECTIONTO J2 WHEN
EITHER A 44K OR 2341 AMPLIFIER IS USED.
Figure 6. Card-Mounted Assembly. Dimensions shown ln
inchesand (mm).
-t
CARD-MOUNTED ASSEMBLY JUMPER DESIGNATIONS
The output voltage range, reference source, amplifier and deglitcher configurations are programmed at the facrory by
means of jumpers, resistors, and capacitors (see ordering
guide for details). The mounting card can be programmed by
the user, if necessary,as shown below.
Output Voltage Range
+10v
r5v
I
l
+1OV
DEGLITCHER IV
The Deglitcher IV is a precision high-speed,high-isolation
sample-and-hold circuit which eliminates the glitches that
occur whenever a DAC is dithered through a major carry. Su
momentary transients can be of concern in applications such
as high-resolution CRT beam positioning, where glitch-free
code transitions are ofren required for optimum display qud
ity and legibility. Oscilloscope photographs in Figures 7a anr
7b below show the outpur of a DAC1136 being dithered
up and down through the major carry, between codes
1 O 0 O O O 0 O 0 0 0 0 Oa
On0dO0 1 1 1 1 1 1 1 1 1 1 . 1 1 1 1I1n. F i g u r e7 b ,
the Deglitcher IV is turned on virrually etminating the
glitches and allowing the 152trrVLSB step to be clearly seen
lnstall Jumpers
w 1 0 ,w 5
wl2, W5
w 1 2 ,W 3
t
Reference
Internal
External
lnstall Jumpers
w2
w1
-
I
--" 1*"-----
'
Install Jumpers
Amplifier
w4.w9
w 8 .w l 3
w 8 ,w 1 5 w
, 1 7w
, 18
Internal
Externall
Deglitcher IV2
Deg.IV with Ext A-p3
i
w8, w14,w16
'k._*
NOTES:
I With a 234L amplifier install
C7 (O.O11/F,1O06,ceramic capacitor).
With a 44K amplifier use a variable resistor (typ vilue x 499d1,
O.1W, 1%) to adjust the output voltage for a llOOrrV reading as
measured between pins 69 and 34 of the DAC (this step sets voltage
compliance); install this value resistor (Rl 3 position).
2With Deglitcher IV remove R2O (1OOO)
and replace the resistor with
e jumper.
3 With Deglitcher IV and a, 234L
zrnplifier remove C6 (6.SpF Capacitor)
and install: C7 (O.O1pF, 107o,ceramic capacitor), Cf 8 (1OOpF, 1O%,
ceramic capacitor), Cf7 (1OOOpF,1O7o,polystyrene capacitor) and
replace R2O (1OO0) with a jumper, With Deglitcher IV and a 44K
amplifier perform the operation described in Note 1, remove C6
(6,8pF capacitor) and install: C18 (1OOpF, 1O%, ceramic capacitor),
C17 (1OOOpF,10% polystyrene capacitor) and replace R2O (1OOO)
with a jumper.
CONNECTOR J1
PIN
FUNCTION
BIT I
PIN
FUNCTION
STROBF
BtT 18|
w
+5V
+'t5v
atr 2
BIT 6
z
H
atT7
J
BIT 8
BII9
1-4
5
tt
F
K
DIGITAL GND
NC
t5
Bil
16
Figure 7b. Same Major-Carry Dither with Deglitcher lV
(BW = lMHz), Vertical Scale,2001tV/Division
A
B
CNALUU Htsts. IN/UU I
ANALOG REF IN/OIIT
ANALOG SENSE HIGH
The Deglitcher IV utilizes a proprietary sampling technique
which isolates the output amplifier during the critical lops
period immediately following a code change. The only discernible difference in DAC performance when used with
Deglitcher IV is a delay of approximately 1lps after the
strobe goes HI before the (deglitched) DAC output voltage
starts slewing toward the new value.
IN] ERLOCT
tT1
atT t4
Btl
CONNECTOR J2
FUNCTION
\IALOG SENSE LOW
\LOG SOURCE LOW
ANALOGSENSEHIGH
I
R
PIN
Figure 7a. DAC1l36; Major-Carry Dither without Degtitch
lV (BW = | MHz), Vertical Scale0.2V/Division
D
NC
F
ANALOG SOTIRCF I OW
ANALOG SENSE LOW
J2 MATESWITH CINCHP.N.
251-06-30-160(SUPPLtED).
22
J1 MATESW|THCTNCHP.N.251-22-30-160
(SUPPLIEDI.
' D A C l1 3 8O N L Y
GLITCH ADJUSTMENT
"Glitch"
There are two
adjustment potentiometers, accessible on the Card-Mounted Assembly. The adjustment on rhe
card permits nulling of any Track-to-Hold offset, whereas th
adjustment internal to the Deglitcher IV allows for precise
nulling of the Hold-to-Track transient. Becauseof the nearinfinite attenuation of the actual DAC current glitches, no
current€litch transient is visible on the output. For this
reason, it is easiestto null the 2 Deglitcher adjusrnents whilr
strobing the Card with a static digital input.
Mounting Card Connector Designations
-7-
INPUT OPTIONS
The Card-MountedAssemblycontainsinput registers.The
input code orderedby the useris set at the factory by means
of variousjumpersin the logic circuitry. Seeorderingguide
for details.
3. Analog Devicesmodel 44K; availableonly with DACl136
recommendedonly for high speedor high current
applications.
4. DeglitcherIV with self-containedprecisionBI-FET outpur
amplifier(AD542K).
5. DeglitcherIV with mod,el234L ourpur amplifier.
6. DeglitcherIV with model 44K output amplifier (recomme
with DACl136only).
Sincethe Card-MountedAssemblycontainsinput registers,the
card requiresa srrobepulsecircuit. Strobecharacteristics
of
input registersare:
t_.|
Whenusingan externalamplifier,a four terminal output connection can be utilized on the Card-MountedAssemblyin
order to allow for compensationof connectorcontact resistance.
1.-l L StrobePulse:One Std. series74LS load,LeadingEdge-Triggered.
Positivepulseshouldremain HI for )
1Oons.
2. The digital inpur code can be changedat any rime up ro
and includingthat instant when the strobecommandgoes
HI.
3. The actualtransferof the input codeto the DAC will occur
- 3psafter the strobecommand;during this 3ps the digital
input code to the card assemblyshouldnot be changed,in
order to preventthe possiblecouplingof logic noiselnto
the DAC output. Ar b +3ps,the deglitcheris automatically
enabledfor the following - 8ps.Thus there will be a delay of
ry 1ltr,rs
beforethe deglitchedourput srartsslewingto the new
value.Actual data transferto the DAC automaticallyoccurs
at to +3.1ps.
I
=iS
J2 - l f
B SENSE HI
c s o u R c EH l
E- souncrlo
ANALOG
COMM.
O U T P U TC I R C U I TW I T H
O P T I O N A LA M P L I F I E R S
OAC ON
M O U N T I N GC A R D
OUTPUT OPTIONS
The Card-Mounted Assembly for the DAC1136/1138 allows
for several user-selectableoutput configurations:
\
R1
*vs-{T
=,;JiI"t
-vs-1__J
*vt-l-.5v
.--l
D I GI T AL
COMM.
NOTE:
1 . V O L T A G ED R O PB E T W E E N
S O U R C EL O A N D S E N S EL O M U S TO B S E R V EC U R R E N T
M O D EC O M P L I A N C E
L I M I T SF O R R A T E DA C C U R A C Y .
2. THISCONNECTION
S C H E M EC A N N O TB E U S E DW I T H I N T E R N A L
AMPLIFIER
O F T H E D A CO R W I T HT H E A I V I P L I F I E R
I N T E R N A LT O T H E D E G L I T C H E IRV .
1. Internal Output Amplifier inside the DAC Module.
2. Analog Devices model 234L; for low noise, low drift applications (2pV, tO. 11,rV/'C).
Figure 8. Four-Terminal Output Connections
ORDERING GUIDE
WHEN ORDERINGTHE DACl136 OR DACl138, ORDER EITHER:
1. Moduleonly:
2. DACll36/1
DAC1136J
DAC1136K
DAC1136L
DAC1138J
DAC1138K
138 as a Card-Mounted Assembly:
DAC
VOLTAGE
REFERENCE
SIGN PLUS MAG 8IN
D E G L I T C H E RI V
AND 2341
NOTE 1: NOT AVATLABLE FOR
DAC1136L,DAC1138J
ANO DAC1I38K.
-&