2SJ408 L , 2SJ408 S Silicon P-Channel MOS FET Application HDPAK 4 High speed power switching 4 Features • • • • Low on–resistance High speed switching Low drive current 4 V gate drive device can be driven from 5 V source • Suitable for Switching regulator, DC – DC converter • Avalanche Ratings 1 2 3 1 2 3 1. Gate 2. Drain 3. Source 4. Drain 2, 4 1 3 Table 1 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit ——————————————————————————————————————————— Drain to source voltage VDSS –60 V ——————————————————————————————————————————— Gate to source voltage VGSS ±20 V ——————————————————————————————————————————— Drain current ID –50 A ——————————————————————————————————————————— Drain peak current ID(pulse)* –200 A ——————————————————————————————————————————— Body–drain diode reverse drain current IDR –50 A ——————————————————————————————————————————— Avalanche current IAP*** –50 A ——————————————————————————————————————————— Avalanche energy EAR*** 214 mJ ——————————————————————————————————————————— Channel dissipation Pch** 100 W ——————————————————————————————————————————— Channel temperature Tch 150 °C ——————————————————————————————————————————— Storage temperature Tstg –55 to +150 °C ——————————————————————————————————————————— * PW ≤ 10 µs, duty cycle ≤ 1 % ** Value at Tc = 25 °C *** Value at Tch = 25 °C, Rg ≥ 50 Ω 2SJ408 L , 2SJ408 S Table 2 Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test conditions ———————————————————————————————————————————– Drain to source breakdown voltage V(BR)DSS –60 — — V ID = –10 mA, VGS = 0 ———————————————————————————————————————————– Gate to source breakdown voltage V(BR)GSS ±20 — — V IG = ±100 µA, VDS = 0 ———————————————————————————————————————————– Gate to source leak current IGSS — — ±10 µA VGS = ±16 V, VDS = 0 ———————————————————————————————————————————– Zero gate voltage drain current IDSS — — –250 µA VDS = –50 V, VGS = 0 ———————————————————————————————————————————– Gate to source cutoff voltage VGS(off) –1.0 — –2.25 V ID = –1 mA, VDS = –10 V ———————————————————————————————————————————– Static drain to source on state resistance RDS(on) — 0.015 0.02 Ω ID = –25 A VGS = –10 V * ————————————————————————– — 0.02 0.028 Ω ID = –25 A VGS = –4 V * ———————————————————————————————————————————– Forward transfer admittance |yfs| 30 50 — S ID = –25 A VDS = –10 V * ———————————————————————————————————————————– Input capacitance Ciss — 8200 — pF VDS = –10 V ———————————————————————————————— Output capacitance Coss — 3650 — pF VGS = 0 ———————————————————————————————— Reverse transfer capacitance Crss — 750 — pF f = 1 MHz ———————————————————————————————————————————– Turn–on delay time td(on) — 55 — ns ID = –25 A ———————————————————————————————— Rise time tr — 340 — ns ———————————————————————————————— Turn–off delay time td(off) — 1150 — ns VGS = –10 V RL = 1.2 Ω ———————————————————————————————— Fall time tf — 620 — ns ———————————————————————————————————————————– Body–drain diode forward voltage VDF — –1.0 — V IF = –50 A, VGS = 0 ———————————————————————————————————————————– Body–drain diode reverse recovery time trr — 250 — ns IF = –50 A, VGS = 0, diF / dt = 50 A / µs ———————————————————————————————————————————– * Pulse Test 2SJ408 L , 2SJ408 S Power vs. Temperature Derating –1000 I D (A) 150 100 50 –30 –10 50 100 150 Case Temperature 200 Tc (°C) Typical Output Characteristics 3V –40 –20 0 (A) ID –60 VGS = 2.5 V –2 –4 –6 Drain to Source Voltage –8 –10 V DS (V) Op 10 1m µs s m s er (1 Operation in at sh ion this area is ot (T ) c= limited by R DS(on) 25 °C ) Typical Transfer Characteristics Pulse Test 3.5 V DC = µs –50 Drain Current I D (A) Drain Current –80 PW 0 –1 Ta = 25 °C –0.5 –1 –2 –5 –10 –20 –50 –100 Drain to Source Voltage V DS (V) –100 10 V 6V 4V 10 10 –100 –3 0 Maximum Safe Operation Area –300 Drain Current Channel Dissipation Pch (W) 200 –40 V DS = –10 V Pulse Test –30 –20 Tc = 75°C 25°C –25°C –10 0 –1 –2 –3 Gate to Source Voltage –4 –5 V GS (V) 2SJ408 L , 2SJ408 S Pulse Test –1.6 –1.2 I D = –50 A –0.8 –20 A –0.4 –10 A Static Drain to Source on State Resistance R DS(on) ( Ω) 0 –4 –2 –6 Gate to Source Voltage –8 –10 V GS (V) Static Drain to Source on State Resistance vs. Temperature 50 Pulse Test 40 I D = –50 A 30 V GS = –4 V –10 A –20 A 20 10 0 –40 –10 V Drain to Source On State Resistance R DS(on) ( Ω ) –2.0 –10 A –20 A –50 A 0 40 80 120 160 Case Temperature Tc (°C) Static Drain to Source on State Resistance vs. Drain Current 100 50 VGS = –4 V 20 –10 V 10 5 2 1 –1 Pulse Test –3 –10 –30 –100 –300 –1000 Drain Current I D (A) Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Drain to Source Voltage V DS(on) (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage 100 50 20 Tc = –25 °C 25 °C 10 75 °C 5 2 1 0.5 –0.1 –0.3 V DS = –10 V Pulse Test –1 –3 –10 –30 Drain Current I D (A) –100 2SJ408 L , 2SJ408 S Typical Capacitance vs. Drain to Source Voltage 1000 100000 500 30000 Capacitance C (pF) Reverse Recovery Time trr (ns) Body–Drain Diode Reverse Recovery Time 200 100 50 20 10 –1 10000 Ciss 3000 Coss 1000 Crss 300 di / dt = 50 A / µs V GS = 0, Ta = 25 °C 100 0 –50 –100 –2 –5 –10 –20 Reverse Drain Current I DR (A) –40 –60 –80 –100 0 –4 –8 V DS V DD = –50 V –25 V –10 V V GS –12 –16 I D = –50 A –20 200 400 600 800 1000 Gate Charge Qg (nc) –20 –30 –40 –50 Switching Characteristics V GS = –10 V, V DD = –30 V PW = 5 µs, duty < 1 % Switching Time t (ns) –20 V GS (V) V DD = –10 V –25 V –50 V 5000 Gate to Source Voltage V DS (V) Drain to Source Voltage 0 –10 Drain to Source Voltage V DS (V) Dynamic Input Characteristics 0 VGS = 0 f = 1 MHz 2000 t d(off) 1000 tf 500 tr 200 100 t d(on) 50 –1 –2 –5 –10 –20 –50 –100 Drain Current I D (A) 2SJ408 L , 2SJ408 S Reverse Drain Current vs. Source to Drain Voltage Maximun Avalanche Energy vs. Channel Temperature Derating Repetive Avalanche Energy E AR (mJ) –100 Reverse Drain Current I DR (A) Pulse Test –80 –60 –10 V V GS = 0 –5 V –40 –20 0 –0.4 –0.8 –1.2 Source to Drain Voltage –1.6 250 I AP = –50 A V DD = –25 V duty < 0.1 % Rg > 50 Ω 200 150 100 50 –2.0 V SD (V) 0 25 50 75 100 125 150 Channel Temperature Tch (°C) Avalanche Test Circuit and Waveform V DS Monitor EAR = L 1 2 • L • I AP • 2 I AP Monitor VDSS VDSS – V DD V (BR)DSS I AP Rg D. U. T V DS VDD ID Vin –15 V 50Ω 0 VDD 2SJ408 L , 2SJ408 S Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance γ s (t) 3 1 0.3 0.1 0.03 0.01 10 µ Tc = 25°C D=1 0.5 0.2 0.1 θ ch – c(t) = γ s (t) • θ ch – c θ ch – c = 1.25 °C/W, Tc = 25 °C 0.05 0.02 PDM 1 0.0 lse u tp ho 1s 100 µ D= PW T PW T 1m 10 m Pulse Width 100 m PW (S) 1 10