Silicon Junction FETs (Small Signal) 2SK2593 Silicon N-Channel Junction FET For low-frequency amplification For switching unit: mm 1.6±0.15 0.4 0.8±0.1 0.4 Parameter Unit VDSX Symbol 55 V Gate to Drain voltage VGDO −55 V Gate to Source voltage VGSO −55 V Drain current ID ±30 mA Gate current IG 10 mA Allowable power dissipation PD 125 mW Junction temperature Tj 125 °C Storage temperature Tstg −55 to +125 °C +0.1 0.5 1.0±0.1 0.5 1.6±0.1 +0.1 0.15–0.05 0 to 0.1 Ratings Drain to Source voltage 3 0.45±0.1 0.3 ■ Absolute Maximum Ratings (Ta = 25°C) 1 2 0.75±0.15 ● Low noies, high gain ● High gate to drain voltage VGDO ● Mini-type package, allowing downsizing of the sets and automatic insertion through the tape/magazine packing. 0.2–0.05 ■ Features 1: Source 2: Drain 3: Gate 0.2±0.1 EIAJ: SC-75 SS-Mini Type Package (3-pin) Marking Symbol (Example): 2B ■ Electrical Characteristics (Ta = 25°C) Parameter Symbol IDSS* Gate to Source leakage current IGSS VGS = −30V, VDS = 0 Gate to Drain voltage VGDS IG = −100µA, VDS = 0 Gate to Source cut-off voltage VGSC VDS = 10V, ID = 10µA Forward transfer admittance | Yfs | VDS = 10V, ID = 5mA, f = 1kHz Input capacitance (Common Source) Ciss Reverse transfer capacitance (Common Source) Crss Noise figure * Conditions Drain to Source cut-off current NF VDS = 10V, VGS = 0 VDS = 10V, VGS = 0, f = 1MHz VDS = 10V, VGS = 0, Rg = 100kΩ f = 100Hz min typ 1 max Unit 20 mA 10 nA 55 80 V 2.5 7.5 mS 6.5 pF 1.9 pF 2.5 dB −5 V IDSS rank classification Runk P Q R S IDSS (mA) 1 to 3 2 to 6.5 5 to 12 10 to 20 Marking Symbol 2BP 2BQ 2BR 2BS 1 Silicon Junction FETs (Small Signal) 2SK2593 PD Ta ID VDS 5 10 Ta=25˚C 125 75 50 8 3 VGS=0 – 0.2V – 0.4V 2 – 0.6V 1 25 – 0.2V 6 – 0.4V 4 – 0.6V – 0.8V 2 – 0.8V – 1.0V – 1.2V 0 20 40 60 80 100 120 140 160 0 0 Ambient temperature Ta (˚C) 1 2 3 4 5 6 0 Drain to source voltage VDS (V) ID VGS 10 Ta=–25˚C 25˚C 4 75˚C 2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 VDS=10V Ta=25˚C 10 8 6 4 2 0 –2.0 –1.2 Gate to source voltage VGS (V) 12 10 8 6 4 2 0 0 2 4 6 8 10 8 IDSS=7.5mA 6 4 2 –1.2 – 0.8 – 0.4 0 0 Gate to source voltage VGS (V) 10 12 Drain to source voltage VDS (V) Output capacitance (Common source) Coss (pF) VGS=0 Ta=25˚C 12 VDS=10V Ta=25˚C 2 VGS=0 Ta=25˚C 7 6 5 4 3 2 1 0 2 4 6 8 6 8 10 Crss VDS 8 0 4 Drain current ID (mA) Coss VDS 14 10 0 –1.6 Ciss VDS 16 8 | Yfs | ID 10 12 Drain to source voltage VDS (V) Reverse transfer capacitance (Common source) Crss (pF) 0 6 12 Forward transfer admittance |Yfs| (mS) 12 Forward transfer admittance |Yfs| (mS) VDS=10V Ta=25˚C 14 6 4 Drain to source voltage VDS (V) 12 8 2 | Yfs | VGS 16 Drain current ID (mA) VGS=0V – 1.0V 0 Input capacitance (Common source) Ciss (pF) Drain current ID (mA) 100 0 2 Ta=25˚C 4 Drain current ID (mA) Allowable power dissipation PD (mW) 150 ID VDS 8 VGS=0 Ta=25˚C 7 6 5 4 3 2 1 0 0 2 4 6 8 10 12 Drain to source voltage VDS (V) Request for your special attention and precautions in using the technical information and semiconductors described in this material (1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. 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