NSC 100371

100371
Low Power Triple 4-Input Multiplexer with Enable
General Description
The 100371 contains three 4-input multiplexers which share
a common decoder (inputs S0 and S1). Output buffer gates
provide true and complement outputs. A HIGH on the Enable
input (E) forces all true outputs LOW (see Truth Table). All inputs have 50 kΩ pull-down resistors.
n
n
n
n
2000V ESD protection
Pin/function compatible with 100171
Voltage compensated operating range = −4.2V to −5.7V
Available to MIL-STD-883
Features
n 35% power reduction of the 100171
Logic Symbol
Pin Names
Description
I0x–I3x
Data Inputs
S0, S1
Select Inputs
E
Enable Input (Active LOW)
Za–Zc
Data Outputs
Za–Zc
Complementary Data Outputs
DS100975-1
© 1998 National Semiconductor Corporation
DS100975
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100371 Low Power Triple 4-Input Multiplexer with Enable
September 1998
Connection Diagrams
24-Pin DIP
DS100975-2
24-Pin Quad Cerpak
DS100975-3
Logic Diagram
DS100975-5
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Truth Table
Inputs
Outputs
E
S0
S1
Zn
L
L
L
I0x
L
H
L
I1x
L
L
H
I2x
L
H
H
I3x
H
X
X
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
3
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Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature (TSTG)
Maximum Junction Temperature (TJ)
Ceramic
VEE Pin Potential to Ground Pin
Input Voltage (DC)
Output current (DC Output HIGH)
ESD (Note 2)
Case Temperature (TC)
Military
Supply Voltage (VEE)
−65˚C to +150˚C
−55˚C to +125˚C
−5.7V to −4.2V
Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
+175˚C
−7.0V to +0.5V
VEE to +0.5V
−50 mA
≥2000V
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Military Version
DC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55˚C to +125˚C
Symbol
VOH
Parameter
Output HIGH Voltage
Conditions
Min
Max
Units
TC
−1025
−870
mV
0˚C to
−1085
−870
mV
−55˚C
VIN = V (Max)
Loading with
−1830
−1620
mV
0˚C to
or VIL (Min)
50Ω to −2.0V
−1830
−1555
mV
−55˚C
−1035
mV
0˚C to
−1085
mV
−55˚C
VIN = VIH (Min)
Loading with
−1610
mV
0˚C to
or VIL (Max)
50Ω to −2.0V
−1555
mV
−55˚C
−870
mV
−55˚C to
Notes
+125˚C
VOL
Output LOW Voltage
(Notes 3, 4,
5)
+125˚C
VOHC
Output HIGH Voltage
+125˚C
VOLC
Output LOW Voltage
(Notes 3, 4,
5)
+125˚C
VIH
Input HIGH Voltage
−1165
+125˚C
VIL
Input LOW Voltage
−1830
−1475
mV
−55˚C to
+125˚C
IIL
Input LOW Current
0.50
µA
−55˚C to
+125˚C
IIH
IEE
Guaranteed HIGH Signal
for All Inputs
Guaranteed LOW Signal
for All Inputs
VEE = −4.2V
VIN = VIL (Min)
(Notes 3, 4,
5, 6)
(Notes 3, 4,
5, 6)
(Notes 3, 4,
5)
Input HIGH Current
I0X–I3X
340
S0, S1, E
300
I0X–I3X
490
S0, S1, E
450
Power Supply Current
−80
−30
µA
0˚C to
+125˚C
µA
−55˚C
mA
−55˚C to
VEE = −5.7V
VIN = VIH (Max)
Inputs Open
+125˚C
(Notes 3, 4,
5)
(Notes 3, 4,
5)
Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissapation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.
Note 4: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.
Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.
Note 6: Guaranteed by applying specified input condition and testing VOH/VOL.
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Military Version
AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
tPLH
Propagation Delay
tPHL
I0x–I3x to Output
tPLH
Propagation Delay
tPHL
S0, S1to Output
tPLH
Propagation Delay
tPHL
E to Output
tTLH
Transition Time
tTHL
20% to 80%, 80% to 20%
TC = −55˚C
TC = +25˚C
TC = +125˚C
Min
Max
Min
Max
Min
Max
0.10
1.90
0.20
1.70
0.20
2.00
ns
0.40
2.70
0.60
2.40
0.50
2.90
ns
Units
Conditions
Figures 1, 2
0.50
2.70
0.60
2.40
0.50
2.90
ns
0.20
1.60
0.30
1.50
0.20
1.60
ns
Notes
(Notes 7,
8, 9, 11)
(Note 10)
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 8: Screen tested 100% on each device at +25˚C temperature only, Subgroup A9.
Note 9: Sample tested (Method 5005, Table I) on each mfg. lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11.
Note 10: Not tested at +25˚C, +125˚C and −55˚C temperature (design characterization data).
Note 11: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
Test Circuitry
DS100975-6
Notes:
VCC, VCCA = +2V, VEE = −2.5V
L1 and L2 = equal length 50Ω impedance lines
RT = 50Ω terminator internal to scope
Decoupling 0.1 µF from GND to VCC and VEE
All unused outputs are loaded with 50Ω to GND
CL = Fixture and stray capacitance ≤ 3 pF
Pin numbers shown are for flatpak; for DIP see logic symbol
FIGURE 1. AC Test Circuit
5
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Switching Waveforms
DS100975-7
FIGURE 2. Propagation Delay and Transition Times
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Physical Dimensions
inches (millimeters) unless otherwise noted
24-Lead Ceramic Dual-In-Line Package (D)
Package Number J24E
24-Lead Ceramic Flatpak (F)
Package Number W24B
7
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100371 Low Power Triple 4-Input Multiplexer with Enable
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ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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