ETC BF721T1/D

ON Semiconductor
BF721T1
PNP Silicon Transistor
ON Semiconductors Preferred Device
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Collector-Emitter Voltage
VCEO
–300
Vdc
Collector-Base Voltage
VCBO
–300
Vdc
Collector-Emitter Voltage
VCER
–300
Vdc
Emitter-Base Voltage
VEBO
–5.0
Vdc
Collector Current
IC
–100
mAdc
Total Power Dissipation up to
TA = 25°C(1)
PD
1.5
Watts
Storage Temperature Range
Tstg
–65 to +150
°C
Junction Temperature
TJ
150
°C
PNP SILICON
TRANSISTOR
SURFACE MOUNT
4
1
2
3
CASE 318E-04, STYLE 1
SOT–223 (TO-261AA)
DEVICE MARKING
DF
THERMAL CHARACTERISTICS
Characteristic
COLLECTOR 2,4
Symbol
Max
Unit
RθJA
83.3
°C/W
Thermal Resistance from Junction to
Ambient(1)
BASE
1
EMITTER 3
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
Collector-Emitter Breakdown Voltage
(IC = –1.0 mAdc, IB = 0)
V(BR)CEO
–300
—
Vdc
Collector-Base Breakdown Voltage
(IC = –100 µAdc, IE = 0)
V(BR)CBO
–300
—
Vdc
Collector-Emitter Breakdown Voltage
(IC = –100 µAdc, RBE = 2.7 kΩ)
V(BR)CER
–300
—
Vdc
Emitter-Base Breakdown Voltage
(IE = –10 µAdc, IC = 0)
V(BR)EBO
–5.0
—
Vdc
Collector-Base Cutoff Current
(VCB = –200 Vdc, IE = 0)
ICBO
—
–10
nAdc
Collector–Emitter Cutoff Current
(VCE = –250 Vdc, RBE = 2.7 kΩ)
(VCE = –200 Vdc, RBE = 2.7 kΩ, TJ = 150°C)
ICER
—
—
–50
–10
nAdc
µAdc
OFF CHARACTERISTICS
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.059 in.; mounting pad for the collector lead min. 0.93 in2.
Preferred devices are ON Semiconductors recommended choices for future use and best overall value.
 Semiconductor Components Industries, LLC, 2001
March, 2001 – Rev. 5
1
Publication Order Number:
BF721T1/D
BF721T1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic
Symbol
Min
Max
Unit
DC Current Gain
(VCE = –25 mAdc, VCE = –20 Vdc)
hFE
50
—
—
Collector-Emitter Saturation Voltage
(IC = –30 mAdc, IB = –5.0 mAdc)
VCE(sat)
—
–0.8
Vdc
fT
60
—
MHz
Cre
—
1.6
pF
ON CHARACTERISTICS
DYNAMIC CHARACTERISTICS
Current-Gain — Bandwidth Product
(VCE = –10 Vdc, IC = –10 mAdc, f = 35 MHz)
Feedback Capacitance
(VCE = –30 Vdc, IC = 0, f = 1.0 MHz)
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BF721T1
300
hFE , DC CURRENT GAIN
VCE = 10 Vdc
TJ = +125°C
250
200
25°C
150
-55°C
100
50
0
0.1
1.0
10
100
IC, COLLECTOR CURRENT (mA)
C, CAPACITANCE (pF)
100
f,
T CURRENT-GAIN BANDWIDTH (MHz)
Figure 1. DC Current Gain
Cib @ 1MHz
10
Ccb @ 1MHz
1.0
0.1
0.1
1.0
10
100
VR, REVERSE VOLTAGE (VOLTS)
150
130
110
90
70
50
30
10
1000
TJ = 25°C
VCE = 20 Vdc
F = 20 MHz
1
Figure 2. Capacitance
3
5
11
13
15
7
9
IC, COLLECTOR CURRENT (mA)
17
19
21
Figure 3. Current–Gain — Bandwidth
1.4
V, VOLTAGE (VOLTS)
1.2
VCE(sat) @ 25°C, IC/IB = 10
VCE(sat) @ 125°C, IC/IB = 10
VCE(sat) @ -55°C, IC/IB = 10
VBE(sat) @ 25°C, IC/IB = 10
1.0
0.8
VBE(sat) @ 125°C, IC/IB = 10
VBE(sat) @ -55°C, IC/IB = 10
VBE(on) @ 25°C, VCE = 10 V
VBE(on) @ 125°C, VCE = 10 V
VBE(on) @ -55°C, VCE = 10 V
0.6
0.4
0.2
0.0
0.1
1.0
10
IC, COLLECTOR CURRENT (mA)
100
Figure 4. ”ON” Voltages
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3
BF721T1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.15
3.8
0.079
2.0
0.091
2.3
0.248
6.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
inches
mm
SOT-223
SOT-223 POWER DISSIPATION
collector pad, the power dissipation can be increased.
Although the power dissipation can almost be doubled with
this method, area is taken up on the printed circuit board
which can defeat the purpose of using surface mount
technology. A graph of RθJA versus collector pad area is
shown in Figure 6.
The power dissipation of the SOT-223 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from the
device junction to ambient, and the operating temperature,
TA. Using the values provided on the data sheet for the
SOT-223 package, PD can be calculated as follows:
R
JA , Thermal Resistance, Junction
to Ambient (C/W)
PD =
160
Board Material = 0.0625″
G10/FR4, 2 oz Copper
140
TJ(max) – TA
RθJA
TA = 25°C
0.8 Watts
° 120
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
1.25 Watts*
1.5 Watts
100
θ
80
0.0
PD = 150°C – 25°C = 1.5 watts
83.3°C/W
*Mounted on the DPAK footprint
0.2
0.4
0.6
A, Area (square inches)
0.8
1.0
Figure 5. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
The 83.3°C/W for the SOT-223 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 1.5 watts.
There are other alternatives to achieving higher power
dissipation from the SOT-223 package. One is to increase
the area of the collector pad. By increasing the area of the
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core board,
the power dissipation can be doubled using the same footprint.
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4
BF721T1
SOLDER STENCIL GUIDELINES
or stainless steel with a typical thickness of 0.008 inches.
Prior to placing surface mount components onto a printed
The stencil opening size for the SOT-223 package should be
circuit board, solder paste must be applied to the pads. A
the same as the pad size on the printed circuit board, i.e., a
solder stencil is required to screen the optimum amount of
1:1 registration.
solder paste onto the footprint. The stencil is made of brass
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
temperature of the device. When the entire device is heated
• When shifting from preheating to soldering, the
to a high temperature, failure to complete soldering within
maximum temperature gradient should be 5°C or less.
a short time could result in device failure. Therefore, the
• After soldering has been completed, the device should
following items should always be observed in order to
be allowed to cool naturally for at least three minutes.
minimize the thermal stress to which the devices are
Gradual cooling should be used as the use of forced
subjected.
cooling will increase the temperature gradient and
• Always preheat the device.
result in latent failure due to mechanical stress.
• The delta temperature between the preheat and
• Mechanical stress or shock should not be applied
soldering should be 100°C or less.*
during cooling
• When preheating and soldering, the temperature of the
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10°C.
TYPICAL SOLDER HEATING PROFILE
graph shows the actual temperature that might be
For any given circuit board, there will be a group of
experienced on the surface of a test board at or near a central
control settings that will give the desired heat pattern. The
solder joint. The two profiles are based on a high density and
operator must set temperatures for several heating zones,
a low density board. The Vitronics SMD310
and a figure for belt speed. Taken together, these control
convection/infrared reflow soldering system was used to
settings make up a heating “profile” for that particular
generate this profile. The type of solder used was 62/36/2
circuit board. On machines controlled by a computer, the
Tin Lead Silver with a melting point between 177–189°C.
computer remembers these profiles from one operating
When this type of furnace is used for solder reflow work, the
session to the next. Figure 6 shows a typical heating profile
circuit boards and solder joints tend to heat first. The
for use when soldering a surface mount device to a printed
components on the board are then heated by conduction. The
circuit board. This profile will vary among soldering
circuit board, because it has a large surface area, absorbs the
systems but it is a good starting point. Factors that can affect
thermal energy more efficiently, then distributes this energy
the profile include the type of soldering system in use,
to the components. Because of this effect, the main body of
density and types of components on the board, type of solder
a component may be up to 30 degrees cooler than the
used, and the type of board or substrate material being used.
adjacent solder joints.
This profile shows temperature versus time. The line on the
STEP 1
PREHEAT
ZONE 1
RAMP"
200°C
STEP 2
STEP 3
VENT
HEATING
SOAK" ZONES 2 & 5
RAMP"
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
150°C
STEP 5
STEP 6 STEP 7
STEP 4
HEATING
VENT COOLING
HEATING
ZONES 3 & 6 ZONES 4 & 7
205° TO
SPIKE"
SOAK"
219°C
170°C
PEAK AT
SOLDER
160°C
JOINT
150°C
100°C
140°C
100°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
50°C
TMAX
TIME (3 TO 7 MINUTES TOTAL)
Figure 6. Typical Solder Heating Profile
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BF721T1
PACKAGE DIMENSIONS
CASE 318E–04
ISSUE H
TO-261AA
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
S
B
1
2
3
D
L
G
J
C
0.08 (0003)
H
M
K
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6
INCHES
DIM MIN
MAX
A
0.249
0.263
B
0.130
0.145
C
0.060
0.068
D
0.024
0.035
F
0.115
0.126
G
0.087
0.094
H 0.0008 0.0040
J
0.009
0.014
K
0.060
0.078
L
0.033
0.041
M
0
10 S
0.264
0.287
STYLE 1:
PIN 1.
2.
3.
4.
BASE
COLLECTOR
EMITTER
COLLECTOR
MILLIMETERS
MIN
MAX
6.30
6.70
3.30
3.70
1.50
1.75
0.60
0.89
2.90
3.20
2.20
2.40
0.020
0.100
0.24
0.35
1.50
2.00
0.85
1.05
0
10 6.70
7.30
BF721T1
Notes
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BF721T1
Thermal Clad is a trademark of the Bergquist Company
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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BF721T1/D