NSC LM4985TM

LM4985
Stereo 135mW Low Noise Headphone Amplifier with
Selectable Capacitively Coupled or Output
Capacitor-less (OCL) Output and Digitally Controlled
(I2C) Volume Control
General Description
Key Specifications (VDD = 3.6V)
The LM4985 is a stereo audio power amplifier with internal
digitally controlled volume control. This amplifier is capable
of delivering 68mWRMS per channel into a 16Ω load or
38mWRMS per channel into a 32Ω load at 1% THD when
powered by a 3.6V power supply and operating in the OCL
mode.
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. To that end, the LM4985 features two
functions that optimize system cost and minimize PCB area:
an integrated, digitally controlled (I2C bus) volume control
and an operational mode that eliminates output signal coupling capacitors (OCL mode). Since the LM4985 does not
require bootstrap capacitors, snubber networks, or output
coupling capacitors, it is optimally suited for low-power, battery powered portable systems. For added design flexibility,
the LM4985 can also be configured for single-ended capacitively coupled outputs.
The LM4985 features a current shutdown mode for micropower dissipation and thermal shutdown protection.
j PSRR: 217Hz and 1kHz
Output Capacitor-less (OCL)
fRIPPLE = 217Hz
77dB (typ)
fRIPPLE = 1kHz
76dB (typ)
Capacitor Coupled (C-CUPL)
fRIPPLE = 217Hz
63dB (typ)
fRIPPLE = 1kHz
62dB (typ)
j Output Power per channel
(fIN = 1kHz, THD+N = 1%),
RL = 16Ω,OCL
VDD = 2.5V
31mW (typ)
VDD = 3.6V
68mW (typ)
VDD = 5.0V
135mW (typ)
j THD+N (f = 1kHz)
RLOAD = 16Ω, OCL, POUT = 60mW
RLOAD = 32Ω, OCL, POUT = 33mW
j Shutdown Current
0.60
0.031
0.1µA (typ)
Features
n OCL or capacitively coupled outputs (patent pending)
n I2C Digitally Controlled Volume Control
n Available in space-saving 0.4mm lead-pitch micro SMD
package
n Volume control range: –76dB to +18dB
n Ultra low current shutdown mode
n 2.3V - 5.5V operation
n Ultra low noise
Applications
n
n
n
n
Mobile Phones
PDAs
Portable electronics devices
MP3 Players
Boomer ® is a registered trademark of National Semiconductor Corporation.
© 2006 National Semiconductor Corporation
DS201697
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LM4985 Stereo 135mW Low Noise Headphone Amplifier with Selectable Capacitive Coupled or
Capacitor-less (OCL) Output and Digitally Controlled (I2C) Volume Control
May 2006
LM4985
Block Diagram
201697E9
FIGURE 1. Block Diagram
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2
LM4985
Typical Application
201697F0
FIGURE 2. Typical Capacitively Coupled Output Configuration Circuit
201697F1
FIGURE 3. Typical OCL Output Configuration Circuit
3
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LM4985
Connection Diagrams
micro SMD Package
micro SMD Marking
20169730
Top View
X – Date Code
T – Die Traceability
G – Boomer Family
H2 – LM4985TM
20169715
Top View
Order Number LM4985TM
See NS Package Number TMD12AAA
Pin Reference, Name, and Function
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Reference
Name
Function
A1
ADR
I2C serial interface address input.
A2
IN2
Analog signal input two.
A3
OUT2
B1
SDA
Power amplifier two output.
I2C serial interface data input.
B2
BYPASS
The internal VDD/2 ac bypass node.
B3
CNTGND
In OCL mode, this is the ac ground
return. It is biased to VDD/2. Leave
unconnected for C-CUPL mode.
C1
SCL
I2C serial interface clock input.
C2
GND
The LM4985’s power supply ground
input.
C3
VDD
The LM4985’s power supply voltage
input.
D1
I2CVDD
I2C serial interface power supply
input. Can be connected to the same
supply that is connected to the VDD
pin.
D2
IN1
D3
OUT1
4
Analog signal input one.
Power amplifier one output.
ESD Susceptibility (Note 5)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Junction Temperature
Supply Voltage (VDD, I2CVDD)
θJA
−65˚C to +150˚C
Input Voltage (ADR, SDA, SCL
pins, relative to the I2CVDD pin)
150˚C
Thermal Resistance
109˚C/W
6.0V
Storage Temperature
Input Voltage (IN1, IN2, OUT1,
OUT2, BYPASS, CNTGND, GND
pins relative to the VDD pin)
200V
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
-0.3V to VDD + 0.3V
−40˚C ≤ T
A
≤ 85˚C
Supply Voltage
-0.3V to I2CVDD + 0.3V
Power Dissipation (Note 3)
Internally Limited
ESD Susceptibility (Note 4)
2000V
2.3V ≤ VCC ≤ 5.5V
VDD
1.7V ≤ I2CVDD ≤ 5.5V
I2CVDD
Electrical Characteristics VDD = 5V (Notes 1, 2)
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA =
25˚C.
Symbol
Parameter
Conditions
LM4985
Typ
(Note 6)
IDD
Quiescent Power Supply Current
ISD
Shutdown Current
VSDIH
Logic Voltage Input High
VSDIL
Logic Voltage Input Low
VIN = 0V, IOUT = 0A
Single-Channel no load OCL
Single-Channel no load C-CUPL
Dual-Channel no load OCL
Dual-Channel no load C-CUPL
2
1.5
3
2.3
VSHUTDOWN = GND
0.1
Limit
(Notes 7,
8)
Units
(Limits)
mA (max)
4.9
3.8
1.0
µA (max)
3.5
V (min)
1.5
V (max)
THD ≤ 1%; fIN = 1kHz
PO
Output Power
RLOAD = 16Ω OCL
135
RLOAD = 16Ω C-CUPL
135
RLOAD = 32Ω OCL
79
RLOAD = 32Ω C-CUPL
80
115
mW (min)
70
THD+N
RLOAD
RLOAD
Total Harmonic Distortion + Noise
RLOAD
RLOAD
VON
Output Noise Voltage
VIN = AC GND, AV = 0dB, A-weighted
15
Power Supply Rejection Ratio
VRIPPLE = 200mVp-p (Note 9)
fIN = 217Hz sinewave
OCL
C-CUPL
77
65
fIN = 1kHz sinewave
OCL
C-CUPL
77
65
Pout = 40mW. OCL
RLOAD = 16Ω
RLOAD= 32Ω
51
56
dB
Pout = 50mW. C-CUPL
RLOAD = 16Ω
RLOAD= 32Ω
58
68
dB
PSRR
Xtalk
Channel-to-channel Crosstalk
=
=
=
=
16Ω
16Ω
32Ω
32Ω
5
OCL, PO = 100mW
C-CUPL, PO = 100mW
OCL, PO = 60mW
C-CUPL, PO = 70mW
0.08
0.02
0.04
0.01
%
µV
57
dB (min)
60
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LM4985
Absolute Maximum Ratings (Notes 1, 2)
LM4985
Electrical Characteristics VDD = 5V (Notes 1, 2)
(Continued)
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA =
25˚C.
Symbol
Parameter
Conditions
LM4985
Typ
(Note 6)
Limit
(Notes 7,
8)
Units
(Limits)
CBYPASS= 4.7µF (Note 11)
Wake Up Time form Shutdown
TWU
WT1 = 0, WT0 = 0
OCL
C-CUPL
75
285
WT1 = 0, WT0 = 1
OCL
C-CUPL
110
530
WT1 = 1, WT0 = 0
OCL
C-CUPL
180
1030
WT1 = 1, WT0 = 1
OCL
C-CUPL
320
2050
msec
RIN
Input Resistance
Stereo mode
Mono mode
20
10
kΩ
AVMIN
Minimum Gain
Code = 00000
–76
dB (min)
AVMAX
Maximum Gain
Code = 11111
18
dB (min)
∆AV
Gain Accuracy per Step
18dB ≥ AV ≥ –44dB
–44dB ≥ AV > –76dB
± 0.5
± 1.0
dB
VOS
Output Offset Voltage
OCL
RLOAD = 32Ω
VIN = AC GND
2.0
20
mV (max)
Electrical Characteristics VDD = 3.6V (Notes 1, 2)
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA =
25˚C.
Symbol
Parameter
Conditions
LM4985
Typ
(Note 6)
Limit
(Notes 7,
8)
Single-Channel no load OCL
1.8
3.1
Single-Channel no load C-CUPL
1.0
Dual-Channel no load OCL
2.1
Dual-Channel no load C-CUPL
2.3
3
VSHUTDOWN = GND
0.1
1.0
Units
(Limits)
VIN = 0V, IOUT = 0A
IDD
Quiescent Power Supply Current
4
mA (max)
ISD
Shutdown Current
VSDIH
Logic Voltage Input High
2.52
V (min)
VSDIL
Logic Voltage Input Low
1.08
V (max)
µA (max)
THD+N < 1%, fIN = 1kHz
PO
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Output Power
RLOAD = 16Ω OCL
68
RLOAD = 16Ω C-CUPL
70
RLOAD = 32Ω OCL
38
RLOAD = 32Ω C-CUPL
41
6
60
mW (min)
34
(Continued)
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA =
25˚C.
Symbol
Parameter
Conditions
LM4985
Typ
(Note 6)
=
=
=
=
16Ω
16Ω
32Ω
32Ω
OCL, PO = 60mW
C-CUPL, PO = 60mW
OCL, PO = 33mW
C-CUPL, PO = 38mW
Limit
(Notes 7,
8)
Units
(Limits)
0.06
0.03
0.03
0.03
%
µV
THD+N
RLOAD
RLOAD
Total Harmonic Distortion + Noise
RLOAD
RLOAD
VON
Output Noise Voltage
VIN = AC GND, AV = 0dB, A-weighted
15
Power Supply Rejection Ratio
VRIPPLE = 200mVp-p (Note 9)
fIN = 217Hz sinewave
OCL
C-CUPL
77
63
fIN = 1kHz sinewave
OCL
C-CUPL
76
62
Pout = 40mW. OCL
RLOAD = 16Ω
RLOAD= 32Ω
51
56
dB
Pout = 50mW. C-CUPL
RLOAD = 16Ω
RLOAD= 32Ω
58
69
dB
PSRR
Xtalk
Channel-to-Channel Crosstalk
55
dB (min)
57
CBYPASS= 4.7µF (Note 11)
TWU
Wake Up Time from Shutdown
RIN
Input Resistance
WT1 = 0, WT0 = 0
OCL
C-CUPL
66
222
WT1 = 0, WT0 = 1
OCL
C-CUPL
92
405
WT1 = 1, WT0 = 0
OCL
C-CUPL
143
774
WT1 = 1, WT0 =1
OCL
C-CUPL
246
1532
Stereo mode
Mono mode
20
10
93
msec
kΩ
AVMIN
Minimum Gain
Code = 00000
–76
–72
dB (max)
AVMAX
Maximum Gain
Code = 11111
18
17
dB (min)
∆AV
Gain Accuracy per Step
18dB ≥ AV ≥–44dB
–44dB ≥ AV > –76dB
± 0.5
± 1.0
± 1.0
± 2.0
dB
VOS
Output Offset Voltage
OCL
RLOAD = 32Ω
VIN = AC GND
2.0
20
mV (max)
7
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LM4985
Electrical Characteristics VDD = 3.6V (Notes 1, 2)
LM4985
Electrical Characteristics VDD = 2.5V (Notes 1, 2)
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA =
25˚C.
Symbol
Parameter
Conditions
LM4985
Typ
(Note 6)
Limit
(Notes 7,
8)
Units
(Limits)
IDD
Quiescent Power Supply Current
VIN = 0V, IOUT = 0A
Single-Channel no load OCL
Single-Channel no load C-CUPL
Dual-Channel no load OCL
Dual-Channel no load C-CUPL
ISD
Shutdown Current
VSHUTDOWN = GND
VSDIH
Logic Voltage Input High
1.75
V (min)
VSDIL
Logic Voltage Input Low
0.75
V (max)
THD+N < 1%, fIN = 1kHz
RLOAD = 16Ω OCL
RLOAD = 16Ω C-CUPL
RLOAD = 32Ω OCL
RLOAD = 32Ω C-CUPL
PO
Output Power
THD+N
RLOAD
RLOAD
Total Harmonic Distortion + Noise
RLOAD
RLOAD
VON
Output Noise Voltage
Power Supply Rejection Ratio
PSRR
Xtalk
Channel-to-Channel Crosstalk
=
=
=
=
16Ω
16Ω
32Ω
32Ω
OCL, PO = 26mW
C-CUPL, PO = 20mW
OCL, PO = 16mW
C-CUPL, PO = 15mW
1.6
1
2.1
1.6
0.1
31
33
19
19
mA
µA
mW
0.07
0.05
0.06
0.04
%
VIN = AC GND, AV = 0dB, A-weighted
10
µV
VRIPPLE = 200mVp-p (Note 9)
fIN = 217Hz sinewave
OCL
C-CUPL
75
59
dB
fIN = 1kHz sinewave
OCL
C-CUPL
75
59
Pout = 20mW, OCL
RLOAD = 16Ω
RLOAD= 32Ω
50
55
dB
Pout = 20mW. C-CUPL
RLOAD = 16Ω
RLOAD= 32Ω
58
67
dB
CBYPASS = 4.7µF (Note 11)
TWU
Wake Up Time from Shutdown
WT1 = 0, WT0 = 0
OCL
C-CUPL
66
214
WT1 = 0, WT0 = 1
OCL
C-CUPL
92
544
WT1 = 1, WT0 = 0
OCL
C-CUPL
145
1053
WT1 = 1, WT0 = 1
OCL
C-CUPL
250
2098
msec
RIN
Input Resistance
Stereo mode
Mono mode
20
10
kΩ
AVMIN
Minimum Gain
Code = 00000
–76
dB
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8
(Continued)
The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA =
25˚C.
Symbol
Parameter
Conditions
LM4985
Typ
(Note 6)
Maximum Gain
Code = 11111
∆AV
Gain Accuracy per Step
18dB ≥ AV ≥ –44dB
–44dB ≥ AV > –76dB
VOS
Output Offset Voltage
OCL
RLOAD = 32Ω
VIN = AC GND
AVMAX
Limit
(Notes 7,
8)
Units
(Limits)
18
dB
± 0.5
± 1.0
dB
2.0
mV
Note 1: All voltages are measured with respect to the GND pin unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum
allowable power dissipation is PDMAX = (TJMAX - TA)/ θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4985, see power derating
currents for more information.
Note 4: Human Body Model: 100pF discharged through a 1.5kΩ resistor.
Note 5: Machine Model: 200pF ≤ Cmm ≤ 220pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: 10Ω terminated input.
Note 10: The LDA10A package has its exposed-DAP soldered to an exposed 1.2in2 area of 1oz. Printed circuit board copper.
Note 11: The wake-up time (TWU) is calculated using the following formula; TWU = [CBYPASS (VDD) / 2 (IBYPASS)] + 40ms.
External Components Description
Components
(Figure 2)
Functional Description
1.
CI
Input coupling capacitor which blocks the DC voltage at the amplifier’s input terminals. Also creates a
high-pass filter with Ri at fc = 1/(2πRiCi). Refer to the section Proper Selection of External Components, for
an explanation of how to determine the value of Ci.
2.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
3.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of Proper
Components, for information concerning proper placement and selection of CB
6.
Co
Output coupling capacitor which blocks the DC voltage at the amplifier’s output. Forms a high pass filter with
RL at fo = 1/(2πRLCo)
9
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LM4985
Electrical Characteristics VDD = 2.5V (Notes 1, 2)
LM4985
Typical Performance Characteristics
TA = 25˚C, AV = 0dB, fIN = 1kHz unless otherwise stated.
THD+N vs Frequency
VDD = 3.6V, RL = 16Ω
POUT = 50mW, C-CUPL
THD+N vs Frequency
VDD = 2.5V, RL = 16Ω
POUT = 20mW, C-CUPL
201697D1
201697D2
THD+N vs Frequency
VDD = 2.5V, RL = 32Ω
POUT = 15mW, C-CUPL
THD+N vs Frequency
VDD = 5V, RL = 16Ω
POUT = 50mW, C-CUPL
201697D3
201697D4
THD+N vs Frequency
VDD = 5.0V, RL = 32Ω
POUT = 60mW, C-CUPL
THD+N vs Frequency
VDD = 3.6V, RL = 32Ω
POUT = 35mW, C-CUPL
201697D5
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201697D6
10
LM4985
Typical Performance Characteristics
(Continued)
THD+N vs Frequency
VDD = 3.6V, RL = 16Ω
POUT = 50mW, OCL
THD+N vs Frequency
VDD = 2.5V, RL = 16Ω
POUT = 20mW, OCL
20169764
20169765
THD+N vs Frequency
VDD = 2.5V, RL = 32Ω
POUT = 15mW, OCL
THD+N vs Frequency
VDD = 5.0V, RL = 16Ω
POUT = 50mW, OCL
20169767
20169766
THD+N vs Frequency
VDD = 5.0V, RL = 32Ω
POUT = 60mW, OCL
THD+N vs Frequency
VDD = 3.6V, RL = 32Ω
POUT = 35mW, OCL
20169768
20169769
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LM4985
Typical Performance Characteristics
(Continued)
THD+N vs Output Power
VDD = 2.5V, RL = 16Ω
C-CUPL
THD+N vs Output Power
VDD = 3.6V, RL = 16Ω
C-CUPL
201697H3
201697C6
THD+N vs Output Power
VDD = 2.5V, RL = 32Ω
C-CUPL
THD+N vs Output Power
VDD = 5.0V, RL = 16Ω
C-CUPL
201697F2
201697C7
THD+N vs Output Power
VDD = 5.0V, RL = 32Ω
C-CUPL
THD+N vs Output Power
VDD = 3.6V, RL = 32Ω
C-CUPL
201697H4
201697F3
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LM4985
Typical Performance Characteristics
(Continued)
THD+N vs Output Power
VDD = 2.5V, RL = 16Ω
OCL
THD+N vs Output Power
VDD = 3.6V, RL = 16Ω
OCL
20169758
20169759
THD+N vs Output Power
VDD = 2.5V, RL = 32Ω
OCL
THD+N vs Output Power
VDD = 5.0V, RL = 16Ω
OCL
20169761
20169760
THD+N vs Output Power
VDD = 5.0V, RL = 32Ω
OCL
THD+N vs Output Power
VDD = 3.6V, RL = 32Ω
OCL
20169762
20169763
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LM4985
Typical Performance Characteristics
(Continued)
PSRR vs Frequency
VDD = 3.6V, RL = 16Ω
VRIPPLE = 200mVpp, OCL
PSRR vs Frequency
VDD = 2.5V, RL = 16Ω
VRIPPLE = 200mVpp, OCL
20169776
201697H5
PSRR vs Frequency
VDD = 2.5V, RL = 32Ω
VRIPPLE = 200mVpp, OCL
PSRR vs Frequency
VDD = 5.0V, RL = 16Ω
VRIPPLE = 200mVpp, OCL
201697H6
201697H7
PSRR vs Frequency
VDD = 5.0V, RL = 32Ω
VRIPPLE = 200mVpp, OCL
PSRR vs Frequency
VDD = 3.6V, RL = 32Ω
VRIPPLE = 200mVpp, OCL
201697H8
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201697H9
14
LM4985
Typical Performance Characteristics
(Continued)
PSRR vs Frequency
VDD = 3.6V, RL = 16Ω
VRIPPLE = 200mVpp, C-CUPL
PSRR vs Frequency
VDD = 2.5V, RL = 16Ω
VRIPPLE = 200mVpp, C-CUPL
201697I0
201697I1
PSRR vs Frequency
VDD = 2.5V, RL = 32Ω
VRIPPLE = 200mVpp, C-CUPL
PSRR vs Frequency
VDD = 5.0V, RL = 16Ω
VRIPPLE = 200mVpp, C-CUPL
201697I2
201697I3
PSRR vs Frequency
VDD = 5.0V, RL = 32Ω
VRIPPLE = 200mVpp, C-CUPL
PSRR vs Frequency
VDD = 3.6V, RL = 32Ω
VRIPPLE = 200mVpp, C-CUPL
201697I4
201697I5
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LM4985
Typical Performance Characteristics
(Continued)
Crosstalk vs Frequency
VDD = 3.6V, RL = 16Ω
POUT = 40mW, OCL
Crosstalk vs Frequency
VDD = 2.5V, RL = 16Ω
POUT = 20mW. OCL
201697I6
201697G8
Crosstalk vs Frequency
VDD = 2.5V, RL = 32Ω
POUT = 20mW, OCL
Crosstalk vs Frequency
VDD = 5.0V, RL = 16Ω
POUT = 40mW, OCL
201697G9
201697H0
Crosstalk vs Frequency
VDD = 5.0V, RL = 32Ω
POUT = 50mW, OCL
Crosstalk vs Frequency
VDD = 3.6V, RL = 32Ω
POUT = 40mW, OCL
201697H1
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201697H2
16
LM4985
Typical Performance Characteristics
(Continued)
Crosstalk vs Frequency
VDD = 3.6V, RL = 16Ω
POUT = 50mW, C-CUPL
Crosstalk vs Frequency
VDD = 2.5V, RL = 16Ω
POUT = 20mW, C-CUPL
201697D7
201697D8
Crosstalk vs Frequency
VDD = 2.5V, RL = 32Ω
POUT = 20mW, C-CUPL
Crosstalk vs Frequency
VDD = 5.0V, RL = 16Ω
POUT = 50mW, C-CUPL
201697D9
201697E0
Crosstalk vs Frequency
VDD = 5.0V, RL = 32Ω
POUT = 50mW, C-CUPL
Crosstalk vs Frequency
VDD = 3.6V, RL = 32Ω
POUT = 50mW, C-CUPL
201697E2
201697E1
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LM4985
Typical Performance Characteristics
(Continued)
Load Dissipation vs Amplifier Dissipation
VDD = 2.5V, C-CUPL
Load Dissipation vs Amplifier Dissipation
VDD = 3.6V, C-CUPL
20169755
20169756
Load Dissipation vs Amplifier Dissipation
VDD = 5.0V, C-CUPL
Load Dissipation vs Amplifier Dissipation
VDD = 2.5V, OCL
20169757
20169738
Load Dissipation vs Amplifier Dissipation
VDD = 3.6V, OCL
Load Dissipation vs Amplifier Dissipation
VDD = 5.0V, OCL
20169739
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20169740
18
LM4985
Typical Performance Characteristics
(Continued)
Output Power vs Load Resistance
VDD = 2.5V, C-CUPL
Output Power vs Load Resistance
VDD = 3.6V, C-CUPL
20169741
20169742
Output Power vs Load Resistance
VDD = 2.5V, OCL
Output Power vs Load Resistance
VDD = 5.0V, C-CUPL
20169743
20169744
Output Power vs Load Resistance
VDD = 5.0V, OCL
Output Power vs Load Resistance
VDD = 3.6V, OCL
20169746
20169745
19
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LM4985
Typical Performance Characteristics
(Continued)
Output Power vs Supply Voltage
RL = 16Ω, C-CUPL
Output Power vs Supply Voltage
RL = 32Ω, C-CUPL
20169748
20169747
Output Power vs Supply Voltage
RL = 32Ω, OCL
Output Power vs Supply Voltage
RL = 16Ω, OCL
20169750
20169749
Supply Current vs Supply Voltage
RL = 32Ω, C-CUPL
Supply Current vs Supply Voltage
RL = 16Ω, C-CUPL
20169751
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20169752
20
LM4985
Typical Performance Characteristics
(Continued)
Supply Current vs Supply Voltage
RL = 16Ω, OCL
Supply Current vs Supply Voltage
RL = 32Ω, OCL
20169754
20169753
Gain vs Volume Steps
VCC = 3.6V, RL = 16Ω, OCL
Gain vs Volume Steps
VCC = 2.5V, RL = 16Ω, OCL
201697F7
201697F5
Gain vs Volume Steps
VCC = 2.5V, RL = 16Ω, C-CUPL
Gain vs Volume Steps
VCC = 5V, RL = 16Ω, OCL
201697F6
201697G4
21
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LM4985
Typical Performance Characteristics
(Continued)
Gain vs Volume Steps
VCC = 3.6V, RL = 16Ω, C-CUPL
Gain vs Volume Steps
VCC = 5V, RL = 16Ω, C-CUPL
201697G0
201697G3
Gain vs Volume Steps
VCC = 3.6V, RL = 32Ω, OCL
Gain vs Volume Steps
VCC = 2.5V, RL = 32Ω, OCL
201697G2
201697F9
Gain vs Volume Steps
VCC = 2.5V, RL = 32Ω, C-CUPL
Gain vs Volume Steps
VCC = 5V, RL = 32Ω, OCL
201697G6
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201697F8
22
LM4985
Typical Performance Characteristics
(Continued)
Gain vs Volume Steps
VCC = 3.6V, RL = 32Ω, C-CUPL
Gain vs Volume Steps
VCC = 5V, RL = 32Ω, C-CUPL
201697G1
201697G5
23
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LM4985
The maximum power dissipation point obtained from Equation 1 or Equation 2 must not be greater than the power
dissipation that results from Equation 3:
Application Information
AMPLIFIER CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4985 has three internal power
amplifiers. Two of the amplifiers which amplify signals applied to their inputs, have internally configurable gain. The
remaining third amplifier provides both half-supply output
bias and AC ground return.
PDMAX = (TJMAX - TA) / θJA
For package TMD12AAA, θJA = 190˚C/W. TJMAX = 150˚C for
the LM4985. Depending on the ambient temperature, TA, of
the system surroundings, Equation 3 can be used to find the
maximum internal power dissipation supported by the IC
packaging. If the result of Equation 2 is greater than that of
Equation 3, then either the supply voltage must be decreased, the load impedance increased or TA reduced.
Loads, such as a headphone speaker, are connected between OUT1 and CNTGND or OUT2 and CNTGND. This
configuration does not require an output coupling capacitor.
The classical single-ended amplifier configuration, where
one side of the load is connected to ground, requires large,
expensive output coupling capacitors.
For a typical application using a 3.6V power supply, with a
32Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 144˚C provided that device operation is around the
maximum power dissipation point. Thus, for typical applications, power dissipation is not an issue. Power dissipation is
a function of output power and thus, if typical operation is not
around the maximum power dissipation point, the ambient
temperature may be increased accordingly. Refer to the
Typical Performance Characteristics curves for power dissipation information for lower output powers.
A configuration such as the one used in the LM4985 has a
major advantage over single supply, single-ended amplifiers.
Since the outputs OUT1, OUT2, and CNTGND are all biased
at 1/2 VDD, no net DC voltage exists across each load. This
eliminates the need for output coupling capacitors which are
required in a single-supply, single-ended amplifier configuration. Without output coupling capacitors in a typical singlesupply, single-ended amplifier, the bias voltage is placed
across the load resulting in both increased internal IC power
dissipation and possible loudspeaker damage.
The LM4985 eliminates these output coupling capacitors
when operating in Output Capacitor-less (OCL) mode. Unless shorted to ground, VoC is internally configured to apply
a 1/2 VDD bias voltage to a stereo headphone jack’s sleeve.
This voltage matches the bias voltage present on VoA and
VoB outputs that drive the headphones. The headphones
operate in a manner similar to a bridge-tied load (BTL).
Because the same DC voltage is applied to both headphone
speaker terminals this results in no net DC current flow
through the speaker. AC current flows through a headphone
speaker as an audio signal’s output amplitude increases on
the speaker’s terminal.
The headphone jack’s sleeve is not connected to circuit
ground when used in OCL mode. Using the headphone
output jack as a line-level output will place the LM4985’s 1/2
VDD bias voltage on a plug’s sleeve connection. This presents no difficulty when the external equipment uses capacitively coupled inputs. For the very small minority of equipment that is DC coupled, the LM4985 monitors the current
supplied by the amplifier that drives the headphone jack’s
sleeve. If this current exceeds 500mAPEAK, the amplifier is
shutdown, protecting the LM4985 and the external equipment.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is important
for low noise performance and high power supply rejection.
The capacitor location on the power supply pins should be
as close to the device as possible.
Typical applications employ a regulator with 10µF tantalum
or electrolytic capacitor and a ceramic bypass capacitor
which aid in supply stability. This does not eliminate the need
for bypassing the supply nodes of the LM4985. A bypass
capacitor value in the range of 0.1µF to 1µF is recommended
for CS.
MICRO POWER SHUTDOWN
The LM4985’s micropower shutdown is activated or deactivated through its I2C digital interface . Please refer to Table
1 for the I2C Address, Register Select, and Mode Control
registers. Each amplifier within the LM4985 can be shutdown individually.
Please observe the following protocol when placing an individual amplifier channel in shutdown while the other channel
remains active. The protocol requires activating both channels’ shutdown simultaneously, then deactivating the shutdown of the channel whose output is desired (or leaving the
desire channel in shutdown mode). Also, when operating in
the C-CUPL mode, a short delay time is required between
activating one channel after placing both channels in shutdown. If the user finds that both channels activate when only
one was chosen, increase the delay.
POWER DISSIPATION
Power dissipation is a major concern when using any power
amplifier. When operating in capacitor-coupled mode (CCUPL), Equation 1 states the maximum power dissipation
point for a single-ended amplifier operating at a given supply
voltage and driving a specified output load.
PDMAX = 2(VDD)
2
/ (2π2RL)
SELECTION OF INPUT CAPACITOR SIZE
Amplifying the lowest audio frequencies requires a high
value input coupling capacitor, Ci. A high value capacitor can
be expensive and may compromise space efficiency in portable designs. In many cases, however, the headphones
used in portable systems have little ability to reproduce
signals below 60Hz. Applications using headphones with this
limited frequency response reap little improvement by using
a high value input capacitor.
In addition to system cost and size, turn on time is affected
by the size of the input coupling capacitor Ci. A larger input
(1)
When operating in the OCL mode, the LM4985’s three operational amplifiers produce a maximum power dissipation
given in Equation 2:
PDMAX = [2(VDD)
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2
/ (2π2RL)] + [VDD2 / (4πRL)]
(3)
(2)
24
to 32Ω. The ratio of this voltage divider will determine the
magnitude of any residual signal present at the CNT_GND
pin. It is this residual signal that leads to channel-to-channel
separation (crosstalk) degradation.
(Continued)
coupling capacitor requires more charge to reach its quiescent DC voltage. This charge comes from the output via the
feedback Thus, by minimizing the capacitor size based on
necessary low frequency response, turn-on time can be
minimized. A small value of Ci (in the range of 0.22µF to
0.68µF), is recommended.
For example, for a 60dB channel-to-channel separation
while driving a 16Ω load, the resistance between the
LM4985’s CNT_GND pin and the load must be less than
16mΩ. This is achieved by ensuring that the trace that
connects the CNT_GND pin to the headphone jack sleeve
should be as short and massive as possible, given the
physical constraints of any specific printed circuit board layout and design.
MAXIMIZING OCL MODE CHANNEL-to-CHANNEL
SEPARATION
The OCL mode AC ground return (CNT_GND pin) is shared
by both amplifiers. As such, any resistance between the
CNT_GND pin and the load will create a voltage divider with
respect to the load resistance. In a typical circuit, the amount
of CNT_GND resistance can be very small, but still significant. It is significant because of the relatively low load impedances for which the LM4985 was designed to drive: 16Ω
DEMONSTRATION BOARD AND PCB LAYOUT
Information concerning PCB layout considerations and demonstration board use and performance is found in Application
Note AN-1452.
25
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LM4985
Application Information
LM4985
I2C Control Register
Table 1 shows the actions that are implemented by manipulating the bits within the two internal I2C control registers.
Table 1. LM4985 I2C Control Register Addressing and Data Format Chart
LM4985 I2C Contorl Register Addressing and Data Chart
A6
I2C
Address
Register
Select
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A4
A3
A2
A1
A0
Function
1
1
0
0
1
1
A0
D7
D6
D5
D4
D3
D2
RS1
RS0
0
0
0
0
0
0
0
0
Read and write the mode
control register
0
0
0
0
0
0
0
1
Read and write the volume
control register
D7
Mode
Control
Register
A5
D6
D5
D4
D3
D2
D1
D0
WT1
WT0
PHG
SDCH1
SDCH2
CHSEL1
CHSEL2
0
X
X
X
X
X
X
X
D7 must always be set to 0
–
0
0
X
X
X
X
X
Wake-up time: 80ms (OCL),
250ms (C-CUPL)
–
0
1
X
X
X
X
X
Wake-up time: 110ms (OCL),
450ms (C-CUPL)
–
1
0
X
X
X
X
X
Wake-up time: 170ms (OCL),
850ms (C-CUPL)
–
1
1
X
X
X
X
X
Wake-up time: 290ms (OCL),
1650ms (C-CUPL)
–
X
X
1
X
X
X
X
Output capacitor-less mode
active
–
X
X
0
X
X
X
X
Output capacitor-less mode
inactive
–
X
X
X
0
0
X
X
Amplifier’s SHUTDOWN
mode active
–
X
X
X
0
1
X
X
Illegal mode
–
X
X
X
1
0
X
X
Illegal mode
–
X
X
X
1
1
X
X
Amplifier’s SHUTDOWN
mode inactive
–
X
X
X
X
X
0
02
Amplifier’s Chan. 1 is Input 1,
Chan 2. is Input 2
–
X
X
X
X
X
0
1
Amplifier’s Chan. 1 is Input 1,
Chan 2. is Input 1
–
X
X
X
X
X
1
0
Amplifier’s Chan. 1 is Input 2,
Chan 2. is Input 2
–
X
X
X
X
X
1
1
Amplifier’s Chan. 1 is Input 2,
Chan 2. is Input 1
26
The minimum volume setting is set to –76dB when 00000 is loaded into the volume control register. Incrementing the volume
control register in binary fashion increases the volume control setting, reaching full scale at 11111. Table C1 shows the value of
the gain for each of the 32 binary volume control settings.
Table C1. Binary Values for the Different Volume Control Gain Settings
Gain
B4
B3
B2
B1
B0
18
1
1
1
1
1
17
1
1
1
1
0
16
1
1
1
0
1
15
1
1
1
0
0
14
1
1
0
1
1
13
1
1
0
1
0
12
1
1
0
0
1
10
1
1
0
0
0
8
1
0
1
1
1
6
1
0
1
1
0
4
1
0
1
0
1
2
1
0
1
0
0
0
1
0
0
1
1
–2
1
0
0
1
0
–4
1
0
0
0
1
–6
1
0
0
0
0
–8
0
1
1
1
1
–10
0
1
1
1
0
–12
0
1
1
0
1
–14
0
1
1
0
0
–16
0
1
0
1
1
–18
0
1
0
1
0
–21
0
1
0
0
1
–24
0
1
0
0
0
–27
0
0
1
1
1
–30
0
0
1
1
0
–34
0
0
1
0
1
–38
0
0
1
0
0
–44
0
0
0
1
1
–52
0
0
0
1
0
–62
0
0
0
0
1
–76
0
0
0
0
0
27
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LM4985
Volume Control Settings Binary Values
LM4985
Revision History
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Rev
Date
Description
1.0
05/17/06
Initial WEB release.
28
inches (millimeters) unless otherwise noted
micro SMD
Order Number LM4985TM
NS Package Number TMD12AAA
X1 = 1.215mm ± 0.03mm X2 = 1.615mm ± 0.03mm X3 = 0.600mm ± 0.075mm
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
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device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
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LM4985 Stereo 135mW Low Noise Headphone Amplifier with Selectable Capacitive Coupled or
Capacitor-less (OCL) Output and Digitally Controlled (I2C) Volume Control
Physical Dimensions