Agilent HMMC-5033 17.7–32 GHz Power Amplifier Data Sheet Features Chip Size: Chip Size Tolerance: Chip Thickness: Pad Dimensions: Description The HMMC-5033 is a MMIC power amplifier designed for use in wireless transmitters that operate within the 17.7 GHz to 32 GHz range. At 28 GHz it provides 26 dBm of output power (P−1dB) and 18 dB of small–signal gain from a small easy–to–use device. The HMMC-5033 was designed to be driven by the HMMC-5040 (20– 40 GHz) or the HMMC-5618 (5.9–20 GHz) MMIC amplifier for linear transmit applications. This device has input and output matching circuitry for use in 50 ohm environments. 2.74 × 1.31 mm (108 × 51.6 mils) ±10 µm (±0.4 mils) 127 ± 15 µm (5.0 ± 0.6 mils) See Page 6 •26 dBm Output P(-1dB) at 28 GHz •High Gain: 18 dB •50Ω Input/Output Matching •Small Size •RF Detector Network Absolute Maximum Ratings[1] Symbol Parameters/Conditions VD1,2 Drain Supply Voltages VG1,VGG Gate Supply Voltages ID1 Min. Max. Units 5.2 Volts 0.5 Volts First Stage Drain Current 320 mA ID2 Second Stage Drain Current 640 mA Pin RF Input Power 23 dBm Det.Bias Applied Detector Bias (Optional) 5.2 Volts Tch Channel Temperature [2] 170 °C TA Backside Ambient Temperature −55 +85 °C Tst Storage Temperature −65 +170 °C Tmax Maximum Assembly Temperature 300 °C −3.0 Notes: 1. Absolute maximum ratings for continuous operation unless otherwise noted. 2. Refer to DC Specifications / Physical Properties table for derating information. 1 DC Specifications/Physical Properties[1] Symbol Parameters/Conditions VD1 Min. Typ. Max. Units Drain Supply Operating Voltage 3.5 5 Volts VD2 Drain Supply Operating Voltage 5 5 Volts ID1 First Stage Drain Supply Current (VD1 = 3.5 V, VG1 = Open, VGG set for ID2 typical) 240 320 mA ID2 Second Stage Drain Supply Current (VD2 = 5 V, V GG ≅ −0.8 V) 460 640 mA VG1,VGG Gate Supply Operating Voltages (ID1 + ID2 ≅ 700 mA) −0.8 VP Pinch-off Voltage [V DD = 2.5 V, (ID1 + I D2) ≤ 20 mA] Det.Bias Volts −1.2 −0.8 Volts Detector Bias Voltage (Optional) VD2 5 Volts θ1(ch-bs) First Stage Thermal Resistance[2] (Channel–to–Backside at T ch = 160°C) 67 °C/Watt θ2(ch-bs) Second Stage Thermal Resistance[2] (Channel–to–Backside at T ch = 160°C) 37 °C/Watt 160 °C Tch χ2.5 Second Stage Channel Temperature [3] (TA = 75°C, MTTF > 106 hrs, VD2 = 5 V, ID2 = 460 mA) Notes: 1. Backside ambient operating temperature T A = 25°C unless otherwise noted. 2. Thermal resistance (°C/Watt) at a channel temperature T(°C) can be estimated using the equation: θ(T) ≅ qch-bs ¥ [T(°C)+273] / [160°C+273]. 3. Derate MTTF by a factor of two for every 8°C above Tch . RF Specifications (TA = 25°C, Z0 = 50Ω, VD1 = 3.5 V, VD2 = 5 V, ID2 = 460 mA [ID1 ≅ 240 mA]) Symbol Parameters/Conditions Lower Band Specifications Min. Typ. 17.7 Mid Band Specifications Max. Min. 21 Typ. 21 Upper Band Specifications Max. Min. Operating Bandwidth Gain Small Signal Gain 17 22 17 20 15 18 dB P -1dB Output Power at 1dB Gain Compression 22 23 24 25 25 26 dBm P SAT Saturated Output Power[1] 28 dBm (RLin)MIN Min. Input Return Loss 8 10 9 12 10 12 dB (RLout)MIN Min. Output Return Loss 15 20 15 20 15 20 dB Isolation Min. Reverse Isolation 50 dB 50 27 50 Notes: 1. Devices operating continuously beyond 1 dB gain compression may experience power degradation. 2 25 Units Max. BW 25 26.5 Typ. 31.5 GHz Applications ed for I D1 + ID2 = 700 mA. The HMMC-5033 MMIC is a broadband power amplifier designed for use in transmitters that operate in various frequency bands between 17.7 GHz and 32 GHz. It can be attached to the output of the HMMC-5040 (20– 40 GHz) or the HMMC-5618 (5.9–20 GHz) MMIC amplifier, increasing the power handling capability of transmitters requiring linear operation. Muting can be accomplished by setting VG1 and/or VGG to the pinchoff voltage VP. Biasing and Operation The recommended DC bias condition for optimum efficiency, performance, and reliability is VD1 = 3.5 volts and VD2 = 5 volts with V GG set for ID1 + ID2 = 700 mA (no connection to V G1). This bias arrangement results in default drain currents ID1 = 240 mA and I D2 = 460 mA. A single DC gate supply connected to VGG will bias all gain stages. If operation with both VD1 and VD2 at 5 volts is desired, an additional wire bond connection from the VG1 pad to the VGG external bypass chip-capacitor (shorting VG1 to VGG) will balance the currents in each gain stage. VGG (= VG1) can be adjust- An on chip RF output power detector network is provided. The differential voltage between the Det–Ref and Det–Out pads can be correlated with the RF power emerging from the RF Output port. Bias the diodes at ~200 mA. The RF ports are AC–coupled at the RF input to the first stage and the RF output of the second stage. If the output detector is biased using the on–chip optional DetBias network, an external AC– blocking capacitor may be required at the RF Output port. No ground wires are needed since ground connections are made with plated through–holes to the backside of the device. GaAs MMICs are ESD sensitive. ESD preventive measures must be employed in all aspects of storage, handling, and assembly. MMIC ESD precautions, handling considerations, die attach and bonding methods are critical factors in successful GaAs MMIC performance and reliability. Agilent application note #54, "GaAs MMIC ESD, Die Attach and Bonding Guidelines" provides basic information on these subjects. Additional References: AN# 52, "1 Watt 17.7 GHz– 32 GHz Linear Power Amplifier," and PN# 6, "HMMC-5033 Intermodulation Distortion." Assembly Techniques It is recommended that the electrical connections to the bonding pads be made using 0.7–1.0 mil diameter gold wire. The microwave/millimeter–wave connections should be kept as short as possible to minimize inductance. For assemblies requiring VD1 VD2 Det. Out R3 RF Input long bond wires, multiple wires can be attached to the RF bonding pads. Stage 1 D1 C Stage 2 R3 R1 R1=250Ω R2=1KΩ R3=10KΩ Ref. D2 R2 VG1 (Optional) RF Output Det. Bias (Optional) Det. Reference R3 VG2 = VGG Figure 1. Simplified Schematic Diagram 3 0 20 30 40 50 60 70 80 Input Return Loss (dB) 10 90 5 10 10 15 20 20 Output RL 25 28 31 26 26 P−1dB 24 22 22 500 600 700 800 900 IDD (mA) 20 1000 15 8 6 4 Effic. 2 22 24 RF Output Power (dBm) 26 Figure 6. Gain Compression and Efficiency at 28 GHz 4 28 30 0 Gain (dB) 10 20 35 27 P−1dB 23 19 18 20 22 24 26 28 30 Frequency (GHz) 32 34 VD1=3.5V, V D2=5.0V 16 12 18 30 15 36 Figure 5. Output Power vs. Frequency 14 16 45 Psat 23 19 20 18 Gain 14 40 35 31 27 22 Efficiency (%) Gain (dB) VD1=3.5V, VD2 = 5.0V 12 25 30 Frequency (GHz) VD1=3.5V, V D2=5V, I D1=240mA, ID2=460mA Figure 4. Output Power vs. Total Drain Current 26 24 22 20 18 16 14 12 10 8 6 4 2 0 10 20 P-1dB (dBm) 35 P sat (dBm) P sat (dBm) 30 P-1dB (dBm) Psat 24 15 25 Figure 3. Input and Output Return Loss vs. Frequency VD1=3.5V, VD2=5V, I D1=240mA, I D2=460mA 28 15 Input RL Figure 2. Gain and Isolation vs. Frequency 30 5 (17.7–31.5 GHz) 26 24 22 20 18 16 14 12 10 8 6 4 2 0 10 1020 940 Gain 860 780 IDD 700 620 540 12 14 16 18 20 22 24 RF Output Power (dBm) 26 Figure 7. Gain and Total Drain Current vs. Output Power 28 30 IDD (mA) Frequency (GHz) 0 Spec. Range 30 10 100 45 40 VD1=3.5V, VD2=5V, ID1=240mA, ID2=460mA Output Return Loss (dB) 0 Isolation Small-Signal Gain (dB) VD1=3.5V, V D2=5V, ID1=240mA, ID2=460mA 26 24 22 Gain 20 18 16 Spec. Range 14 (17.7–31.5 GHz) 12 10 8 Isolation 6 4 2 0 10 15 20 25 30 35 VDD 225-300 mA HMMC-5040 > 100 pF VD1 180 mA > 100 pF VD2 400 mA > 100 pF RF Output RF Input HMMC-5033 > 100 pF > 100 pF VG VGG Figure 8. Assembly Diagram Illustrating the HMMC-5033 Cascaded with the HMMC-5040 for 20–32 GHz Applications 115 mA VDD > 100 pF VD1 180 mA > 100 pF VD2 400 mA > 100 pF RF Output RF Input HMMC-5618 > 100 pF HMMC-5033 VGG Figure 9. Assembly Diagram Illustrating the HMMC-5033 Cascaded with the HMMC-5618 for 17.7–20 GHz Applications 5 100 × 150 VD1 145 100 × 150 VD2 480 745 1625 Det. Out 80 × 80 2610 2370 1980 1260 1165 1180 995 635 80 × 150 RF Input 530 220 95 80 280 VG1 100 × 150 735 1615 VGG 100 × 150 Figure 10. Bonding Pad Locations 6 1970 VD2 100 × 150 2575 2690 80 × 150 RF Output 80 × 80 Det. Bias 80 × 80 Det. Ref This data sheet contains a variety of typical and guaranteed performance data. The information supplied should not be interpreted as a complete list of circuit specifications. In this data sheet the term typical refers to the 50th percentile performance. For additional information contact your local Agilent Technologies’ sales representative. www.agilent.com/semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 India, Australia, New Zealand: (+65) 6271 2394 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright 2002 Agilent Technologies, Inc. Obsoletes 5966-4573E August 30, 2002 5988-2700EN 8