Quad SPDT ±15 V/+12 V Switches ADG1334 33 V supply range 130 Ω on resistance Fully specified at ±15 V/+12 V 3 V logic compatible inputs Rail-to-rail operation Break-before-make switching action 20-lead SSOP APPLICATIONS Audio and video routing Battery-powered systems Signal routing FUNCTIONAL BLOCK DIAGRAM S4A S1A D2 D1 S1B S4B IN1 IN4 ADG1334 IN2 IN3 S2B S3B D2 D3 S2A S3A SWITCHES SHOWN FOR A LOGIC 1 INPUT 05744-001 FEATURES Figure 1. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG1334 is a monolithic CMOS device comprising four independently selectable SPDT switches designed on a CMOS process. 1. 3 V logic compatible digital input VIH = 2.0 V, VIL = 0.8 V. When the switches are on, each switch conducts equally well in both directions and has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is the low charge injection for minimum transients when switching the digital inputs. 2. No VL logic power supply required. 3. Low power consumption. 4. 20-lead SSOP. Fast switching speed coupled with high signal bandwidth makes the part suitable for video signal switching. CMOS construction ensures ultra ow power dissipation, making the part ideally suited for portable and battery-powered instruments. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. ADG1334 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................5 Applications....................................................................................... 1 ESD Caution...................................................................................5 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions..............................6 General Description ......................................................................... 1 Terminology .......................................................................................7 Product Highlights ........................................................................... 1 Typical Performance Characteristics ..............................................8 Revision History ............................................................................... 2 Test Circuits..................................................................................... 10 Specifications..................................................................................... 3 Outline Dimensions ....................................................................... 12 Dual Supply ................................................................................... 3 Ordering Guide .......................................................................... 12 Single Supply ................................................................................. 4 REVISION HISTORY 1/06—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADG1334 SPECIFICATIONS DUAL SUPPLY 1 VDD = +15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Off Leakage IS (Off ) Drain Off Leakage ID (Off ) Channel On Leakage ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25°C 130 200 5 10 25 65 B Version −40°C to +105°C VSS to VDD 230 ±10 ±10 ±10 2.0 0.8 ±0.005 TOFF TBBM 5 110 130 65 85 25 150 95 10 Charge Injection Off Isolation Channel-to-Channel Crosstalk −3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD 2 80 85 700 5 5 10 0.002 1 IDD 260 400 ISS 0.002 1 ISS 0.002 1 1 2 V Ω typ Ω max Ω typ Ω max Ω typ Ω max nA typ nA typ nA typ ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 TON Unit Temperature range is B Version: −40°C to +105°C. Guaranteed by design, not subject to production test. Rev. 0 | Page 3 of 12 V min V max μA typ μA max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ μA typ μA max μA typ μA max μA typ μA max μA typ μA max Test Conditions/Comments VS = ±10 V, IS = −10 mA; see Figure 11 VDD = +13.5 V, VSS = −13.5 V VS = ±10 V, IS = −10 mA VS = −5 V, 0 V, +5 V; IS = −10 mA VDD = +16.5 V, VSS = −16.5 V VD = ±10 V; VS = ±10 V; see Figure 12 VD = ±10 V; VS = ±10 V; see Figure 12 VS = VD = ±10 V; see Figure 13 VIN = VINL or VINH RL = 300 Ω, CL = 35 pF VS = 10 V; see Figure 14 RL = 300 Ω, CL = 35 pF VS = 10 V; see Figure 14 RL = 300 Ω, CL = 35 pF VS1 = VS2 = +10 V; see Figure 15 VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 16 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19 RL = 50 Ω, CL = 5 pF; see Figure 18 f = 1 MHz; VS = 0 V f = 1 MHz; VS = 0 V f = 1 MHz; VS = 0 V VDD = +16.5 V, VSS = −16.5 V Digital inputs = 0 V or VDD Digital inputs = 5 V Digital inputs = 0 V or VDD Digital inputs = 5 V ADG1334 SINGLE SUPPLY 1 VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage IS (Off ) Drain Off Leakage ID (Off ) Channel On Leakage ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH B Version −40°C to +105°C +25°C 325 500 10 20 65 0 to VDD 520 ±10 ±10 ±10 2.0 0.8 ±0.005 TOFF TBBM 3 135 170 95 115 50 200 140 10 Charge Injection Off Isolation Channel-to-Channel Crosstalk −3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD 2 80 85 500 5 5 10 0.002 1 IDD 260 420 1 2 V Ω typ Ω max Ω typ Ω max Ω typ nA typ nA typ nA typ ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 TON Unit Temperature range is B Version: −40°C to +105°C. Guaranteed by design, not subject to production test. Rev. 0 | Page 4 of 12 V min V max μA typ μA max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ μA typ μA max μA typ μA max Test Conditions/Comments VS = 0 V to10 V, IS = −10 mA; see Figure 11 VDD = 10.8 V, VSS = 0 V VS = 0 V to10 V, IS = −10 mA VS = 3 V, 6 V, 9 V, IS = −10 mA VDD = 13.2 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 12 VS = 1 V/10 V, VD = 10 V/1 V; see Figure 12 VS = VD = 1 V or 10 V, see Figure 13 VIN = VINL or VINH f = 1 MHz RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 14 RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 14 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 8 V; see Figure 15 VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 16 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19 RL = 50 Ω, CL = 5 pF; see Figure 18 f = 1 MHz; VS = 6 V f = 1 MHz; VS = 6 V f = 1 MHz; VS = 6 V VDD = 13.2 V Digital inputs = 0 V or VDD Digital inputs = 5 V ADG1334 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter VDD to VSS VDD to GND VSS to GND Analog, Digital Inputs 1 Continuous Current, S or D Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial Temperature Range (B Version) Storage Temperature Range Junction Temperature SSOP Package θJA, Thermal Impedance Reflow Soldering Peak Temperature, Pb-free 1 Rating 35 V −0.3 V to +25 V +0.3 V to −25 V VSS − 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 24 mA 100 mA Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. −40°C to +105°C −65°C to +150°C 150°C 83.2°C/W 260°C Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 5 of 12 ADG1334 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN1 1 20 IN4 S1A 2 19 S4A D1 3 ADG1334 S1B 4 TOP VIEW (Not to Scale) VSS 5 GND 6 18 D4 17 S4B 16 VDD 15 NC S2B 7 14 S3B D2 8 13 D3 S2A 9 11 IN3 NC = NO CONNECT 05744-002 12 S3A IN2 10 Figure 2. 20-Lead SSOP Pin Configuration Table 4. 20-Lead SSOP Pin Function Descriptions Pin No. 1, 10, 11, 20 2, 4, 7, 9, 12, 14, 17, 19 3, 8, 13, 18 5 Mnemonic IN1, IN2, IN3, IN4 S1A, S1B, S2B, S2A, S3A, S3B, S4B, S4A D1, D2, D3, D4 VSS 6 15 16 GND NC VDD Description Logic Control Input. Source Terminal. Can be an input or output. Drain Terminal. Can be an input or output. Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be connected to ground. Ground (0 V) Reference. No Connect. Most Positive Power Supply Potential. Table 5. ADG1334 Truth Table Logic 0 1 Switch A Off On Switch B On Off Rev. 0 | Page 6 of 12 ADG1334 TERMINOLOGY RON Ohmic resistance between D and S. ΔRON Difference between the RON of any two channels. IS (Off) Source leakage current when switch is off. ID (Off) Drain leakage current when switch is off. ID, IS (On) Channel leakage current when switch is on. VD (VS) Analog voltage on Terminal D, Terminal S. CS (OFF) Channel input capacitance for off condition. CD (Off) Channel output capacitance for off condition. CD, CS (On) On switch capacitance. CIN Digital input capacitance. tON The delay between applying the digital control input and the output switching on (see Figure 14). tBBM Off time measured between the 80% point of both switches when switching from one address state to another. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. IDD Positive supply current. ISS Negative supply current. Off Isolation A measure of unwanted signal coupling through an off channel. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Bandwidth Frequency at which the output is attenuated by 3 dB. On Response Frequency response of the on switch. tOFF The delay between applying the digital control input and the output switching off (see Figure 14). Rev. 0 | Page 7 of 12 ADG1334 TYPICAL PERFORMANCE CHARACTERISTICS 200 600 TA = 25°C 180 VDD = 12V VSS = 0V 500 TA = +85°C VDD = +15V VSS = –15V 140 ON RESISTANCE (Ω) ON RESISTANCE (Ω) 160 120 100 80 60 400 300 200 TA = –40°C 40 TA = +25°C 20 0 –15 –12 –9 –6 –3 0 3 6 9 SOURCE OR DRAIN VOLTAGE (V) 12 05744-010 05744-007 100 0 15 0 Figure 3. On Resistance as a Function of VD (VS ) for Dual Supply 2 4 6 8 SOURCE OR DRAIN VOLTAGE (V) 12 10 Figure 6. On Resistance as a Function of VD (VS ) for Different Temperatures, Single Supply 450 6 TA = 25°C TA = +25°C VDD = +15V VSS = –15V 400 4 CHARGE INJECTION (pC) ON RESISTANCE (Ω) 350 300 VDD = 12V VSS = 0V 250 200 150 VDD = +5V VSS = –5V 2 0 VDD = +12V VSS = 0V –2 100 0 0 2 4 6 8 SOURCE OR DRAIN VOLTAGE (V) 10 –6 –15 12 Figure 4. On Resistance as a Function of VD (VS ) for Single Supply 05744-011 05744-008 –4 50 –10 –5 5 10 15 Figure 7. Charge Injection vs. Source Voltage 250 160 VDD = +15V VSS = –15V 140 VDD = +15V VSS = –15V 200 TON 120 100 TIME (ns) 150 TA = +85°C 100 TA = –40°C TOFF 80 60 TA = +25°C 40 50 –10 –5 0 5 SOURCE OR DRAIN VOLTAGE (V) 10 15 20 0 –40 05744-005 0 –15 05744-009 ON RESISTANCE (Ω) 0 VS (V) –20 0 20 40 TEMPERATURE (°C) Figure 8. TON/TOFF Time vs. Temperature Figure 5. On Resistance as a Function of VD (VS ) for Different Temperatures, Dual Supply Rev. 0 | Page 8 of 12 60 80 ADG1334 0 –10 –20 –10 VDD = +15V VSS = –15V TA = +25°C VDD = +15V VSS = –15V TA = +25°C –20 CROSSTALK (dB) –40 –50 –60 –70 –40 SxA – SxB –50 –60 –70 S1x – S2x –80 –80 –100 –110 10k 100k 1M 10M FREQUENCY (Hz) 100M 1G Figure 9. Off Isolation vs. Frequency 05744-004 –90 05744-006 OFF ISOLATION (dB) –30 –30 –90 –100 10k 100k 1M 10M FREQUENCY (Hz) Figure 10. Crosstalk vs. Frequency Rev. 0 | Page 9 of 12 100M 1G ADG1334 TEST CIRCUITS V ID (ON) D IDS ID (OFF) S D A VS 05744-018 VD Figure 12. Off Leakage VDD VSS VDD VS 0.1μF 50% 50% VIN 50% 50% VSS SxB D VOUT SxA RL 300Ω INx VIN VIN CL 35pF 90% VOUT GND tON 90% tOFF 05744-020 0.1μF Figure 14. Switching Timing 0.1μF VS VDD VSS VDD VSS SxB 0.1μF VIN D VOUT SxA RL 300Ω INx CL 35pF VOUT 80% tBBM VIN GND tBBM 05744-021 A A VD Figure 13. On Leakage Figure 11. On Resistance IS (OFF) D NC = NO CONNECT 05744-017 VS S Figure 15. Break-Before-Make Delay Rev. 0 | Page 10 of 12 05744-019 S NC ADG1334 VDD VSS VDD VSS 0.1μF VIN (NORMALLY CLOSED SWITCH) ON SxB D VS VOUT SxA CL 1nF INx VIN OFF NC VIN (NORMALLY OPEN SWITCH) VOUT GND ΔVOUT QINJ = CL × ΔVOUT 05744-023 0.1μF Figure 16. Charge Injection VDD VSS 0.1μF VDD NETWORK ANALYZER VSS NC SxA INx SxB VSS 0.1μF 0.1μF NETWORK ANALYZER 50Ω VOUT 50Ω VS VDD VSS SxA RL 50Ω SxB D D VIN RL 50Ω VOUT INx VS GND 05744-024 GND OFF ISOLATION = 20 log VOUT VS VSS 0.1μF 0.1μF VDD NETWORK ANALYZER VSS NC INx 50Ω SxB SxA VS D VIN RL 50Ω VOUT VOUT WITH SWITCH VOUT WITHOUT SWITCH 05744-025 GND INSERTION LOSS = 20 log CHANNEL-TO-CHANNEL CROSSTALK = 20 log VOUT VS Figure 19. Channel-to-Channel Crosstalk Figure 17. Off Isolation VDD R 50Ω Figure 18. Bandwidth Rev. 0 | Page 11 of 12 05744-026 VDD 0.1μF ADG1334 OUTLINE DIMENSIONS 7.50 7.20 6.90 20 11 1 10 5.60 5.30 8.20 5.00 7.80 7.40 PIN 1 2.00 MAX 1.85 1.75 1.65 0.05 MIN 0.65 BSC COPLANARITY 0.10 0.38 0.22 0.25 0.09 SEATING PLANE 8° 4° 0° 0.95 0.75 0.55 COMPLIANT TO JEDEC STANDARDS MO-150-AE Figure 20. 20-Lead Shrink Small Outline Package [SSOP] (RS-20) Dimensions shown in millimeters ORDERING GUIDE Model ADG1334BRSZ 1 ADG1334BRSZ-REEL1 1 Temperature Range −40°C to +105°C −40°C to +105°C Description 20-Lead Shrink Small Outline Package (SSOP) 20-Lead Shrink Small Outline Package (SSOP) Package Option RS-20 RS-20 Z = Pb-free part. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05744-0-1/06(0) T T Rev. 0 | Page 12 of 12