a Internally Trimmed Precision IC Multiplier AD632 FEATURES Pretrimmed to ±0.5% Max 4-Quadrant Error All Inputs (X, Y and Z) Differential, High Impedance for [(X1–X2)(Y1–Y2)/10] + Z2 Transfer Function Scale-Factor Adjustable to Provide up to X10 Gain Low Noise Design: 90 mV rms, 10 Hz–10 kHz Low Cost, Monolithic Construction Excellent Long-Term Stability PIN CONFIGURATIONS H-Package TO-100 APPLICATIONS High Quality Analog Signal Processing Differential Ratio and Percentage Computations Algebraic and Trigonometric Function Synthesis Accurate Voltage Controlled Oscillators and Filters D-Package TO-116 PRODUCT DESCRIPTION The AD632 is an internally-trimmed monolithic four-quadrant multiplier/divider. The AD632B has a maximum multiplying error of ± 0.5% without external trims. Excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried zener reference preserve accuracy even under adverse conditions. The simplicity and flexibility of use provide an attractive alternative approach to the solution of complex control functions. The AD632 is pin-for-pin compatible with the industry standard AD532 with improved specifications and a fully differential high impedance Z-input. The AD632 is capable of providing gains of up to X10, frequently eliminating the need for separate instrumentation amplifiers to precondition the inputs. The AD632 can be effectively employed as a variable gain differential input amplifier with high common-mode rejection. The effectiveness of the variable gain capability is enhanced by the inherent low noise of the AD632: 90 µV rms. PRODUCT HIGHLIGHTS Guaranteed Performance Over Temperature The AD632A and AD632B are specified for maximum multiplying errors of ± 1.0% and ± 0.5% of full scale, respectively at +25°C and are rated for operation from –25°C to +85°C. Maximum multiplying errors of ± 2.0% (AD632S) and ± 1.0% (AD632T) are guaranteed over the extended temperature range of –55°C to +125°C. High Reliability The AD632S and AD632T series are also available with MIL-STD-883 Level B screening and all devices are available in either the hermetically-sealed TO-100 metal can or TO-116 ceramic DIP package. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 AD632–SPECIFICATIONS (@ +258C, VS = ±15 V, R ≥ 2 kV unless otherwise noted) AD632A Min Typ Max AD632B Min Typ Max AD632S Min Typ Max AD632T Min Typ Max ( X1 − X 2 )(Y1 − Y 2 ) + Z2 10V ( X1 − X 2 )(Y1 − Y 2 ) + Z2 10V ( X1 − X 2 )(Y1 − Y 2 ) + Z2 10V ( X1 − X 2 )(Y1 − Y 2 ) + Z2 10V 61.0 61.5 ± 0.022 60.5 61.0 ± 0.015 ± 0.25 ± 0.1 ± 0.25 ± 0.1 % ± 0.02 ± 0.01 ± 0.4 ± 0.2 60.01 ± 0.01 ± 0.2 ± 0.3 ± 0.1 ± 0.1 ± 0.2 ± 0.01 ± 0.4 ± 0.2 60.005 ± 0.01 ± 0.2 ± 0.3 ± 0.1 ± 0.1 %/°C % % % ± 0.3 ± 0.15 ± 0.3 ± 0.3 ± 0.15 ± 0.3 % ± 0.01 ±5 630 200 ± 0.01 ± 0.1 ±2 ± 15 100 ± 0.01 ±5 630 500 ± 0.01 ± 0.1 ±2 ± 15 300 % mV µV/°C DYNAMICS Small Signal BW, (VOUT = 0.1 rms) 1% Amplitude Error (CLOAD = 1000 pF) Slew Rate (VOUT 20 p-p) Settling Time (to 1%, ∆VOUT = 20 V) 1 50 20 2 1 50 20 2 1 50 20 2 1 50 20 2 MHz kHz V/µs µs NOISE Noise Spectral-Density SF = 10 V SF = 3 V4 Wideband Noise A = 10 Hz to 5 MHz P = 10 Hz to 10 kHz 0.8 0.4 1.0 90 0.8 0.4 1 .0 90 0.8 0.4 1.0 90 0.8 0.4 1.0 90 µV/√Hz µV/√Hz mV rms µV/rms Model Units MULTIPLIER PERFORMANCE Transfer Function Total Error1 (–10 V ≤ X, Y ≤ +10 V) TA = Min to Max Total Error vs. Temperature Scale Factor Error (SF = 10.000 V Nominal)2 Temperature-Coefficient of Scaling-Voltage Supply Rejection (± 15 V ± 1 V) Nonlinearity, X (X = 20 V p-p, Y = 10 V) Nonlinearity, Y (Y = 20 V p-p, X = 10 V) Feedthrough3, X (Y Nulled, X = 20 V p-p 50 Hz) Feedthrough3, Y (X Nulled, Y = 20 V p-p 50 Hz) Output Offset Voltage Output Offset Voltage Drift OUTPUT Output Voltage Swing Output Impedance (f ≤ 1 kHz) Output Short Circuit Current (RL = 0, TA = Min to Max) Amplifier Open Loop Gain (f = 50 Hz) INPUT AMPLIFIERS (X, Y and Z)5 Signal Voltage Range (Diff. or CM Operating Diff.) Offset Voltage X, Y Offset Voltage Drift X, Y Offset Voltage Z Offset Voltage Drift Z CMRR Bias Current Offset Current Differential Resistance DIVIDER PERFORMANCE Transfer Function (X1 > X2) Total Error1 (X = 10 V, –10 V ≤ Z ≤ +10 V) (X = 1 V, –1 V ≤ Z ≤ +1 V) (0.1 V ≤ X ≤ 10 V, –10 V ≤ Z ≤ 10 V) SQUARER PERFORMANCE Transfer Function Total Error (–10 V ≤ X ≤ 10 V) 611 60 10V 611 61.0 62.0 60.02 611 60.5 61.0 60.01 611 % % %/°C 0.1 0.1 0.1 0.1 V Ω 30 70 30 70 30 70 30 70 mA dB ± 10 ± 12 ±5 100 ±5 200 80 0.8 0.1 10 ± 10 ± 12 ±2 50 ±2 100 90 0.8 0. I 10 ± 10 ± 12 ±5 100 ±5 ± 10 ± 12 ±2 150 ±2 V V mV µV/°C mV µV/°C dB µA µA MΩ 620 630 70 2.0 ( Z 2 − Z1 ) + Y1 ( X1 − X 2 ) 10V 610 615 60 80 0.8 0.1 10 2.0 ( Z 2 − Z1 ) + Y1 ( X1 − X 2 ) 10V 620 630 500 70 90 0.8 0.1 10 2.0 ( Z 2 − Z1 ) + Y1 ( X1 − X 2 ) 10V 610 615 300 2.0 ( Z 2 − Z1 ) + Y1 ( X1 − X 2 ) ± 0.75 ± 2.0 ± 2.5 ± 0.35 ± 1.0 ± 1.0 ± 0.75 ± 2.0 ± 2.5 ± 0.35 ± 1.0 ± 1.0 ( X1 − X 2 )2 + Z2 10V ( X1 − X 2 )2 + Z2 10V ( X1 − X 2 )2 + Z2 10V ( X1 − X 2 )2 + Z2 10V 10V ( Z 2 − Z1 ) + X 2 10V ( Z 2 − Z1 ) + X 2 10V ( Z 2 − Z1 ) + X 2 10V ( Z 2 − Z1 ) + X 2 ± 0.6 ± 0.3 ± 0.6 ± 0.3 % % % % SQUARE-ROOTER PERFORMANCE Transfer Function, (Z1 ≤ Z2) Total Error1 (1 V ≤ Z ≤ 10 V) ± 1.0 ± 0.5 –2– ± 1.0 ± 0.5 % REV. A AD632 AD632A Min Typ Max Model POWER SUPPLY SPECIFICATIONS Supply Voltage Rated Performance Operating Supply Current Quiescent ±8 ± 15 4 618 AD632B Min Typ Max ± 15 ±8 6 4 618 AD632S Min Typ Max ±8 6 ± 15 4 AD632T Min Typ Max ±8 622 6 ± 15 4 Units 622 V V 6 mA NOTES 1 Figures given are percent of full-scale, ± l0 V (i.e., 0.01% = 1 mV). 2 May be reduced to 3 V using external resistor between –V S and SF. 3 Irreducible component due to nonlinearity: excludes effect of offsets. 4 Using external resistor adjusted to give SF = 3 V. 5 See functional block diagram for definition of sections. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. Specifications subject to change without notice. ORDERING GUIDE Model Temperature Range Package Description Package Option* AD632AD AD632BD AD632AH AD632BH AD632SD AD632SD/833B AD632TD AD632TD/883B AD632SH AD632SH/883B AD632TH AD632TH/883B –25°C to +85°C –25°C to +85°C –25°C to +85°C –25°C to +85°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C Side Brazed Ceramic DIP Side Brazed Ceramic DIP Header Header Side Brazed Ceramic DIP Side Brazed Ceramic DIP Side Brazed Ceramic DIP Side Brazed Ceramic DIP Header Header Header Header D-14 D-14 H-10A H-10A D-14 D-14 D-14 D-14 H-10A H-10A H-10A H-10A *For outline information see Package Information section. Thermal Characteristics CHIP DIMENSIONS AND PAD LAYOUT Dimensions shown in inches and (mm). (Contact factory for latest dimensions.) Thermal Resistance For further information, consult factory. REV. A –3– θJC = 25°C/W for H-10A θJA = 150°C/W for H-10A θJC = 25°C/W for D-14 θJA = 95°C/W for D-14 AD632 Typical Performance Curves (typical @ +258C with 6VS = 15 V) Figure 4. AD632 Functional Block Diagram OPERATION AS A MULTIPLIER Figure 5 shows the basic connection for multiplication. Note that the circuit will meet all specifications without trimming. Figure 1. AC Feedthrough vs. Frequency Figure 5. Basic Multiplier Connection In some cases the user may wish to reduce ac feedthrough to a minimum (as in a suppressed carrier modulator) by applying an external trim voltage (± 30 mV range required) to the X or Y input. Curve 1 shows the typical ac feedthrough with this adjustment mode. Note that the feedthrough of the Y input is a factor of 10 lower than that of the X input and should be used in applications where null suppression is critical. Figure 2. Frequency Response as a Multiplier The Z2 terminal of the AD632 may be used to sum an additional signal into the output. In this mode the output amplifier behaves as a voltage follower with a 1 MHz small signal bandwidth and a 20 V/µs slew rate. This terminal should always be referenced to the ground point of the driven system, particularly if this is remote. Likewise the differential inputs should be referenced to their respective signal common potentials to realize the full accuracy of the AD632. A much lower scaling voltage can be achieved without any reduction of input signal range using a feedback attenuator as shown in Figure 6. In this example, the scale is such that VOUT = XY, so that the circuit can exhibit a maximum gain of 10. This connection results in a reduction of bandwidth to about 80 kHz without the peaking capacitor CF. In addition, the output offset voltage is increased by a factor of 10 making external adjustments necessary in some applications. Figure 3. Frequency Response vs. Divider Denominator Input Voltage –4– REV. A AD632 Feedback attenuation also retains the capability for adding a signal to the output. Signals may be applied to the Z terminal, where they are amplified by –10, or to the common ground connection where they are amplified by –1. Input signals may also be applied to the lower end of the 2.7 kΩ resistor, giving a gain of +9. Without additional trimming, the accuracy of the AD632B is sufficient to maintain a 1% error over a 10 V to 1 V denominator range (The AD535 is functionally equivalent to the AD632 and has guaranteed performance in the divider and square-rooter configurations and is recommended for such applications). This range may be extended to 100:1 by simply reducing the X offset with an externally generated trim voltage (range required is ± 3.5 mV max) applied to the unused X input. To trim, apply a ramp of +100 mV to +V at 100 Hz to both X1 and Z1 (if X2 is used for offset adjustment, otherwise reverse the signal polarity) and adjust the trim voltage to minimize the variation in the output.* Since the output will be near +10 V, it should be ac-coupled for this adjustment. The increase in noise level and reduction in bandwidth preclude operation much beyond a ratio of 100 to 1. *See the AD535 data sheet for more details. Figure 6. Connections for Scale-Factor of Unity OPERATION AS A DIVIDER Figure 7 shows the connection required for division. Unlike earlier products, the AD632 provides differential operation on both numerator and denominator, allowing the ratio of two floating variables to be generated. Further flexibility results from access to a high impedance summing input to Y1. As with all dividers based on the use of a multiplier in a feedback loop, the bandwidth is proportional to the denominator magnitude, as shown in Figure 3. Figure 7. Basic Divider Connection REV. A –5– AD632 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). C526a–1–6/97 H-Package TO-100 PRINTED IN U.S.A. D-Package TO-116 –6– REV. A

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