NIMD6302R2 Product Preview SMARTDISCRETES 5 Amps, 30 Volts Self Protected with Current Sense http://onsemi.com N–Channel SO–8, Dual SMARTDISCRETES devices are an advanced series of Power MOSFETs which utilize ON Semiconductor’s latest MOSFET technology process to achieve the lowest possible on–resistance per silicon area while incorporating smart features. They are capable of withstanding high energy in the avalanche and commutation modes. The avalanche energy is specified to eliminate guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. This new SMARTDISCRETES device features an integrated Gate–to–Source clamp for ESD protection. Also, this device features a sense FET for current monitoring. • Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life • IDSS Specified at Elevated Temperature • Avalanche Energy Specified • Current Sense FET • ESD Protected, Main FET and SENSEFET 5.0 AMPERES 30 VOLTS RDS(on) = 50 mΩ Drain Gate Sense Main FET Source Sense Source Main ABSOLUTE MAXIMUM RATINGS SOIC–8 CASE 751 STYLE 19 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in this specification is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. MAIN MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Drain–to–Source Voltage Drain–to–Gate Voltage (RGS = 1.0 M) Gate–to–Source Voltage Single Pulse Drain–to–Source Avalanche Energy (Note 1.) (VDD = 25 Vdc, VGS = 10 Vdc, VDS = 20 Vdc, IL = 15 Apk, L = 10 mH, RG = 25 Ω) Symbol Value Unit VDSS VDGR 30 Vdc 30 Vdc VGS EAS 16 Vdc 250 mJ MARKING DIAGRAM Source 1 Gate 1 Source 2 Gate 2 1 8 2 7 3 TBD 6 5 4 Mirror 1 Drain 1 Mirror 2 Drain 2 (Top View) TBD = Specific Device Code ORDERING INFORMATION Drain Current – Continuous @ TA = 25°C – Continuous @ TA = 100°C (Note 1.) – Single Pulse (tp10 µs) ID 6.5 Adc ID 4.4 Adc IDM 33 Apk Maximum Power Dissipation (TA = 25°C) PD TBD W 1. Switching characteristics are independent of operating junction temperatures Device NIMD6302R2 Package SOIC–8 Shipping TBD This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. Semiconductor Components Industries, LLC, 2001 February, 2001 – Rev. 1 1 Publication Order Number: NIMD6302R2/D NIMD6302R2 MAIN MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit 30 – 35 30 – – Vdc mV/°C – – – – 10 100 OFF CHARACTERISTICS V(BR)DSS Drain–to–Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 µAdc) Temperature Coefficient (Positive) µAdc Zero Gate Voltage Drain Current (VDS = 30 Vdc, VGS = 0 Vdc) (VDS = 30 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS Gate–Body Leakage Current (VGS = 12 Vdc, VDS = 0 Vdc) IGSS – 22 32 µAdc Gate Threshold Voltage (VDS = VGS, ID = 250 Adc) Threshold Temperature Coefficient (Negative) VGS(th) 1.0 – – 5.0 2.0 – Vdc mV/°C Static Drain–to–Source On–Resistance (Note 2.) (VGS = 10 Vdc, ID = 3.0 Adc, TJ @ 25°C) (VGS = 10 Vdc, ID = 3.0 Adc, TJ @ 125°C) RDS(on) – – – – 50 TBD – – 7.4 5.5 – – Ciss – 380 600 Coss – 272 350 Crss – 93 200 td(on) – 8.4 – tr – 24 – td(off) – 18 – tf – 5.0 – QT – 11.3 – Q1 – 2.8 – Q2 – 1.9 – Q3 – 2.2 – VSD S – 0.76 – – 0.62 – trr – 24.7 – ta – 13 – ON CHARACTERISTICS Forward Transconductance (Note 2.) (VDS = 6.0 Vdc, ID = 15 Adc) (VDS = 15 Vdc, ID = 15 Adc) mΩ gFS mhos DYNAMIC CHARACTERISTICS (Note 3.) Input Capacitance Output Capacitance (VDS = 6.0 6 0 Vdc, Vd VGS = 0 Vdc, Vd f = 1.0 MHz) Transfer Capacitance pF SWITCHING CHARACTERISTICS (Note 3.) Turn–On Delay Time Rise Time Turn–Off Delay Time (VDD = 6.0 Vdc, ID = 3.0 Adc, VGS = 10 Vdc, RG = 4.7 Ω) Fall Time Gate Charge (VDS = 6.0 Vdc, ID = 3.0 Adc, VGS = 10 Vdc) ns nC SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (Note 2.) Forward On–Voltage (Notes 2., 3.) (IS = 3.0 Adc, VGS = 0 Vdc) (IS = 3.0 Adc, VGS = 0 Vdc, TJ = 125°C) Reverse Recovery Time (Note 3.) (IS = 3.0 3 0 Adc, Adc VGS = 0 Vdc, Vdc dIS/dt = 100 A/µs) Reverse Recovery Stored Charge (Note 3.) Vdc ns tb – 12 – QRR – 0.018 – C IRAT 192 192 200 200 208 208 – IRAT –7.5 ±3.0 +7.5 % IGSS – – 100 nAdc MIRROR MOSFET CHARACTERISTICS (TJ = 25°C unless otherwise noted) Main/Mirror MOSFET Current Ratio Main/Mirror Current Ratio Variation versus Current and Temperature Gate–Body Leakage Current (VDS = 6.0 Vdc, IDmain = 25 mA) (VDS = 6.0 Vdc, IDmain = 25 mA, TA = 125°C) (VDS = 6.0 Vdc, IDmain = 25 mA, TA = 25 to 125°C) VDS = 0 Vdc, VGS = 3.0 Vdc 2. Pulse Test: Pulse Width = 300 µs, Duty Cycle = 2%. 3. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NIMD6302R2 PACKAGE DIMENSIONS SO–8 CASE 751–07 ISSUE W –X– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K –Y– G C N X 45 SEATING PLANE –Z– 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X S J DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 STYLE 19: PIN 1. 2. 3. 4. 5. 6. 7. 8. http://onsemi.com 3 SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 MIRROR 2 DRAIN 1 MIRROR 1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 NIMD6302R2 SMARTDISCRETES is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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