ETC XRT5897IV

XRT5897
Seven-Channel E1
Line Interface
March 2000-3
FEATURES
D Compliant with ITU G.703 Pulse Mask Template for
2.048Mbps (E1) Rates
D Seven Independent CEPT Transceivers
D Logical Inputs Accept either 3.3V or 5.0V Levels
D Ultra-Low Power Dissipation
D +3.3V Supply Operation
D Supports Differential Transformer Coupled
Receivers and Transmitters
D On Chip Pulse Shaping for Both 75W and 120W Line
Drivers
D Compliant with ITU G.775 LOS Declaration/Clearing
Recommendation
D Optional User Selectable LOS Declaration/Clearing
Delay
D Individual Transmit Channel Over Temperature
Protection
APPLICATIONS
D SDH Multiplexer
D Digital Cross Connects
GENERAL DESCRIPTION
The XRT5897 is an optimized seven channel 3.3V line
interface unit fabricated using low power CMOS
technology. The device contains seven independent E1
channels. It is primarily targeted toward SDH multiplexers
that accommodate TU12 Tributary Unit Frames. Line
cards in these units multiplex 21 E1 interfaces into higher
SDH rates. Devices with seven E1 interfaces such as the
XRT5897 provide the most efficient method of
implementing 21 channel line cards. Each channel
performs the driver and receiver functions necessary to
convert bipolar signals to logical levels and vice versa.
The device requires transformers on both receiver and
transmitter sides, and supports both balanced and
unbalanced interfaces.
The device offers two distinct modes of LOS detection.
The first method, which does not require an external
clock, provides an LOS output indication signal with
thresholds and delay that comply with the ITU G.775
requirements. In the second mode, the user provides an
external clock that increases the delay for LOS
declaration and clearing. This feature provides the user
with the flexibility to implement LOS specifications that
require a delay greater than the G.775 requirements.
ORDERING INFORMATION
Part No.
Package
Operating
Temperature Range
XRT5897IV
100 Lead TQFP (14 x 14 x 1.4mm)
-40°C to +85°C
Rev. 1.10
E2000
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017
This Material Copyrighted by Its Respective Manufacturer
XRT5897
BLOCK DIAGRAM
Tranceiver 1
Tranceiver 2
Tranceiver 3
Tranceiver 4
Tranceiver 5
Tranceiver 6
Tranceiver 7
RTIP7 (69)
TIP
RX INPUT
RING
1:2
RXPOS7 (5)
R1
R2
Singnal
Peak
Detector
Receive
Comparators
RXNEG7 (6)
RRING7 (68)
VCC
LOS
Detect
LOSCNT (73)
LOSSEL (38)
Transmit
Line
Drivers
TIP
TX OUTPUT
RING
2:1
R3
TTIP7 (89)
9.1
R4
TRING7 (91)
0
0
Pulse
Shaping
1
MUX
O
Loss
Delay
Counter
MUX
NRZ
To
RZ
Duty
Cycle
Adjust
LOS7 (4)
TXCLK7 (87)
TXPOS7 (85)
TXNEG7 (86)
1
1
9.1
Figure 1. XRT5897 Block Diagram
Receiver Notes
D The same type 1:2CT ratio transformer may be
used at the receiver input and transmitter output.
D LOSCNT (pin 73) is unconnected when LOSSEL is
logic 1, or connected to an external clock when
LOSSEL is logic 0.
D R1 and R2 are both 150W for 75W operation, or
240W for 120W operation.
Transmitter Notes
D Return loss exceeds ITU G.703 specification with
these resistors and a 1:2CT ratio input transformer.
D Return loss exceeds ETSI 300 166 specification
with a 1:2 ratio transformer.
LOS (Loss of Signal) Notes
D R3 and R4 are always 9.1W for both 75W and 120W
applications.
D An approach exists that permits the user to operate
the XRT5897 with a 5V power supply. For more
information, please see application note TAN-12.
D LOSSEL (pin 38) is connected to logic “1” for ITU
G.775 compliant LOS delay, or to logic 0 for user
programmable additional delay.
Rev. 1.10
2
This Material Copyrighted by Its Respective Manufacturer
XRT5897
RXPOS6
RXNEG6
LOSCNT
GND
RTIP6
RRING6
RTIP7
RRING7
VCC
GND
VCC
RRING5
RTIP5
GND
TTIP5
V CC
TRING5
GND
TRING4
V CC
TTIP4
GND
RTIP4
RRING4
TXCLK4
PIN CONFIGURATION
51
75
50
76
100
1
25
RXPOS1
RXNEG1
VCC
LOS7
RXPOS7
RXNEG7
RTIP1
RRING1
VCC
GND
VCC
RRING2
RTIP2
GND
TTIP2
VCC
TRING2
GND
TRING3
VCC
TTIP3
GND
RTIP3
RRING3
TXCLK3
LOS6
TXPOS6
TXNEG6
TXCLK6
GND
TTIP6
VCC
TRING6
GND
TXPOS7
TXNEG7
TXCLK7
GND
TTIP7
VCC
TRING7
GND
TRING1
VCC
TTIP1
GND
TXCLK1
TXNEG1
TXPOS1
LOS1
100 LEAD THIN QUAD FLAT PACK
(14 x 14 x 1.4 mm, TQFP)
Rev. 1.10
3
This Material Copyrighted by Its Respective Manufacturer
26
TXNEG4
TXPOS4
LOS4
RXPOS4
RXNEG4
TXPOS5
TXNEG5
TXCLK5
RXNEG5
RXPOS5
LOS5
GND
LOSSEL
VCC
LOS2
RXPOS2
RXNEG2
TXCLK2
TXNEG2
TXPOS2
RXNEG3
RXPOS3
LOS3
TXPOS3
TXNEG3
XRT5897
PIN DESCRIPTION
Pin #
Symbol
Type
Description
1
RXPOS1
O
Receiver 1 Positive Data Out. Positive RZ data output for channel 1.
2
RXNEG1
O
Receiver 1 Negative Data Out. Negative RZ data output for channel 1.
3
VCC
4
LOS7
O
Receiver 7 Loss of Signal. Asserted during LOS condition.
5
RXPOS7
O
Receiver 7 positive Data Out. Positive RZ data output for channel 7.
6
RXNEG7
O
Receiver 7 Negative Data Out. Negative RZ data output for channel 7.
7
RTIP1
I
Receiver 1 Positive Bipolar Input.
8
RRING1
I
Receiver 1 Negative Bipolar Input.
9
VCC
Positive Supply (+3.3V + 5%). Analog circuitry.
10
GND
Analog Ground.
11
VCC
Positive Supply (+3.3V + 5%). Receivers 1, 2, 3, and 7.
12
RRING2
I
Receiver 2 Negative Bipolar Input.
13
RTIP2
I
Receiver 2 Positive Bipolar Input.
Positive Supply (+3.3V + 5%). Digital circuitry.
14
GND
15
TTIP2
Analog Ground. Receivers 1, 2, 3, and 7.
16
VCC
17
TRING2
18
GND
19
TRING3
20
VCC
21
TTIP3
22
GND
23
RTIP3
I
Receiver 3 Positive Bipolar Input.
24
RRING3
I
Receiver 3 Negative Bipolar Input.
25
TXCLK3
I
Transmitter 3 Clock Input. Use for clocked mode with NRZ data.1
26
TXNEG3
I
Transmitter 3 Negative Data Input. Negative NRZ or RZ data input.1
27
TXPOS3
I
Transmitter 3 Positive Data Input. Positive NRZ or RZ data input.1
28
LOS3
O
Receiver 3 Loss of Signal. Asserted during LOS condition.
29
RXPOS3
O
Receiver 3 Positive Data Out. Positive RZ data output for channel 3.
30
RXNEG3
O
Receiver 3 Negative Data Out. Negative RZ data output for channel 3.
31
TXPOS2
I
Transmitter 2 Positive Data Input. Positive NRZ or RZ data input.1
32
TXNEG2
I
Transmitter 2 Negative Data Input. Negative NRZ or RZ data input.1
33
TXCLK2
I
Transmitter 2 Clock Input. Use for clocked mode with NRZ data.1
34
RXNEG2
O
Receiver 2 Negative Data Out. Negative RZ data output for channel 2.
35
RXPOS2
O
Receiver 2 Positive Data Out. Positive RZ data output for channel 2.
O
Transmitter 2 Positive Bipolar Output.
Positive Supply (+3.3V + 5%). Transmitter channel 2.
O
Transmitter 2 Negative Bipolar Output.
Digital Ground. Transmitter channel 2.
O
Transmitter 3 Negative Bipolar Output.
Positive Supply (+3.3V + 5%). Transmitter channel 3.
O
Transmitter 3 Positive Bipolar Output.
Digital Ground. Transmitter channel 3.
Note:
1 Has internal pull-up 50KW resistor.
Rev. 1.10
4
This Material Copyrighted by Its Respective Manufacturer
XRT5897
PIN DESCRIPTION (CONT’D)
Pin #
Symbol
Type
36
LOS2
O
Description
Receiver 2 Loss of Signal. Asserted during LOS condition.
37
VCC
38
LOSSEL
39
GND
40
LOS5
O
Receiver 5 Loss of Signal. Asserted during LOS condition.
41
RXPOS5
O
Receiver 5 Positive Data Out. Positive RZ data output for channel 5.
42
RXNEG5
O
Receiver 5 Negative Data Out. Negative RZ data output for channel 5.
43
TXCLK5
I
Transmitter 5 Clock Input. Use for clocked mode with NRZ data.1
44
TXNEG5
I
Transmitter 5 Negative Data Input. Negative NRZ or RZ data input.1
45
TXPOS5
I
Transmitter 5 Positive Data Input. Positive NRZ or RZ data input.1
46
RXNEG4
O
Receiver 4 Negative Data Out. Negative RZ data output for channel 4.
47
RXPOS4
O
Receiver 4 Positive Data Out. Positive RZ data output for channel 4.
48
LOS4
O
Receiver 4 Loss of Signal. Asserted during LOS condition.
49
TXPOS4
I
Transmitter 4 Positive Data Input. Positive NRZ or RZ data input.1
50
TXNEG4
I
Transmitter 4 Negative Data Input. Negative NRZ or RZ data input.1
51
TXCLK4
I
Transmitter 4 Clock Input. Use for clocked mode with NRZ data.1
52
RRING4
I
Receiver 4 Negative Bipolar Input.
53
RTIP4
I
Receiver 4 Positive Bipolar Input.
54
GND
55
TTIP4
56
VCC
57
TRING4
58
GND
59
TRING5
60
VCC
61
TTIP5
Digital Supply (+3.3V + 5%). Digital circuitry.
I
Loss of Signal Delay Select. “Hi” selects G.775, “Lo” selects user programmable.1
Digital Ground.
Analog Ground.
O
Transmitter 4 Positive Bipolar Output.
Positive Supply (+3.3V + 5%). Transmitter channel 4.
O
Transmitter 4 Negative Bipolar Output.
Digital Ground. Transmitter channel 4.
O
Transmitter 5 Negative Bipolar Output.
Positive Supply (+3.3V + 5%). Transmitter channel 5.
O
Transmitter 5 Positive Bipolar Output.
62
GND
63
RTIP5
I
Digital Ground. Transmitter channel 5.
Receiver 5 Positive Bipolar Input.
64
RRING5
I
Receiver 5 Negative Bipolar Input.
65
VCC
Positive Supply (+3.3V + 5%). Low level transmitter analog circuitry.
66
GND
Analog Ground. Low level transmitter analog circuitry.
67
VCC
Positive Supply (+3.3V + 5%). Receiver channels 4, 5, and 6.
68
RRING7
I
Receiver 7 Negative Bipolar Input.
69
RTIP7
I
Receiver 7 Positive Bipolar Input.
70
RRING6
I
Receiver 6 Negative Bipolar Input.
Note:
1 Has internal pull-up 50KW resistor.
Rev. 1.10
5
This Material Copyrighted by Its Respective Manufacturer
XRT5897
PIN DESCRIPTION (CONT’D)
Pin #
Symbol
Type
Description
71
RTIP6
I
72
GND
73
LOSCNT
I
Loss of Signal Timing Clock Input. For user-programmable LOS delay.1
74
RXNEG6
O
Receiver 6 Negative Data Out. Negative RZ data output for channel 6.
75
RXPOS6
O
Receiver 6 Positive Data Out. Positive RZ data output for channel 6.
76
LOS6
O
Receiver 6 Loss of Signal. Asserted during LOS condition.
77
TXPOS6
I
Transmitter 6 Positive Data Input. Positive NRZ or RZ data input.1
78
TXNEG6
I
Transmitter 6 Negative Data Input. Negative NRZ or RZ data input.1
79
TXCLK6
I
Transmitter 6 Clock Input. Use for clocked mode with NRZ data.1
80
GND
81
TTIP6
Receiver 6 Positive Bipolar Input.
Analog Ground. Receiver channels 4, 5, and 6.
Digital Ground. Transmitter channel 6.
O
Transmitter 6 Positive Bipolar Output.
82
VCC
83
TRING6
Positive Supply (+3.3V + 5%). Transmitter channel 6.
84
GND
85
TXPOS7
I
Transmitter 7 Positive Data Input. Positive NRZ or RZ data input.1
86
TXNEG7
I
Transmitter 7 Negative Data Input. Negative NRZ or RZ data input.1
87
TXCLK7
I
Transmitter 7 Clock Input. Use for clocked mode with NRZ data.1
O
Transmitter 6 Negative Bipolar Output.
Digital Ground.
88
GND
89
TTIP7
90
VCC
91
TRING7
92
GND
93
TRING1
94
VCC
95
TTIP1
96
GND
97
TXCLK1
I
Transmitter 1 Clock Input. Use for clocked mode with NRZ data.1
98
TXNEG1
I
Transmitter 1 Negative Data Input. Negative NRZ or RZ data input.1
99
TXPOS1
I
Transmitter 1 Positive Data Input. Positive NRZ or RZ data input.1
100
LOS1
O
Receiver 1 Loss of Signal. Asserted during LOS condition.
Analog Ground.
O
Transmitter 7 Positive Bipolar Output.
Positive Supply (+3.3V + 5%). Transmitter channel 7.
O
Transmitter 7 Negative Bipolar Output.
Digital Ground. Transmitter channel 7.
O
Transmitter 1 Negative Bipolar Output.
Positive Supply (+3.3V + 5%). Transmitter channel 1.
O
Transmitter 1 Positive Bipolar Output.
Digital Ground. Transmitter channel 1.
Note:
1 Has internal pull-up 50KW resistor.
Rev. 1.10
6
This Material Copyrighted by Its Respective Manufacturer
XRT5897
ELECTRICAL CHARACTERISTICS
Test Conditions: VCC = 3.3V + 5%, TA = -40 to 25 to 85°C, Unless Otherwise Specified
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
DC Electrical Characteristics
Parameters
VCC
Voltage Supply
3.135
3.3
3.465
V
3.3V operation
VCC
Voltage Supply
4.75
5.0
5.25
V
5.0V operation
VIH
Input High Level
2.0
5.0
V
VIL
Input Low Level
0.8
V
Inputs
Outputs
VOH
Output High Level
VOL
Output Low Level
2.4
V
IOH = -4mA
0.4
V
IOL = 4mA
12
dB
Cable loss at 1.024MHz (Relative
to 0dB = 2.37Vp measured from
RTIP or RRING to ground).
dB
With 6dB cable loss
%
% of peak input voltage at -3dB
cable loss
Receiver Specifications
RXCL
Allowable Cable Loss
0
RXIM
Interference Margin
-15
-12
RXXI
Receiver Slicing Threshold
45
50
55
RXLOSSET
LOS Must Be Set If RX Sig.
Atten. ² 32dB (For Any Valid
Data Pattern)
15
dB
Relative to 0dB = 2.37Vp
Measured from RTIP or RRING to
ground.
RXLOSCLR
LOS Must Be Cleared If RX Sig.
Atten. < 9dB
13
dB
Relative to 0dB = 2.37Vp
measured from RTIP or RRING to
ground.
RXLOSHYST
Hysteresis on Input Data
RXIN
Input Impedance
2
5
dB
For LOS output state change
kW
Up to 3.072MHz (Measured from
RTIP or RRING to ground).
Power Specifications VCC = 3.3V
PD
Power Dissipation
715
920
mW
All 1’s Transmit and Receive 75W
PD
Power Dissipation
117
155
mW
All Drivers Power Down
PC
Power Consumption 75W
1260
1465
mW
All 1’s Transmit and Receive
PC
Power Consumption 75W
880
1065
mW
50% data density, Transmit and Receive
PC
Power Consumption 120W
1025
1255
mW
All 1’s Transmit and Receive
PC
Power Consumption 120W
745
945
mW
50% data density, Transmit and Receive
Note:
Bold face parameters are covered by production test and guaranteed over operating temperature range.
Rev. 1.10
7
This Material Copyrighted by Its Respective Manufacturer
XRT5897
ELECTRICAL CHARACTERISTICS (CONT’D)
Test Conditions: VCC = 3.3V + 5%, TA = -40 to 25 to 85°C, Unless Otherwise Specified
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
AC Electrical Characteristics
VTXOUT
Output Pulse Amplitude
(RL = 75W)
2.13
2.37
2.60
V
Trans. = 1:2 ratio, 9.1W in series
with each end of primary
VTXOUT
Output Pulse Amplitude
(RL = 120W)
2.70
3.0
3.30
V
Trans. = 1:2 ratio, 9.1W in series
with each end of primary
TXPW
Output Pulse Width
224
244
264
ns
PNIMP
Pos/Neg Pulse Unbalanced
5
%
488
ns
T1
TXCLK Clock Period (E1)
T2
TXCLK Duty Cycle
30
TSU
Data Set-up Time, TDATA to
TXCLK
75
ns
50% TXCLK Duty Cycle
THO
Data Hold Time, TDATA to
TXCLK
30
ns
50% TXCLK Duty Cycle
50
70
%
TR
TXCLK Rise Time (10% to 90%)
40
ns
TF
TXCLK Fall Time (10% to 90%)
40
ns
Data Prop. Delay No-Clock
Mode
35
Data Prop. Delay Clock Mode
470
T3-noclk
T3-clk
ns
ns
50% TXCLK Duty Cycle
T4
Receive Data High
269
ns
0dB Cable Loss
T5
RX Data Prop. Delay
40
ns
15pF Load
T6
Receive Rise Time
40
ns
15pF Load
T7
Receive Rise Time
40
ns
15pF Load
219
244
50
Note:
Bold face parameters are covered by production test and guaranteed over operating temperature range.
ABSOLUTE MAXIMUM RATINGS
Storage Temperature . . . . . . . . . . . . -65°C to +150°C
Operating Temperature . . . . . . . . . . -40°C to +85°C
Supply Voltage . . . . . . . . . . . . . . . . . . +0.3V to +6.0V
Rev. 1.10
8
This Material Copyrighted by Its Respective Manufacturer
XRT5897
Disabling Output Drivers
Output drivers may be individually disabled (hi-z output) by either of the following methods.
1. Either connect the transmit data inputs TXPOS
and TXNEG for the channel to be disabled to a logic 1 source (VCC), or allow them to float (inputs
have internal pull--up resistors).
2. Connect TXCLK for the channel to be disabled to
logic 0 source (Ground), and also apply data to the
TXPOS and TXNEG inputs of that channel.
TRANSFORMER REQUIREMENTS
Turns Ratio
Line Impedance
Turns Ratio
Line Impedance
1:2 CT
75W or 120W
1:2
75W or 120W
Table 1. Input Transformer Requirements
Table 2. Output Transformer Requirements
Note:
The same type 1:2 CT ratio device may be used at both receiver input and transmitter output.
The following transformers have been tested with the XRT5897:
HALO type TG26-1205(package contains two 1 CT:2 CT ratio transformers)
Pulse type PE-65535 (1:2 CT ratio)
Transpower Technologies type TTI 7154-R (1:2 CT ratio)
Magnetic Supplier Information:
HALO Electronics, Inc.
P.O. Box 5826
Redwood City, CA 94063
Tel. (415) 568-5800
Fax. (415)568-6161
Pulse
Telecom Product Group
P.O. Box 12235
San Diego, CA 92112
Tel. (619) 674-8100
Fax. (619) 674-8262
Transpower Technologies, Inc.
24 Highway 28, Suite 202
Crystal Bay, NV 89402--0187
Tel. (702) 831--0140
Fax. (702) 831--3521
Rev. 1.10
9
This Material Copyrighted by Its Respective Manufacturer
XRT5897
TSU
THO
TXPOS (n)
TSU
TXNEG (n)
T2
T1
TR
TXCLK (n)
THO
TF
TXPW
T3
T3
VTXOUT
TXOUT (n)
VTXOUT
TXPW
Figure 2. Transmit Timing Diagram
RXIN (n)
T5
T4
T6
T7
RPOS (n)
T5
T4
RXNEG (n)
Figure 3. Receive Timing Diagram
Rev. 1.10
10
This Material Copyrighted by Its Respective Manufacturer
T6
T7
XRT5897
RETURN LOSS SPECIFICATIONS
The following transmitter and receiver return loss specifications are based on a typical 1:2CT ratio transformer.
75W
120W
Frequency Range
Min.
Typ.
Min.
Typ.
Unit
51kHz to 102kHz
16
22
10
15
dB
102kHz to 2.048MHz
16
22
10
15
dB
2.048MHz to 3.072MHz
11
18
10
14
dB
Table 3. Transmitter Return Loss Specification
Transmit Return Loss Notes
D Output transformer ratio is 1:2 (return loss exceeds
ETSI 300 166 with this transformer).
D For both 75W and 120W applications, 9.1W, 1% resistors are connected between each end of the
transformer primary and the XRT5897 TTIP and
TRING pins.
75W
120W
Frequency Range
Min.
Typ.
Min.
Typ.
Unit
51kHz to 102kHz
16
28
15
18
dB
102kHz to 2.048MHz
22
34
22
25
dB
2.048MHz to 3.072MHz
18
26
20
30
dB
Table 4. Receiver Return Loss Specification
Receiver Return Loss Notes
D Input transformer ratio is 1:2 CT.
D Each half of transformer secondary is terminated
with 150W for 75W operation, or 240W for 120W operation (resistors are 1% tolerance).
D Transformer center tap is grounded.
Rev. 1.10
11
This Material Copyrighted by Its Respective Manufacturer
XRT5897
SYSTEM DESCRIPTION
This device is a seven channel E1 transceiver that
provides an electrical interface for 2.048Mbps
applications. Its unique architecture includes seven
receiver circuits that convert ITU G.703 compliant bipolar
signals to TTL compatible logic levels. Each receiver
includes a LOS (Loss of Signal) detection circuit that may
be configured for either a fixed or a user-programmable
LOS response time delay. Similarly, in the transmit
direction, seven transmitters convert TTL compatible
logic levels to G.703 compatible bipolar signals. Each
transmitter may be operated either with RZ, or NRZ data
types. In NRZ mode a transmit clock is required as well.
The following description applies to any of the seven
receivers or transmitters contained in the XRT5897.
Therefore, the suffix numbers for a particular channel are
deleted for simplicity. i.e. “RTIP” applies to RTIP1 through
RTIP7.
compliance with ITU G.775 specification. When LOSSEL
is connected to logic “0”, the user-programmable delay
mode is enabled. In this mode the user has the option of
extending the delay of LOS declaration and clearing
specified in the ITU G.775. This is done by providing a
user-supplied clock to LOSCNT (pin 73). The “user
programmable mode” is provisioned to allow systems
designers to comply with older versions of LOS
specifications in legacy systems. It needs to be stressed
that the delay for declaration and clearing of the LOS
condition will never be less than the range specified in the
G.775 specification (10-255 pulse intervals).
The LOS detection/clearing circuitry of the XRT5897 in
“automatic” mode will detect LOS when the incoming
signal has “no transitions,” i.e. when the signal level is less
than or equal to a signal level AD dB below nominal signal
level, for N consecutive pulse intervals, where 10<N<255.
The value of AD can vary between 10dB to 32dB
depending on the ones density of the incoming signal
assuming the received data has minimum permissible
ones density. Furthermore LOS detect is cleared when
the incoming signal has “transitions,” i.e. when the signal
level is greater than or equal to a signal level of AC dB
below nominal, for N consecutive pulse intervals, where
10<N<255. The value of AC can vary between 9dB to
31dB depending on the ones density of the incoming
signal assuming the received data has minimum
permissible ones density. Each pulse interval is 488ns at
E1 rates. The absolute value of AC is always smaller than
AD by at least 1dB.
Receiver Operation
A bipolar signal is transformer-coupled to the receiver
differential inputs (RTIP and RRING). The receiver is able
to tolerate up to 12dB of line loss measured at 1.024MHz.
It contains slicing circuitry that automatically samples the
incoming data at a fixed percentage (50% nominal) of the
peak signal amplitude. A precision peak detector
maintains the slicing level accuracy. The TTL compatible
receiver output data rails appear at the RXPOS and
RXNEG pins. The pulse width of this data; which is in RZ
format, is a function of the amount of the cable loss
present.
The LOS detection/clearing criteria described above is
fully compliant with G.775 LOS specification. In the “user
programmable” mode the user has the option of
extending the declaration and clearing delay (10<N<255)
by an amount which is equal to 2048 x T. T is the time
period of the clock supplied to LOSCNT (pin 73) by the
user.
Receiver Loss Of Signal Detection (LOS)
Absence of signal at any receiver input is detected by the
loss of signal (LOS) circuit. One LOS detection circuitry is
provisioned for each receiver. The LOS signal is asserted
(LOS=1) when a LOS condition is detected and is cleared
(LOS=0) when a valid input signal is restored.
Nominal signal level is defined as 2.37V peak measured
between RTIP or RRING and ground. (This voltage will
be present in 75W applications using a 1:2 CT ratio input
transformer terminated in 300W with the center tap
grounded with 0dB of cable and a 2.37V peak amplitude
transmit pulse at the cable input.)
Two modes of LOS circuit operation are supported.
These distinct modes are called “automatic” and
“user-programmable”. When LOSSEL (pin 38) is set to
logic “1”, the automatic mode is selected. In this mode the
LOS condition will be declared and cleared in full
Rev. 1.10
12
This Material Copyrighted by Its Respective Manufacturer
XRT5897
Transmitters
This device contains four identical ITU G.703 compliant
transmitters. The output stage of each transmitter is a
differential voltage driver. External resistors need to be
connected to the primary of output transformer. This is
necessary to maintain an accurate source impedance
that ensures compliance to ETSI 300 166 return loss
requirement.
modes of operation referred to as “clocked” or “clockless”
modes. The operational mode is selected automatically
based on the signal provided to TXCLK input. If a clock is
present at this pin, the transmitter detects its presence
and operates in the clocked mode. In this mode, the
transmit input should be supplied with full-width NRZ
pulses. If a clock is not present at the TXCLK input (pin is
left open), the part operates in the clockless mode. In this
mode, RZ data should be supplied to the device. Each
transmit channel of XRT5897 has a duty cycle correction
circuitry. This enables the device to produce output
bipolar pulses fully compliant with G.703 despite having
TXCLK signal with 30% to 70% duty cycle.
TTL compatible dual rail transmit data signals are
supplied to TXPOS and TXNEG inputs. The transmitter
differential outputs TTIP and TRING are connected to the
output transformer primary through series 9.1W resistors.
All the four transmitters can be operated in two distinct
269 ns
(244 + 25)
Nominal pulse
20%
V = 100%
10%
194 ns
(244 -- 50)
10%
20%
50%
244 ns
219 ns
(244 -- 25)
10%
10%
0%
10%
20%
488 ns
(244 + 244)
Note: V corresponds to the nominal peak value
Figure 4. CCITT G.703 Pulse Template
Rev. 1.10
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10%
XRT5897
Transmitter Output Pulse Measurement
Figure 1 shows a typical transmit pulse plotted on the template shown in ITU G.703 Figure 15/G.703. The following
conditions apply:
VCC=3.30V
Transmitter output transformer secondary terminated with 120W.
All ones signal.
Receiver output looped backed into transmitter digital input.
Operation without transmitter clock (RZ data).
Measurement made with a Tektronix TDS640 digital scope set to full bandwidth.
1.2
1.0
Normalized Amplitude
0.8
0.6
0.4
0.2
0
-0.2
-244
-122
0
122
Time (ns)
Figure 5. XRT5897 Output Pulse
Rev. 1.10
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This Material Copyrighted by Its Respective Manufacturer
244
XRT5897
Transmitter Output Return Loss Measurements
The following measurements were made with a Wandel
and Goltermann SNA--2 Network Analyzer equipped with
an RFZ--1 75W Return Loss Bridge. A 75W to 120W
impedance matching transformer was used to make the
120W measurement. A network analyzer calibration run
subtracted out the effects of this transformer.
This configuration was used for both 75W and 120W
measurements. The only change was the termination
resistance provided by the return loss bridge.
Test Results:
Table 5 compares measured output return loss with
requirements in ETSI FINAL DRAFT prETS 300 166,
June 1993. These results show that measured return loss
is mainly determined by the characteristics of the output
transformer. This is particularly evident for the 120W load
where the measured result is better than the calculated
value.
Test Conditions:
D Output transformer ratio was 1:2.
D Transmitter series resistors (R3 and R4 in Figure 1)
were 9.1W.
D Device was powered from a 3.3V source, transmitter
was enabled, and no output data was present.
Frequency
(KHz)
ETSI Spec.
(Min. dB)
Meas. Value (dB)
75W Load
Meas. Value (dB)
120W Load
0.025 fb
51.2
6
22.6
15.4
0.05 fb
102.4
8
22.6
15.7
1.5 fb
3072
8
18.0
14.6
Specified
Frequency
Table 5. Transmitter Output Return Loss Measurements
Notes:
fb = 2048KHz
This data shows that the XRT5897 is fully compliant with the ETSI Output Return Loss Specification for E1 operation with either
75W or 120W loads.
Rev. 1.10
15
This Material Copyrighted by Its Respective Manufacturer
XRT5897
The following pictures show typical results of measurements that made over a 50 KHz to 3.5MHz frequency range.
Figure 6. 75W Return Loss Measurement
Figure 6, shows a return loss better than 20dB at low frequencies that decreases to about 12dB at 3.5MHz. Since the
source and load resistances are well--matched, the return loss degradation is due to the transformer.
Figure 7. 120W Return Loss Measurement
Figure 7, shows that for the 120W case, transformer characteristics improve return loss at lower frequencies. At 3.5
MHz, return loss is close to the calculated 13.8dB for a 75W source terminated with 120W.
Rev. 1.10
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This Material Copyrighted by Its Respective Manufacturer
XRT5897
Output Transformer Selection
A 1:2 ratio transformer is recommended for both 75W and 120W operation because the transmitter, when equipped with
this device, meets both the ITU G.703 output pulse amplitude requirement and, the ETSI return loss specification.
Although a center--tapped output transformer is not required, choosing a part with a center-tapped secondary allows the
use of the same type of unit at the receiver input.
A theoretical justification for the 1:2 ratio transformer follows:
RSpos
TTIP
R3
1:n
VSpos
VO
VSneg
RL
TRING
RSneg
R4
Figure 8. Transmitter Line Driver Model
Where:
Vspos = Vsneg = 1.25V typical (Differential line driver peak output voltage swing)
Rspos = Rsneg = 0.8W typical (Differential line driver internal source resistance)
R3 = R4 = 9.1W (Differential line driver external source resistance from Figure 1)
RL = 75W or 120W (Transmitter load resistance)
n = 2 (Transformer turns ratio)
Vo = Transmitter peak output voltage (Measured across RL = 75W or RL = 120W)
Figure 9 may be converted to a single--ended model:
RSint
RSext
1:n
VS
VO
Figure 9. Single-ended Line Driver Model
Where:
VS = ÷Vspos÷ + ÷Vsneg÷
RSint = RSpos + Rsneg
RSext = R3 + R4
Rev. 1.10
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This Material Copyrighted by Its Respective Manufacturer
RL
XRT5897
This may be further simplified:
RT
I
Vs
Veq
Figure 10. Equivalent Circuit
Where:
RT = RSint + Rsext
Req =
RL
n2
Therefore:
I =
Vs
RT + Req
Veq = I Req
Vo = n Veq
And:
Return Loss = 20 log
RT + Req
RT-- Req
Table 6. contains the results of calculations made with these equations. The numbers show that output pulse amplitude
is within millivolts of the nominal values of 2.37V and 3.00V specified by ITU G.703 for 75W and 120W operation. Also,
the 1:2 ratio transformer provides an almost-perfect match for 75W operation, and return loss is well within the ETSI
specification for the 120W load.
Load Resistance
RL (W)
Pulse Amplitude
Vo (Volts Peak)
Output
Return Loss (dB)
75
2.43
31.3
120
3.01
13.8
Table 6. Calculated Transmitter Pulse Amplitude and Return Loss
Rev. 1.10
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This Material Copyrighted by Its Respective Manufacturer
XRT5897
100 LEAD THIN QUAD FLAT PACK
(14 x 14 x 1.4 mm, TQFP)
Rev. 2.00
D
D1
75
51
76
50
D1
100
26
1
A2
25
e
B
C
A
Seating Plane
a
A1
L
INCHES
SYMBOL
A
A1
A2
B
C
D
D1
e
L
a
MIN
MILLIMETERS
MAX
MIN
0.055
0.063
0.002
0.006
0.053
0.057
0.007
0.011
0.004
0.008
0.622
0.638
0.547
0.555
0.020 BSC
0.018
0.030
1.40
0.05
1.35
0.17
0.09
15.80
13.90
0°
7°
1.60
0.15
1.45
0.27
0.20
16.20
14.10
0.50 BSC
0.45
0.75
0°
Note: The control dimension is the millimeter column
Rev. 1.10
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This Material Copyrighted by Its Respective Manufacturer
MAX
7°
D
XRT5897
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are
free of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary
depending upon a user’s specific application. While the information in this publication has been carefully checked;
no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or
malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly
affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation
receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the
user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2000 EXAR Corporation
Datasheet March 2000
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 1.10
20
This Material Copyrighted by Its Respective Manufacturer