2SJ280(L), 2SJ280(S) Silicon P-Channel MOS FET November 1996 Application High speed power switching Features • • • • • • Low on-resistance High speed switching Low drive current 4 V gate drive device can be driven from 5 V source Suitable for switching regulator, DC-DC converter Avalanche ratings Outline LDPAK 4 4 1 2 1 2 3 3 D G S 1. Gate 2. Drain 3. Source 4. Drain 2SJ280(L), 2SJ280(S) Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS –60 V Gate to source voltage VGSS ±20 V Drain current ID –30 A –120 A –30 A –30 A 77 mJ 75 W Drain peak current ID(pulse)* Body to drain diode reverse drain current IDR Avalanche current Avalanche energy Channel dissipation IAP* 3 EAR* 3 Pch* 2 1 Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Notes 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at TC = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω 2 2SJ280(L), 2SJ280(S) Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test conditions Drain to source breakdown voltage V(BR)DSS –60 — — V ID = –10 mA, VGS = 0 Gate to source breakdown voltage V(BR)GSS ±20 — — V IG = ±200 µA, VDS = 0 Gate to source leak current IGSS — — ±10 µA VGS = ±16 V, VDS = 0 Zero gate voltage drain current IDSS — — –250 µA VDS = –50 V, VGS = 0 Gate to source cutoff voltage VGS(off) –1.0 — –2.25 V ID = –1 mA, VDS = –10 V Static drain to source on state resistance RDS(on) — 0.033 0.043 Ω ID = –15 A, VGS = –10 V* — 0.045 0.06 Ω ID = –15 A, VGS = –4 V* 1 Forward transfer admittance |yfs| 17 25 — S ID = –15 A, VDS = –10 V* Input capacitance Ciss — 3300 — pF VDS = –10 V, VGS = 0, f = 1 MHz Output capacitance Coss — 1500 — pF Reverse transfer capacitance Crss — 480 — pF Turn-on delay time td(on) — 30 — ns Rise time tr — 170 — ns Turn-off delay time td(off) — 500 — ns Fall time tf — 390 — ns Body to drain diode forward voltage VDF — –1.5 — V IF = –30 A, VGS = 0 Body to drain diode reverse recovery time trr — 200 — ns IF = –30 A, VGS = 0, diF/dt = 50 A/µs Note 1 1 ID = –15 A, VGS = –10 V, RL = 2 Ω 1. Pulse test 3 2SJ280(L), 2SJ280(S) Power vs. Temperature Derating Channel Dissipation Pch (W) 75 50 25 0 50 100 150 Case Temperature Tc (°C) Maximum Safe Operation Area ea ) ar on S( D O is pe lim ra ite tion d in by t R his –10 pe O –30 µs ) µs s 5°C 10 0 m 2 s 10 m 10 c = 1 = (T n PW atio r –100 DC Drain Current I D (A) –500 –300 –3 Ta = 25°C –1 –0.5 –0.1 –0.3 –1 –3 –10 –30 –100 Drain to Source Voltage VDS (V) Typical Output Characteristics –50 –10 V –6 V –4 V –3.5 V Drain Current I D (A) –40 –3 V –30 –20 –2.5 V –10 VGS = –2 V 0 0 –2 –4 –6 –8 –10 Drain to Source Voltage VDS (V) Typical Transfer Characteristics –50 Drain Current I D (A) –40 –25°C 75°C Pulse Test –30 V = –10 V GS –20 –10 0 4 Tc = 25°C –1 –2 –3 –4 –5 Gate to Source Voltage VGS (V) 2SJ280(L), 2SJ280(S) Drain-Source Saturation Voltage vs. Gate-Source Voltage Drain to Source Saturation Voltage V DS (on) (V) –2.0 Pulse Test –1.6 –1.2 I D = –30 A –0.8 –20 A –0.4 –10 A 0 –2 –4 –6 –8 –10 Gate to Source Voltage VGS (V) Static Drain-Source on State Resistance vs. Drain Current Static Drain-Source on State Resistance R DS(on) (Ω ) 0.5 0.2 0.1 0.05 VGS = –4 V –10 V 0.02 0.01 0.005 –2 –5 –10 –20 –50 –100 –200 Drain Current I D (A) Static Drain-Source on State Resistance vs. Temperature Static Drain-Source on State Resistance RDS(on) (Ω ) 0.1 0.08 0.06 Pulse test I D = –30 A VGS = –4 V –10 A, –20 A 0.04 0.02 0 –40 –10 V I D = –30 A –10 A, –20 A 0 40 80 120 160 Case Temperature TC (°C) 5 2SJ280(L), 2SJ280(S) Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |y fs | (s) 100 Pulse Test VDS = –10 V 50 Tc = 25°C 20 –25°C 75°C 10 5 2 1 –0.5 –1 –2 –5 –10 –20 Drain Current I D (A) –50 Body-Drain Diode Reverse Recovery Time Reverse Recovery Time t rr (ns) 500 200 100 50 20 di/dt = 50 A/ µ s, VGS = 0 Ta = 25°C 10 5 –1 –2 –5 –10 –20 –50 –100 Reverse Drain Current I DR (A) Typical Capacitance vs. Drain-Source Voltage 10000 Capacitance C (pF) Ciss Crss 100 VGS = 0, f = 1 MHz 10 0 6 Coss 1000 –10 –20 –30 Drain to Source Voltage –40 –50 VDS (V) 2SJ280(L), 2SJ280(S) Dynamic Input Characteristics 0 VDD = –10 V –25 V –50 V –20 –4 VDS –40 –8 VDD = –10 V –25 V –50 V –60 –12 VGS I D = –30 A –80 –100 0 –16 40 80 120 160 Gate Charge Qg (nc) Gate to Source Voltage VGS (V) Drain to Source Voltage VDS (V) 0 –20 200 Switching Characteristics 1000 Switching Time t (ns) td(off) 500 tf 200 100 tr 50 td(on) VGS = –10 V, VDD =: –30 V PW = 2 µs, duty < = 1% 20 10 –0.5 –1 –2 –5 –10 –20 Drain Current I D (A) –50 Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current I DR (A) –50 Pulse Test –40 VGS = –10 V –30 –20 –5 V 0, 5V –10 0 0 –0.4 –0.8 –1.2 –1.6 –2.0 Source to Drain Voltage VSD (V) Repetive Avaranche Energy E AR (mJ) Maxmum Avalanche Energy vs. Channel Temperature Derating 100 80 I AP = –30 A VDD = –25 V duty < 0.1% Rg > = 50 Ω 60 40 20 0 25 50 75 100 125 150 Channel Temperature Tch (°C) 7 2SJ280(L), 2SJ280(S) Avalanche Test Circuit and Waveform Rg VDSS E AR = 1 • L • I AP 2 • 2 VDSS – VDD L VDS Monitor I AP Monitor V(BR)DSS I AP VDD D.U.T 50 Ω 0 Normalized Transient Thermal Impedance γS (t) VDS ID Vin –15 V VDD Normalized Transient Thermal Impedance vs. Pulse Width 3 TC = 25°C 1.0 D=1 0.5 0.3 0.2 0.1 0.05 0.02 0.03 0.01 10 µ θch–c (t) = γS (t) · θch–c θch–c = 1.67°C/W, TC = 25°C 0.1 PDM 1 se 0.0 t Pul o 1 Sh T 100 µ 1m 10 m Pulse Width PW (s) 100 m Switching Time Test Circuit Vin Monitor Vout Monitor D.U.T RL 50 Ω VDD . =. 30 V Vin –10 V Waveforms Vin 10% 90% 90% 90% Vout td (on) 8 10% 10% tr td (off) tf D = PW T PW 1 10 2SJ280(L), 2SJ280(S) When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi’s permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user’s unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales company. Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi’s products are requested to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL APPLICATIONS. 9