MICROSEMI APT4F120K_10

APT4F120K
1200V, 4A, 4.2Ω Max Trr ≤195nS
N-Channel FREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
This 'FREDFET' version has a drain-source (body) diode that has been optimized for
high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft
recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly
reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The
intrinsic gate resistance and capacitance of the poly-silicon gate structure help control
di/dt during switching, resulting in low EMI and reliable paralleling, even when switching
at very high frequency.
TO-220
D
APT4F120K
Single die FREDFET G
S
TYPICAL APPLICATIONS
FEATURES
• Fast switching with low EMI
• ZVS phase shifted and other full bridge
• Low trr for high reliability
• Half bridge
• Ultra low Crss for improved noise immunity
• PFC and other boost converter
• Low gate charge
• Buck converter
• Avalanche energy rated
• Single and two switch forward
• RoHS compliant
• Flyback
Absolute Maximum Ratings
Symbol
Parameter
Ratings
Unit
Continuous Drain Current @ TC = 25°C
4
Continuous Drain Current @ TC = 100°C
3
IDM
Pulsed Drain Current
15
VGS
Gate - Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
310
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
2
A
ID
1
A
Thermal and Mechanical Characteristics
Characteristic
Min
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
-
-
225
RθJC
Junction to Case Thermal Resistance
-
-
.56
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
-
.11
-
-55
-
150
-
-
300
-
0.07
-
oz
-
1.22
-
g
-
-
10
in·lbf
-
-
1.1
N·m
TJ, TSTG
Operating and Storage Junction Temperature Range
TL
Soldering Temperature for 10 Seconds (1.6mm from case)
WT
Package Weight
Torque
Mounting Torque (TO-220 Package), 4-40 or M3 screw
Microsemi Website - http://www.microsemi.com
°C/W
°C
050-8163 Rev D 3-2010
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
VBR(DSS)
Drain-Source Breakdown Voltage
∆VBR(DSS)/∆TJ
Breakdown Voltage Temperature Coefficient
RDS(on)
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
∆VGS(th)/∆TJ
Min
VGS = 0V, ID = 250μA
1200
Threshold Voltage Temperature Coefficient
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
4.2
Ω
4
5
V
VGS = VDS, ID = 0.5mA
VGS = 0V
TJ = 125°C
1000
VGS = ±30V
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Gate-Drain Charge
td(on)
Turn-On Delay Time
tr
td(off)
tf
Current Fall Time
nA
Typ
Max
Unit
S
4.5
17
100
pF
40
VGS = 0V, VDS = 0V to 800V
20
43
VGS = 0 to 10V, ID = 2A,
VDS = 600V
7
nC
20
7.4
Resistive Switching
Current Rise Time
Turn-Off Delay Time
±100
1385
Effective Output Capacitance, Energy Related
Qgd
Min
VGS = 0V, VDS = 25V
f = 1MHz
Effective Output Capacitance, Charge Related
Gate-Source Charge
μA
TJ = 25°C unless otherwise specified
Input Capacitance
Qgs
mV/°C
250
Ciss
Total Gate Charge
-10
TJ = 25°C
gfs
Qg
2.5
V/°C
VDS = 1200V
Test Conditions
5
V
3.42
VDS = 50V, ID = 2A
Co(er)
Unit
VGS = 10V, ID = 2A
Parameter
4
Max
1.41
Forward Transconductance
Co(cr)
Typ
Reference to 25°C, ID = 250μA
3
IDSS
Symbol
Test Conditions
APT4F120K
4.4
VDD = 800V, ID = 2A
RG = 10Ω
6
ns
24
, VGG = 15V
6.9
Source-Drain Diode Characteristics
Symbol
Parameter
Test Conditions
Continuous Source Current
MOSFET symbol
(Body Diode)
showing the integral
reverse p-n junction
ISM
Pulsed Source Current
(Body Diode) 1
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
IS
Reverse Recovery Charge
diSD/dt = 100A/μs,
050-8163 Rev D 3-2010
dv/dt
Reverse Recovery Current
Peak Recovery dv/dt
Max
Unit
4
A
15
S
ISD = 2A, TJ = 25°C, VGS = 0V
VDD = 100V
Irrm
Typ
G
diode (body diode)
ISD = 2A 3 ,
Qrr
Min
D
0.8
1.3
TJ = 25°C
170
195
TJ = 125°C
330
400
TJ = 25°C
.370
TJ = 125°C
.820
TJ = 25°C
4.90
TJ = 125°C
5.40
ISD ≤ 2A, di/dt≤1000Aμs, VDD = 800V,
TJ = 125°C
1
2
3
4
5
nS
μC
A
20
Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
Starting at TJ = 25°C, L = 155.0mH, RG = 25Ω, IAS = 2A.
Pulse test: Pulse Width < 380μs, duty cycle < 2%.
Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -8.32E-8/VDS^2 + 3.49E-8/VDS + 1.30E-10.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
V
V/ns
APT4F120K
10
4.0
V
GS
T = 125°C
= 10V
J
3.5
ID, DRIAN CURRENT (A)
TJ = -55°C
6
4
TJ = 25°C
2
0
TJ = 125°C
3.0
GS
2.0
5V
1.5
1.0
4.5V
0.5
TJ = 150°C
0
0
5
10
15
20
25
30
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 2, Output Characteristics
16
NORMALIZED TO
VDS> ID(ON) x RDS(ON) MAX.
VGS = 10V @ 2A
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
14
2.5
ID, DRAIN CURRENT (A)
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
Figure 1, Output Characteristics
3.0
= 6, 7, 8 & 9V
V
2.5
2.0
1.5
1.0
0.5
12
10
TJ = -55°C
8
TJ = 25°C
6
TJ = 125°C
4
2
0
0-55 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
0
1
2
3
4
5
6
7
8
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
2,000
5
4
TJ = -55°C
C, CAPACITANCE (pF)
gfs, TRANSCONDUCTANCE
1,000
TJ = 25°C
3
TJ = 125°C
2
100
Coss
10
Crss
1
00
0.5
1.0
1.5
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
1
2.0
200
400
600
800 1000 1200
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
16
VDS = 240V
10
VDS = 600V
8
6
VDS = 960V
4
2
0
0
10
20
30
40
50
60
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
ISD, REVERSE DRAIN CURRENT (A)
14
12
0
16
ID = 2A
VGS, GATE-TO-SOURCE VOLTAGE (V)
Ciss
14
12
10
8
TJ = 25°C
6
TJ = 150°C
4
2
0
0
0.2
0.4
0.6
0.8
1.0
1.2
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
050-8163 Rev D 3-2010
ID, DRAIN CURRENT (A)
8
APT4F120K
20
20
10
10
IDM
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
IDM
13µs
100µs
1
Rds(on)
1ms
10ms
0.1
TJ = 125°C
TC = 75°C
1
13µs
Rds(on)
100µs
1ms
1
10ms
TJ = 150°C
TC = 25°C
100ms
DC line
Scaling for Different Case & Junction
Temperatures:
ID = ID(T = 25°C)*(TJ - TC)/125
100ms
DC line
0.1
10
100
1200
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
C
1
10
100
1200
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
D = 0.9
0.50
0.7
0.40
0.5
0.30
Note:
0.20
PDM
ZθJC, THERMAL IMPEDANCE (°C/W)
0.60
0.3
t1
t2
0.10
t1 = Pulse Duration
t
0.1
0.05
0
10
-5
Duty Factor D = 1/t2
Peak TJ = PDM x ZθJC + TC
SINGLE PULSE
10
10-3
10-2
10 -1
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
-4
1.0
TO-220 (K) Package Outline
e3 100% Sn Plated
1.39 (.055)
0.51 (.020)
Drain
10.66 (.420)
9.66 (.380)
5.33 (.210)
4.83 (.190)
6.85 (.270)
5.85 (.230)
16.25 (.639)
14.23 (.560)
4.08 (.161) Dia.
3.54 (.139)
3.42 (.135)
2.54 (.100)
3.683 (.145)
MAX.
0.50 (.020)
0.41 (.016)
050-8163 Rev D 3-2010
2.92 (.115)
2.04 (.080)
4.82 (.190)
3.56 (.140)
14.73 (.580)
12.70 (.500)
Gate
Drain
Source
1.01 (.040) 3-Plcs.
0.83 (.033)
2.79 (.110)
2.29 (.090)
5.33 (.210)
4.83 (.190)
1.77 (.070) 3-Plcs.
1.15 (.045)
Dimensions in Millimeters and (Inches)
Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583
4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262
and foreign patents. US and Foreign patents pending. All Rights Reserved.