ETC 74LVXU04

74LVXU04
LOW VOLTAGE CMOS HEX INVERTER (SINGLE STAGE)
WITH 5V TOLERANT INPUTS
■
HIGH SPEED :
tPD = 5.0ns (TYP.) at VCC = 3.3V
■
5V TOLERANT INPUTS
■
LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
■
LOW NOISE:
VOLP = 0.3V (TYP.) at VCC = 3.3V
■
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
■
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
■
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 04
■
IMPROVED LATCH-UP IMMUNITY
■
POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVXU04 is a low voltage CMOS HEX
INVERTER (SINGLE STAGE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
SOP
TSSOP
74LVXU04M
74LVXU04MTR
74LVXU04TTR
As the internal circuit is composed of a single
stage inverter, it can be used in analog application
such as crystal oscillator.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/8
74LVXU04
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
1, 3, 5, 9, 11,
13
2, 4, 6, 8, 10,
12
7
NAME AND FUNCTION
1A to 6A
Data Inputs
1Y to 6Y
Data Outputs
GND
VCC
Ground (0V)
14
Positive Supply Voltage
TRUTH TABLE
A
Y
L
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Parameter
Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
Value
Unit
-0.5 to +7.0
V
-0.5 to +7.0
V
-0.5 to VCC + 0.5
- 20
V
mA
IIK
DC Input Diode Current
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 25
mA
ICC or IGND DC VCC or Ground Current
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
± 50
mA
-65 to +150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Supply Voltage (note 1)
Unit
2 to 3.6
V
VI
Input Voltage
0 to 5.5
V
VO
Output Voltage
0 to VCC
V
Top
Operating Temperature
dt/dv
Input Rise and Fall Time (note 2) (VCC = 3.3V)
1) Truth Table guaranteed: 1.2V to 3.6V
2) VIN from 0.8V to 2.0V
2/8
Value
-55 to 125
°C
0 to 100
ns/V
74LVXU04
DC SPECIFICATIONS
Test Condition
Symbol
VIH
VIL
Parameter
Value
TA = 25°C
VCC
(V)
Min.
High Level Input
Voltage
2.0
3.0 to
Low Level Input
Voltage
3.6
2.0
3.0 to
Typ.
Max.
VOL
II
ICC
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
-55 to 125°C
Min.
Min.
Max.
1.7
1.7
1.7
0.8
VCC
0.8
VCC
0.8
VCC
3.6
VOH
-40 to 85°C
Unit
Max.
V
0.3
0.3
0.3
0.2
VCC
0.2
VCC
0.2
VCC
V
2.0
IO=-50 µA
3.0
3.0
2.0
IO=50 µA
0.0
3.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=4 mA
0.36
0.44
0.55
3.6
VI = 5V or GND
± 0.1
±1
±1
µA
3.6
VI = VCC or GND
2
20
20
µA
1.9
2.0
IO=-50 µA
2.9
3.0
IO=-4 mA
2.58
1.9
1.9
2.9
2.9
2.48
2.4
0.1
0.1
V
0.1
V
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Symbol
VOLP
VOLV
VIHD
VILD
Parameter
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input (note
1, 3)
Dynamic Low
Voltage Input (note
1, 3)
Value
TA = 25°C
VCC
(V)
Min.
3.3
-0.5
3.3
Typ.
Max.
0.3
0.5
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
-0.3
2
CL = 50 pF
3.3
-40 to 85°C
V
0.8
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
3/8
74LVXU04
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
Test Condition
Symbol
Parameter
tPLH tPHL Propagation Delay
Time
tOSLH
tOSHL
Output To Output
Skew Time (note1,
2)
VCC
(V)
CL
(pF)
2.7
2.7
Value
TA = 25°C
Min.
-40 to 85°C
-55 to 125°C
Typ.
Max.
Min.
Max.
Min.
Max.
15
50
6.5
8.5
10.4
13.0
1.0
1.0
13.7
15.2
1.0
1.0
13.7
15.2
3.3(*)
15
5.0
8.9
1.0
10.5
1.0
10.5
3.3(*)
2.7
50
7.5
11.4
1.0
13.0
1.0
13.0
50
3.3(*)
50
0.5
0.5
1.0
1.0
1.5
1.5
1.5
1.5
Unit
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V ± 0.3V
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
VCC
(V)
Value
TA = 25°C
Min.
Typ.
Max.
10
CIN
Input Capacitance
3.3
5
CPD
Power Dissipation
Capacitance
(note 1)
3.3
9
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
10
Unit
Max.
10
pF
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/6 (per gate)
4/8
74LVXU04
TEST CIRCUIT
CL =15/50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM : PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
5/8
74LVXU04
SO-14 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
MAX.
0.003
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45° (typ.)
D
8.55
8.75
0.336
0.344
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
7.62
0.300
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.68
0.026
8° (max.)
PO13G
6/8
74LVXU04
TSSOP14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0°
L
0.45
A
0.60
0.0256 BSC
8°
0°
0.75
0.018
8°
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
7/8
74LVXU04
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics
© 2001 STMicroelectronics - Printed in Italy - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco
Singapore - Spain - Sweden - Switzerland - United Kingdom
© http://www.st.com
8/8