ETC BAT54CLT1/D

BAT54CLT1
Preferred Device
Dual Series Schottky
Barrier Diodes
These Schottky barrier diodes are designed for high speed switching
applications, circuit protection, and voltage clamping. Extremely low
forward voltage reduces conduction loss. Miniature surface mount
package is excellent for hand held and portable applications where
space is limited.
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30 VOLT
DUAL COMMON CATHODE
SCHOTTKY BARRIER DIODES
• Extremely Fast Switching Speed
• Low Forward Voltage - 0.35 Volts (Typ) @ IF = 10 mAdc
1
ANODE
2
ANODE
3
CATHODE
MARKING
DIAGRAM
MAXIMUM RATINGS (TJ = 125°C unless otherwise noted)
Symbol
Value
Unit
Reverse Voltage
VR
30
Volts
Forward Power Dissipation
@ TA = 25°C
Derate above 25°C
PF
225
1.8
mW
mW/°C
Rating
3
3
5C
Forward Current (DC)
IF
200 Max
mA
Junction Temperature
TJ
125 Max
°C
Storage Temperature Range
Tstg
- 55 to +150
°C
1
1
2
2
(TO-236)
SOT-23
CASE 318-08
STYLE 9
ORDERING INFORMATION
Device
BAT54CLT1
Package
Shipping
SOT-23
3000/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
 Semiconductor Components Industries, LLC, 2003
June, 2003 - Rev. 0
1
Publication Order Number:
BAT54SLT1/D
BAT54CLT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (EACH DIODE)
Characteristic
Symbol
Min
Typ
Max
Unit
V(BR)R
30
-
-
Volts
Total Capacitance (VR = 1.0 V, f = 1.0 MHz)
CT
-
7.6
10
pF
Reverse Leakage (VR = 25 V)
IR
-
0.5
2.0
µAdc
Forward Voltage (IF = 0.1 mAdc)
VF
-
0.22
0.24
Vdc
Forward Voltage (IF = 30 mAdc)
VF
-
0.41
0.5
Vdc
Forward Voltage (IF = 100 mAdc)
VF
-
0.52
0.8
Vdc
Reverse Recovery Time
(IF = IR = 10 mAdc, IR(REC) = 1.0 mAdc, Figure 1)
trr
-
-
5.0
ns
Forward Voltage (IF = 1.0 mAdc)
VF
-
0.29
0.32
Vdc
Forward Voltage (IF = 10 mAdc)
VF
-
0.35
0.40
Vdc
Forward Current (DC)
IF
-
-
200
mAdc
Repetitive Peak Forward Current
IFRM
-
-
300
mAdc
Non-Repetitive Peak Forward Current (t < 1.0 s)
IFSM
-
-
600
mAdc
Reverse Breakdown Voltage (IR = 10 µA)
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2
BAT54CLT1
820 Ω
+10 V
2k
0.1 µF
IF
100 µH
tr
tp
IF
T
10%
0.1 µF
trr
T
DUT
50 Ω OUTPUT
PULSE
GENERATOR
50 Ω INPUT
SAMPLING
OSCILLOSCOPE
90%
iR(REC) = 1 mA
IR
VR
OUTPUT PULSE
(IF = IR = 10 mA; measured
at iR(REC) = 1 mA)
INPUT SIGNAL
Notes: 1. A 2.0 kΩ variable resistor adjusted for a Forward Current (IF) of 10 mA.
Notes: 2. Input pulse is adjusted so IR(peak) is equal to 10 mA.
Notes: 3. tp » trr
Figure 1. Recovery Time Equivalent Test Circuit
100
1000
TA = 150°C
IR, REVERSE CURRENT (µA)
85°C
10
1 50°C
1.0
25°C
0.1
0.0
- 40°C
- 55°C
100
TA = 125°C
10
1.0
TA = 85°C
0.1
0.01
TA = 25°C
0.001
0.2
0.3
0.4
0.1
0.5
VF, FORWARD VOLTAGE (VOLTS)
0
0.6
5
15
25
10
20
VR, REVERSE VOLTAGE (VOLTS)
Figure 2. Forward Voltage
Figure 3. Leakage Current
14
CT, TOTAL CAPACITANCE (pF)
IF, FORWARD CURRENT (mA)
1 25°C
12
10
8
6
4
2
0
0
5
10
15
20
VR, REVERSE VOLTAGE (VOLTS)
Figure 4. Total Capacitance
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3
25
30
30
BAT54CLT1
INFORMATION FOR USING THE SOT-23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT-23
SOT-23 POWER DISSIPATION
SOLDERING PRECAUTIONS
The power dissipation of the SOT-23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature
of the die, RθJA, the thermal resistance from the device
junction to ambient, and the operating temperature, TA.
Using the values provided on the data sheet for the SOT-23
package, PD can be calculated as follows:
PD =
The melting temperature of solder is higher than the
rated temperature of the device. When the entire device is
heated to a high temperature, failure to complete soldering
within a short time could result in device failure. Therefore, the following items should always be observed in
order to minimize the thermal stress to which the devices
are subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
TJ(max) - TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
PD =
150°C - 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT-23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher
power dissipation from the SOT-23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
* Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage
to the device.
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4
BAT54CLT1
PACKAGE DIMENSIONS
SOT-23 (TO-236)
PLASTIC PACKAGE
CASE 318-08
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
4. 318−03 AND −07 OBSOLETE, NEW STANDARD
318−08.
A
L
3
1
V
B S
2
G
C
D
H
J
K
DIM
A
B
C
D
G
H
J
K
L
S
V
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
STYLE 9:
PIN 1. ANODE
2. ANODE
3. CATHODE
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5
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.35
0.69
0.89
1.02
2.10
2.64
0.45
0.60
BAT54CLT1
SENSEFET is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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PUBLICATION ORDERING INFORMATION
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6
BAT54CLT1/D