DLO32F data 3 delay devices, inc. TTL-INTERFACED, GATED DELAY LINE OSCILLATOR (SERIES DLO32F) FEATURES • • • • • • • PACKAGES Continuous or keyable wave train Synchronizes with arbitrary gating signal Fits standard 14-pin DIP socket Low profile Auto-insertable Input & outputs fully TTL interfaced & buffered Available in frequencies from 2MHz to 40MHz C1 GND 1 14 VCC 10 C2 8 GB 7 DLO32F-xx DLO32F-xxA2 DLO32F-xxB2 DLO32F-xxM C1 N/C N/C N/C N/C N/C GND DIP Gull-Wing J-Lead Military DIP 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC N/C N/C N/C C2 N/C GB Military SMD DLO32F-xxMD1 DLO32F-xxMD4 FUNCTIONAL DESCRIPTION PIN DESCRIPTIONS The DLO32F-series device is a gated delay line oscillator. The device produces a stable square wave which is synchronized with the falling edge of the Gate Input (GB). The frequency of oscillation is given by the device dash number (See Table). The two outputs (C1,C2) are in complementary during oscillation, but both return to logic low when the device is disabled. GB C1 C2 VCC GND SERIES SPECIFICATIONS • • • • • • • • Frequency accuracy: Inherent delay (TE0): Output skew: Output rise/fall time: Supply voltage: Supply current: Operating temperature: Temperature coefficient: GATE (GB) DASH NUMBER SPECIFICATIONS 2% 3ns typical 2.5ns typical 2ns typical 5VDC ± 5% 40ma typical (7ma when disabled) 0° to 70° C 100 PPM/°C (See text) tGR tEO tDO CLOCK 1 (C1) tCS 1/f0 CLOCK 2 (C2) Figure 1: Timing Diagram 3/17/98 This Material Copyrighted by Its Respective Manufacturer Part Number DLO32F-2 DLO32F-2.5 DLO32F-3 DLO32F-3.5 DLO32F-4 DLO32F-4.5 DLO32F-5 DLO32F-5.5 DLO32F-6 DLO32F-7 DLO32F-8 DLO32F-9 DLO32F-10 DLO32F-12 DLO32F-14 DLO32F-15 DLO32F-20 DLO32F-25 DLO32F-30 DLO32F-35 DLO32F-40 Frequency (MHz) 2.0 ± 0.04 2.5 ± 0.05 3.0 ± 0.06 3.5 ± 0.07 4.0 ± 0.08 4.5 ± 0.09 5.0 ± 0.10 5.5 ± 0.11 6.0 ± 0.12 7.0 ± 0.14 8.0 ± 0.16 9.0 ± 0.18 10 ± 0.20 12 ± 0.24 14 ± 0.28 15 ± 0.30 20 ± 0.40 25 ± 0.50 30 ± 0.60 35 ± 0.70 40 ± 0.80 NOTE: Any dash number between 2 and 40 not shown is also available. 1998 Data Delay Devices Doc #98002 Gate Input Clock Output 1 Clock Output 2 +5 Volts Ground DATA DELAY DEVICES, INC. 3 Mt. Prospect Ave. Clifton, NJ 07013 1 DLO32F APPLICATION NOTES THERMAL STABILITY POWER SUPPLY BYPASSING The delay line used internally to develop the clock signals in the DLO32F has a thermal coefficient of 100ppm/C. For low frequency units, this is also the thermal coefficient of the output frequency. For higher frequency units, however, other internal effects must be considered, and the actual thermal coefficient may be somewhat higher. The DLO32F relies on a stable power supply to produce a repeatable frequency within the stated tolerances. A 0.1uf capacitor from VCC to GND, located as close as possible to the VCC pin, is recommended. A wide VCC trace and a clean ground plane should be used. DEVICE SPECIFICATIONS TABLE 1: ABSOLUTE MAXIMUM RATINGS PARAMETER DC Supply Voltage Input Pin Voltage Storage Temperature Lead Temperature SYMBOL VCC VIN TSTRG TLEAD MIN -0.3 -0.3 -55 MAX 7.0 VDD+0.3 150 300 UNITS V V C C NOTES 10 sec TABLE 2: DC ELECTRICAL CHARACTERISTICS (0C to 70C, 4.75V to 5.25V) PARAMETER High Level Output Voltage SYMBOL VOH Low Level Output Voltage VOL High Level Output Current Low Level Output Current High Level Input Voltage Low Level Input Voltage Input Clamp Voltage Input Current at Maximum Input Voltage High Level Input Current Low Level Input Current Short-circuit Output Current Output High Fan-out Output Low Fan-out IOH IOL VIH VIL VIK IIHH MIN 2.5 TYP 3.4 MAX UNITS V 0.35 0.5 V -1.0 20.0 0.8 -1.2 0.1 mA mA V V V mA 20 -0.6 -150 25 12.5 µA mA mA Unit Load 2.0 IIH IIL IOS -60 NOTES VCC = MIN, IOH = MAX VIH = MIN, VIL = MAX VCC = MIN, IOL = MAX VIH = MIN, VIL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX TABLE 3: AC ELECTRICAL CHARACTERISTICS (0C to 70C, 4.75V to 5.25V) PARAMETER Enable to Clock On (Inherent Delay) Disable to Clock Off Clock Skew Gate Recovery Time Doc #98002 3/17/98 SYMBOL tEO tDO tCS tGR MIN 1.5 1.5 1.5 50 TYP 3.0 2.5 2.5 MAX 4.5 3.5 3.5 UNITS ns ns ns % of Clock Period DATA DELAY DEVICES, INC. Tel: 973-773-2299 This Material Copyrighted by Its Respective Manufacturer Fax: 973-773-9672 http://www.datadelay.com 2 DLO32F PACKAGE DIMENSIONS 14 10 8 Lead Material: Nickel-Iron alloy 42 TIN PLATE 14 10 8 .410 TYP. 1 1 7 7 .280 MAX. .780 MAX. .820 MAX. .290 MAX. .020 .320 TYP. MAX. .130 ±.030 .015 TYP. .010±.002 .018 TYP. .070 MAX. .350 MAX. .600±.010 .020 TYP. .200 TYP. .018 TYP. .600 TYP. .300 TYP. DLO32F-xxM (Military DIP) DLO32F-xx (Commercial DIP) .020 TYP. .040 TYP. .010 TYP. .040 TYP. .020 TYP. 10 14 .270 TYP. 10 .300 MAX. .600 .790 MAX. .050 TYP. DLO32F-xxA2 (Commercial Gull-Wing) .320 TYP. .270 TYP. 1 .090 8 .430 TYP. 7 .050 TYP. 7 .110 .200 .600 .790 MAX. .350 MAX. .110 TYP. DLO32F-xxB2 (Commercial J-Lead) .650 .100 1 .100 .017 14 1 .510 MAX. .300 TYP. 7 .510 MAX. .360 TYP. .065 TYP. .008 .045 DLO32F-xxD1 (Commercial SMD) DLO32F-xxMD1 (Military SMD) Doc #98002 3/17/98 This Material Copyrighted by Its Respective Manufacturer .050 .510 MAX. .080 .025 8 .100 .300 .200 MAX. (Com) .225 MAX. (Mil) .065 TYP. .510 MAX. 7 .050 .017 .300 TYP. 8 .100 .300 14 .200 MAX. (Com) .225 MAX. (Mil) .005 .080 .008 .360 TYP. .065 TYP. .065 TYP. DLO32F-xxD4 (Commercial SMD) DLO32F-xxMD4 (Military SMD) DATA DELAY DEVICES, INC. 3 Mt. Prospect Ave. Clifton, NJ 07013 3 DLO32F DELAY LINE AUTOMATED TESTING TEST CONDITIONS INPUT: o o Ambient Temperature: 25 C ± 3 C Supply Voltage (Vcc): 5.0V ± 0.1V Input Pulse: High = 3.0V ± 0.1V Low = 0.0V ± 0.1V Source Impedance: 50Ω Max. Rise/Fall Time: 3.0 ns Max. (measured between 0.6V and 2.4V ) Pulse Width Low: PWIN = 10 x Clock Period Period: PERIN = 20 x Clock Period OUTPUT: Load: Cload: Threshold: 1 FAST-TTL Gate 5pf ± 10% 1.5V (Rising & Falling) NOTE: The above conditions are for test only and do not in any way restrict the operation of the device. FREQUENCY COUNTER PULSE GENERATOR OUT GB TRIG DEVICE UNDER TEST (DUT) C1 IN C2 TRIG OSCILLOSCOPE Test Setup PERIN PWIN TFALL INPUT SIGNAL TRISE 2.4V 1.5V 0.6V 2.4V 1.5V 0.6V VIL VIH TEO OUTPUT SIGNAL VOH 1.5V 1.5V VOL Timing Diagram For Testing Doc #98002 3/17/98 DATA DELAY DEVICES, INC. Tel: 973-773-2299 This Material Copyrighted by Its Respective Manufacturer Fax: 973-773-9672 http://www.datadelay.com 4