IDT29FCT52AT/BT/CT FAST CMOS OCTAL REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE FAST CMOS OCTAL REGISTERED TRANSCEIVER IDT29FCT52AT/BT/CT FEATURES: DESCRIPTION: − − − The IDT29FCT52T is an 8-bit registered transceiver built using an advanced dual metal CMOS technology. Two 8-bit back-to-back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-state output enable signals are provided for each register. Both A outputs and B outputs are guaranteed to sink 64mA. − − − − − Low input and output leakage ≤1µ A (max.) CMOS power levels True TTL input and output compatibility • VOH = 3.3V (typ.) • VOL = 0.3V (typ.) Meets or exceeds JEDEC standard 18 specifications Available in SOIC, SSOP, and QSOP packages A, B, and C speed grades High drive outputs (-15mA IOH, 64mA IOL) Power off disable outputs permit “live insertion” FUNCTIONAL BLOCK DIAGRAM CPA CEA OEB A0 D 0 CE A1 D1 A2 D2 A3 D3 A4 CP Q0 B0 Q1 B1 Q2 B2 Q3 B3 D4 Q4 B4 A5 D5 Q5 B5 A6 D6 Q6 B6 A7 D7 Q7 B7 Q0 D0 Q1 D1 Q2 Q3 A Reg. B Reg. D2 D3 Q4 D4 Q5 D5 Q6 D6 Q 7 CE CP D 7 CPB OEA CEB INDUSTRIAL TEMPERATURE RANGE AUGUST 2000 1 c 1999 Integrated Device Technology, Inc. DSC-5483/- IDT29FCT52AT/BT/CT FAST CMOS OCTAL REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION Symbol VTERM(2) Rating Terminal Voltage with Respect to GND (1) Max. –0.5 to +7 Unit V B7 1 24 V CC TSTG Storage Temperature –65 to +150 °C B6 2 23 A7 IOUT DC Output Current –65 to +120 mA B5 3 22 A6 B4 4 21 A5 B3 5 20 A4 B2 6 19 A3 B1 7 18 A2 B0 8 17 A1 OEB 9 16 A0 CPA 10 15 OEA Symbol CIN Parameter(1) Input Capacitance Conditions VIN = 0V Typ. 6 Max. 10 CEA 11 14 CPB COUT Output Capacitance VOUT = 0V 8 12 SO24-2 SO24-7 SO24-8 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals. CAPACITANCE (TA = +25OC, f = 1.0MHz) Unit pF pF 8T-link GND 12 13 NOTE: 1. This parameter is measured at characterization but not tested. CEB SOIC/ SSOP/ QSOP TOP VIEW REGISTER FUNCTION TABLE (1) (Applies to A or B Register) D X L H Inputs CP X ↑ ↑ Internal Q NC L H CE H L L Function Hold Data Load Data NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care NC = No Change ↑ = LOW-to-HIGH Transition OUTPUT CONTROL (1) Internal OE Q Y-Outputs H X Z Disable Outputs Enable Outputs L L L L H H NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High-Impedance 2 Function IDT29FCT52AT/BT/CT FAST CMOS OCTAL REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE PIN DESCRIPTION Name I/O Description A0-7 I/O Eight bidirectional lines carrying the A Register inputs or B Register outputs. B0-7 I/O Eight bidirectional lines carrying the B Register inputs or A Register outputs. CPA I Clock for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition of the CPA signal. CEA I Clock Enable for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition of the CPA signal. When CEA is HIGH, the A Register holds its contents, regardless of CPA signal transitions. OEB I Output Enable for the A Register. When OEB is LOW, the A Register outputs are enabled onto the B0-7 lines. When OEB is HIGH, the B0-7 outputs are in the high-impedance state. CPB I Clock for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition of the CPB signal. CEB I Clock Enable for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition of the CPB signal. When CEB is HIGH, the B Register holds its contents, regardless of CPB signal transitions. OEA I Output Enable for the B Register. When OEA is LOW, the B Register outputs are enabled onto the A0-7 lines. When OEA is HIGH, the A0-7 outputs are in the high-impedance state. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 5% Symbol VIH Parameter Input HIGH Level Test Conditions(1) Guaranteed Logic HIGH Level VIL Input LOW Level Guaranteed Logic LOW Level IIH Input HIGH Current(4) VCC = Max. IIL Input LOW Current(4) IOZH High Impedance Output Current IOZL (3-State Output pins)(4) VCC = Max. II Input HIGH Current(4) VCC = Max., VI = VCC (Max.) VIK Clamp Diode Voltage VCC = Min., IIN = –18mA VH Input Hysteresis ICC Quiescent Power Supply Current Min. 2 Typ.(2) — Max. — Unit V — — 0.8 V VI = 2.7V — — ±1 µA VI = 0.5V — — ±1 VO = 2.7V — — ±1 VO = 0.5V — — ±1 — — ±1 — –0.7 –1.2 V — 200 — mV — 0.01 1 mA Min. 2.4 Typ.(2) 3.3 Max. — Unit V — VCC = 3V, VIN = GND or VCC µA OUTPUT DRIVE CHARACTERISTICS Symbol VOH Parameter Output HIGH Voltage Test Conditions(1) IOH = -8mA VCC = Min. VIN = VIH or VIL IOH = -15mA 2 3 — VCC = Min. IOL = 64mA — 0.3 0.55 V VOL Output LOW Voltage IOS Short Circuit Current VCC = Max., VO = GND(3) –60 –120 –225 mA IOFF Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO ≤ 4.5V — — ±1 µA VIN = VIH or VIL NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter is ±5µA at TA = -55°C. 5. This parameter is guaranteed but not tested. 3 IDT29FCT52AT/BT/CT FAST CMOS OCTAL REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ∆ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) IC Total Power Supply Current(6) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open OEA or OEB = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OEA or OEB = GND One Bit Toggling at fi = 5MHz 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OEA or OEB = GND Eight Bits Toggling at fi = 2.5MHz 50% Duty Cycle Min. — Typ.(2) 0.5 Max. 2 Unit mA VIN = VCC VIN = GND — 0.15 0.25 mA/ MHz VIN = VCC VIN = GND — 1.5 3.5 mA VIN = 3.4V — 2 5.5 VIN = VCC VIN = GND — 3.8 7.3(5) VIN = 3.4V — 6 16.3(5) VIN = GND VIN = GND NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 4 IDT29FCT52AT/BT/CT FAST CMOS OCTAL REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE 29FCT52AT Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tSU tH tW Parameter Propagation Delay CPA, CPB to An, Bn Output Enable Time OEA or OEB to An, Bn Output Disable Time OEA or OEB to An, Bn Set-up Time, HIGH or LOW An, Bn to CPA, CPB Hold Time, HIGH or LOW An, Bn to CPA, CPB Set-up Time, HIGH or LOW CEA, CEB to CPA, CPB Hold Time, HIGH or LOW CEA, CEB to CPA, CPB Condition(1) Min.(2) CL = 50pF RL = 500Ω Clock Pulse Width HIGH or LOW(3) NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not tested. 5 29FCT52BT (1) 29FCT52CT Max. Min.(2) Max. Min.(2) Max. Unit 2 10 2 7.5 2 6.3 ns 1.5 10.5 1.5 8 1.5 7 ns 1.5 10 1.5 7.5 1.5 6.5 ns 2.5 — 2.5 — 2.5 — ns 2 — 1.5 — 1.5 — ns 3 — 3 — 3 — ns 2 — 2 — 2 — ns 3 — 3 — 3 — ns IDT29FCT52AT/BT/CT FAST CMOS OCTAL REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS V CC Test 7.0V Switch Open Drain 500 Ω Disable Low V OUT V IN Pulse Generator Enable Low All Other Tests D.U.T. 50pF R Closed T C Open 8-link DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 500 Ω L O ctal lin k PULSE WIDTH SET-UP, HOLD, AND RELEASE TIMES 3V 1.5V 0V 3V 1.5V 0V DATA INPUT tH t SU TIM ING INPUT ASYNCHRONOUS C ONTROL PRES ET CLEAR ETC. SYNCHRO NOUS CONTRO L PRES ET CLEAR CLOCK ENABLE ETC. t REM t SU LO W -HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW -HIGH PULSE 1.5V 3V 1.5V 0V tH O ctal lin k O ctal lin k PROPAGATION DELAY ENABLE AND DISABLE TIMES ENAB LE SAM E PHASE INPUT TRANSITION t PLH t PH L OUTPUT t PLH OPPOSITE P HASE INPUT TRANSITION t PH L 3V 1.5V 0V DISA BLE 3V CO NTROL INPUT 1.5V t PZL V OH 1.5V V OL OUTPUT NO RM A LLY LO W 3V 1.5V 0V SW ITCH CLOSE D O ctal lin k SW ITCH OPEN 3.5V 3.5V 1.5V 0.3V t PZH OUTPUT NO RM A LLY HIGH 0V t PLZ V OL t PHZ 0.3V V OH 1.5V 0V 0V O ctal lin k NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 6 IDT29FCT52AT/BT/CT FAST CMOS OCTAL REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT29FCT XXXX Device Type X Package SO PY Q Small Outline IC (SO 24-2) Shrink Small Outline Package (SO24-7) Quarter-size Small Outline Package (SO24-8) 52AT 52BT 52CT Octal Registered Transceiver CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com* *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. The IDT logo is a registered trademark of Integrated Device Technology, Inc. 7