L4949E MULTIFUNCTION VERY LOW DROP VOLTAGE REGULATOR OPERATING DC SUPPLY VOLTAGE RANGE 5V - 28V TRANSIENT SUPPLY VOLTAGE UP TO 40V EXTREMELY LOW QUIESCENT CURRENT IN STANDBY MODE HIGH PRECISION STANDBY OUTPUT VOLTAGE 5V±1% OUTPUT CURRENT CAPABILITY UP TO 100mA VERY LOW DROPOUT VOLTAGE LESS THAN 0.5V RESET CIRCUIT SENSING THE OUTPUT VOLTAGE PROGRAMMABLE RESET PULSE DELAY WITH EXTERNAL CAPACITOR VOLTAGE SENSE COMPARATOR THERMAL SHUTDOWN AND SHORT CIRCUIT PROTECTIONS Minidip SO8 SO20W (12+4+4) ORDERING NUMBERS: L4949E (Minidip) L4949ED (SO8) L4949EP (SO20W) DESCRIPTION The L4949E is a monolithic integrated 5V voltage regulator with a very low dropout output and additional functions as power-on reset and input voltage sense. It is designed for supplying the microcomputer controlled systems especially in automotive applications. BLOCK DIAGRAM VZ VS VOUT CT PREREGULATOR 5V 2µ RES + 2V REG RESET VS SO SI 1.23V REF 1.23V SENSE GND D96AT219 July 1997 1/10 L4949E ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VSDC DC Operating Supply Voltage 28 V VSTR Transient Supply Voltage (T < 1s) 40 V IO Output Current Internally Limited VO Output Voltage 20 VRES, VSO Output Voltage 20 V Output Current 5 mA VZ Preregulator Output Voltage 7 V IZ Preregulator Output Current 5 mA TJ Junction Temperature -40 to +150 °C Tstg Storage Temperature Range -55 to +150 °C IRES, ISO V Note: The circuit is ESD protected according to MIL-STD-883C THERMAL DATA Symbol Description Rth j-amb Thermal Resistance Junction-ambient Max R th j-pins Thermal Resistance Junction-pins Max TJSD Minidip SO-8 SO20L Unit 100 200 50 °C/W 15 °C/W Thermal Shutdown Junction temperature °C 165 PIN CONNECTIONS VZ 1 20 SI CT 2 19 VS N.C. 3 18 N.C. VS 1 8 VOUT GND 4 17 GND SI 2 7 SO GND 5 16 GND VZ 3 6 RES GND 6 15 GND CT 4 5 GND GND 7 14 GND N.C. 8 13 N.C. N.C. 9 12 VOUT RES 10 11 SO D95AT217 MINIDIP/SO8 D95AT218 SO20 2/10 L4949E ELECTRICAL CHARACTERISTICS (VS = 14V; -40°C < Tj < 125°C unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit VO Output Voltage TJ = 25°C; IO = 1mA 4.95 5 5.05 V VO Output Voltage 6V < VIN < 28V, 1mA < IO < 50mA 4.90 5 5.10 V VO Output Voltage VIN = 40V; T < 1s 5mA < IO <100mA 4.75 5.25 V VDP Dropout Voltage IO = 10mA IO = 50mA IO = 100mA 0.25 0.4 0.5 V V V VIO Input to Output Voltage Difference in Undervoltage Condition VIN = 4V, IO = 35mA 0.4 V 0.1 0.2 0.3 Max Output Leakage VIN = 25V, VO = 5.5V 80 µA V OL Line Regulation 6V < VIN < 28V; IO = 1mA 20 mV VOLO Load Regulation 1mA < IO < 100mA 30 mV ILIM Current Limit VO = 4.5V VO = 4.5V, TJ = 25°C VO = 0V (note 1) 400 400 mA mA mA IQSE Quiescent Current IO = 0.3mA; TJ < 100°C 300 IQ Quiescent Current IO = 100mA 5 µA mA Iouth ** 20 105 120 50 200 100 200 ** With this test we guarantee that with no output current the output voltage will not exceed 5.5V RESET V RT Reset Thereshold Voltage VRTH Reset Thereshold Hysteresis VO -0.5V tRD Reset Pulse Delay C T = 100nF; TR ≥100µs V RL Reset Output Low Voltage R RES = 10KΩ to VO VS ≥ 1.5V IRH Reset Output High Leakage Current VRES = 5V V 50 100 200 mV 55 100 180 ms 0.4 V 1 µA VCTth Delay Comparator Thereshold 2 V VCTth, hy Delay Comparator Thereshold Hysteresis 100 mV SENSE Vst Sense Low Thereshold V sth Sense Thereshold Hysteresis 1.16 1.23 1.35 V 20 100 200 mV VSL Sense Output Low Voltage VSI ≤ 1.16V; VS ≥ 3V R SO = 10KΩ to VO 0.4 V ISH Sense Output Leakage VSO = 5V; VSI ≥ 1.5V 1 µA ISI Sense Input Current VSI = 0 -20 -8 -3 µA IZ = 10µA 4.5 5 6 V 10 µA PREREGULATOR VZ Preregulator Output Voltage IZ Preregulator Output Current Note 1: Foldback characteristic 3/10 L4949E APPLICATION CIRCUIT VOUT VZ (optional) VBAT VS CT PREREGULATOR 5V RES 2µ + V OUT 2V RESET REG VS SI SO 1.23V REF 1.23V SENSE GND D96AT219 For stability: CS ≥ 1µF, CO ≥ 4.7µF, ESR < 10Ω at 10KHz Recommended for application: CS = CO = 10µF to 100µF APPLICATION INFORMATION Supply Voltage Transient High supply voltage transients can cause a reset output signal disturbation. For supply voltages greater than 8V the circuit shows a high immunity of the reset output against supply transients of more than 100V/µs. For supply voltages less than 8V supply transients of more than 0.4V/µs can cause a reset signal disturbation. To improve the transient behaviour for supply voltages less than 8V a capacitor at pin 3 can be used. A capacitor at pin 3 (C3 ≤ 1µF) reduces also the output noise. FUNCTIONAL DESCRIPTION The L4949E is a monolithic integrated voltage regulator, based on the STM modular voltage regulator approch. Several outstanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. Nevertheless, it is suitable also in other applications where the present functions are required. The modular ap4/10 proach of this device allows to get easily also other features and functions when required. Voltage Regulator The voltage regulator uses an Isolated Collector Vertical PNP transistor as a regulating element. Figure 1: Foldback Characteristic of VO L4949E With this structure very low dropout voltage at currents up to 100mA is obtained. The dropout operation of the standby regulator is maintained down to 3V input supply voltage. The output voltage is regulated up to the transient input supply voltage of 40V. With this feature no functional interruption due to overvoltage pulses is generated. The typical curve showing the standby output voltage as a function of the input supply voltage is shown in Fig. 2. The current consumption of the device (quiescent current) is less than 300µA. To reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled, the quiescent current as a function of the supply input voltage is shown in Fig. 3. Figure 2: Output Voltage vs. Input Voltage Preregulator To improve the transient immunity a preregulator stabilized the internal supply voltage to 5V. This internal voltage is present at Pin 3 (VZ). This voltage should not be used as an output because the output capability is very small (≤10µA). This output may be used as an option when a better transient behaviour for supply voltages less than 8V is required (see also application note). In this case a capacitor (100nF - 1µF) must be connected between Pin 3 and GND. If this feature is not used Pin 3 must be left open. Reset Circuit The block circuit diagram of the reset circuit is shown in Fig. 4. The reset circuit supervises the output voltage. The reset thereshold of 4.5V is defined with the internal reference voltage and standby output drivider. The reset pulse delay time tRD, is defined with the charge time of an external capacitor CT: tRD = 40V Figure 3: Quiescent Current vs. Supply Voltage CT • 2V 2µA The reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor CT and is proportional to the value of CT. The reaction time of the reset circuit increases the noise immunity. Standby output voltage drops below the reset threshold only a bit longer than the reaction time results in a shorter reset delay time. The nominal reset delay time will be generated for standby output voltage drops longer than approximately 50µs. The typical reset output waveforms are shown in Fig. 5. Sense Comparator The sense comparator compares an input signal with an internal voltage reference of typical 1.23V. The use of an external voltage divider makes this comparator very flexible in the application. It can be used to supervise the input voltage either before or after the protection diode and to give additional informations to the microprocessor like low voltage warnings. 5/10 L4949E Figure 4 Figure 5 6/10 L4949E MINIDIP PACKAGE MECHANICAL DATA mm DIM. MIN A TYP inch MAX MIN 3.3 TYP MAX 0.130 a1 0.7 B 1.39 1.65 0.055 0.065 B1 0.91 1.04 0.036 0.041 b b1 0.028 0.5 0.38 0.020 0.5 0.015 0.020 C D 9.8 0.386 D1 E 8.8 0.346 e 2.54 0.100 e3 7.62 0.300 e4 F 7.1 I 0.280 4.8 L 0.189 3.3 0.130 N Z 0.44 1.6 0.017 0.063 7/10 L4949E SO8 PACKAGE MECHANICAL DATA mm DIM. MIN TYP A a1 inch MAX MIN TYP 1.75 0.1 0.25 a2 MAX 0.069 0.004 0.010 1.65 0.065 a3 0.65 0.85 0.026 0.033 b 0.35 0.48 0.014 0.019 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.020 c1 45 D 1 E 5.8 1.772 4.8 6.2 0.039 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 1 3.8 0.189 0.039 0.150 G L 8/10 0.4 1.27 0.016 0.050 M 0.6 0.024 S 8 0.315 L4949E SO20 PACKAGE MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 2.65 0.1 0.104 0.3 a2 MAX. 0.004 0.012 2.45 0.096 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 C 0.5 0.020 c1 45° (typ.) D 12.6 13.0 0.496 0.512 E 10 10.65 0.394 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.4 7.6 0.291 0.299 L 0.5 1.27 0.020 0.050 M S 0.75 0.030 8° (max.) 9/10 L4949E Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGSTHOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1997 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 10/10