LD3985 SERIES ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE REGULATORS LOW ESR CAPACITORS COMPATIBLE ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ INPUT VOLTAGE FROM 2.5V TO 6V STABLE WITH LOW ESR CERAMIC CAPACITORS ULTRA LOW DROPOUT VOLTAGE (100mV TYP. AT 150mA LOAD, 0.4mV TYP. AT 1mA LOAD) VERY LOW QUIESCENT CURRENT (85µA TYP. AT NO LOAD, 170µA TYP. AT 150mA LOAD; MAX 1.5µA IN OFF MODE) GUARANTEED OUTPUT CURRENT UP TO 150mA WIDE RANGE OF OUTPUT VOLTAGE: 1.25V; 1.35; 1.5; 1.8V; 2V; 2.1V; 2.2V; 2.4V; 2.5V; 2.6V; 2.7V; 2.8V; 2.85V; 2.9V; 3V; 3.1V; 3.2V; 3.3V; 4.7V; 5V FAST TURN-ON TIME: TYP. 200µs [CO=1µF, CBYP= 10nF AND IO=1mA] LOGIC-CONTROLLED ELECTRONIC SHUTDOWN INTERNAL CURRENT AND THERMAL LIMIT OUTPUT LOW NOISE VOLTAGE 30µVRMS OVER 10Hz to 100KHz S.V.R. OF 60dB AT 1KHz, 50dB AT 10KHz TEMPERATURE RANGE: -40°C TO 125°C DESCRIPTION The LD3985 provides up to 150mA, from 2.5V to 6V input voltage. Flip-Chip (1.57x1.22) SOT23-5L The ultra low drop-voltage, low quiescent current and low noise make it suitable for low power applications and in battery powered systems. Regulator ground current increases only slightly in dropout, further prolonging the battery life. Power supply rejection is better than 60 dB at low frequencies and starts to roll off at 10KHz. High power supply rejection is maintained down to low input voltage levels common to battery operated circuits. Shutdown Logic Control function is available, this means that when the device is used as local regulator, it is possible to put a part of the board in standby, decreasing the total power consumption. The LD3985 is designed to work with low ESR ceramic capacitors. Typical applications are in mobile phone and similar battery powered wireless systems. SCHEMATIC DIAGRAM July 2003 1/12 LD3985 SERIES ABSOLUTE MAXIMUM RATINGS Symbol Parameter VI DC Input Voltage VO DC Output Voltage Value INHIBIT Input Voltage VINH Unit -0.3 to 6 (*) V -0.3 to VI+0.3 -0.3 to VI+0.3 V IO Output Current Internally limited PD Power Dissipation Internally limited V TSTG Storage Temperature Range -65 to 150 °C TOP Operating Junction Temperature Range -40 to 125 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. (*) The input pin is able to withstand non repetitive spike of 6.5V for 200ms. THERMAL DATA Symbol Parameter Rthj-case Thermal Resistance Junction-case Rthj-amb Thermal Resistance Junction-ambient SOT23-5L Flip-Chip 81 255 Unit °C/W 170 °C/W CONNECTION DIAGRAM (top view for SOT, top through view for Flip-Chip) SOT23-5L Flip-Chip PIN DESCRIPTION Pin N° SOT23-5L Pin N° Flip-Chip Symbol 1 4 VI 2 3 2 1 GND VINH 4 5 BYPASS 5 3 VO 2/12 Name and Function Input Voltage of the LDO Common Ground Inhibit Input Voltage: ON MODE when VINH ≥ 1.2V, OFF MODE when VINH ≤ 0.4V (Do not leave floating, not internally pulled down/up) Bypass Pin: Connect an external capacitor (usually 10nF) to minimize noise voltage Output Voltage of the LDO LD3985 SERIES ORDERING CODES SOT23-5L Flip-Chip OUTPUT VOLTAGES LD3985M125R LD3985M135R LD3985M15R LD3985M18R LD3985M20R LD3985M21R LD3985M22R LD3985M24R LD3985M25R LD3985M26R LD3985M27R LD3985M28R LD3985M285R LD3985M29R LD3985M30R LD3985M31R LD3985M32R LD3985M33R LD3985M47R LD3985M48R LD3985M49R LD3985M50R LD3985J125R LD3985J135R LD3985J15R LD3985J18R LD3985J20R LD3985J21R LD3985J22R LD3985J24R LD3985J25R LD3985J26R LD3985J27R LD3985J28R LD3985J285R LD3985J29R LD3985J30R LD3985J31R LD3985J32R LD3985J33R LD3985J47R LD3985J48R LD3985J49R LD3985J50R 1.25 V 1.35 V 1.5 V 1.8 V 2.0 V 2.1 V 2.2 V 2.4 V 2.5 V 2.6 V 2.7 V 2.8 V 2.85 V 2.9 V 3.0 V 3.1 V 3.2 V 3.3 V 4.7 V 4.8 V 4.9 V 5.0 V TYPICAL APPLICATION CIRCUIT 3/12 LD3985 SERIES ELECTRICAL CHARACTERISTICS FOR LD3985 (Tj = 25°C, VI = VO(NOM) +0.5V, CI = 1µF, CBYP = 10nF, IO = 1mA, VINH = 1.4V, unless otherwise specified) Symbol Parameter VI Operating Input Voltage VO Output Voltage ∆VO ∆VO ∆VO IQ Line Regulation (Note 1) Load Regulation Test Conditions Min. 6 V -2 2 % of TJ= -40 to 125°C -3 3 VO(NOM) %/V VI = VO(NOM) + 0.5 to 6 VTJ= -40 to 125°C -0.1 0.1 VO = 4.7 to 5V -0.19 0.19 IO = 1 mA to 150mA (for Flip Chip) TJ= -40 to 125°C IO = 0 IO = 0 IO = 0 to 150mA 0.0004 0.002 0.0025 0.005 %/mA 1.5 mVPP 85 µA TJ= -40 to 125°C 150 170 TJ= -40 to 125°C 250 OFF MODE: VINH = 0.4V 0.003 1.5 TJ= -40 to 125°C Dropout Voltage (NOTE 1) IO = 1mA IO = 1mA 0.4 IO = 50mA 20 35 TJ= -40 to 125°C IO = 100mA IO = 100mA 45 70 TJ= -40 to 125°C IO = 150mA IO = 150mA mV 2 TJ= -40 to 125°C IO = 50mA ISC Unit 2.5 IO = 0 to 150mA VDROP Max. IO = 1 mA IO = 1 mA to 150mA, TJ= -40 to 125°C (for SOT23-5L) Output AC Line Regulation VI = VO(NOM) + 1 V, IO = 150mA, tR= tF = 30µs Quiescent Current ON MODE: VINH = 1.2V Typ. 60 100 TJ= -40 to 125°C Short Circuit Current RL = 0 600 mA SVR Supply Voltage Rejection VI = VO(NOM)+0.25V ± f = 1KHz VRIPPLE = 0.1V, IO= 50mA f = 10KHz VO(NOM) < 2.5V, VI = 2.55V 60 50 dB IO(PK) Peak Output Current VO ≥ VO(NOM) - 5% VINH VI = 2.5V to 6V IINH Inhibit Input Logic Low Inhibit Input Logic High Inhibit Input Current eN Output Noise Voltage BW = 10 Hz to 100 KHz tON Turn On Time (Note 4) CBYP = 10 nF Thermal Shutdown Note 5 Output Capacitor Capacitance (Note 6) ESR TSHDN CO 300 550 mA 0.4 TJ= -40 to 125°C V 1.2 VINH = 0.4V VI = 6V CO = 1 µF ±1 nA 30 µVRMS 200 µs 160 1 5 °C 22 5000 µF mΩ Note 1 – For VO(NOM) < 2V, VI = 2.5V Note 2 – For VO(NOM) = 1.25V, VI = 2.5V Note 3 – Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply for input voltages below 2.5V. Note 4 – Turn-on time is time measured between the enable input just exceeding VINH High Value and the output voltage just reaching 95% of its nominal value Note 5 – Typical thermal protection hysteresis is 20°C Note 6 - The minimum capacitor value is 1µF, anyway the LD3985 is still stable if the compensation capacitor has a 30% tolerance in all temperature range. 4/12 LD3985 SERIES TYPICAL PERFORMANCE CHARACTERISTICS (Tj = 25°C, VI = VO(NOM) +0.5V, CI = CO = 1µF, CBYP = 10nF, IO = 1mA, VINH = 1.4V, unless otherwise specified) Figure 1 : Output Voltage vs Temperature Figure 4 : Shutdown Voltage vs Temperature Figure 2 : Output Voltage vs Temperature Figure 5 : Shutdown Voltage vs Temperature Figure 3 : Output Voltage vs Temperature Figure 6 : Line Regulation vs Temperature 5/12 LD3985 SERIES Figure 7 : Line Regulation vs Temperature Figure 10 : Load Regulation vs Temperature Figure 8 : Line Regulation vs Temperature Figure 11 : Load Regulation vs Temperature Figure 9 : Load Regulation vs Temperature Figure 12 : Quiescent Current vs Temperature 6/12 LD3985 SERIES Figure 13 : Quiescent Current vs Temperature Figure 16 : Load Transient Response VI = 3.2V, IO = 1 to 150mA, Rise-Fall time = 1µsec Figure 14 : Quiescent Current vs Temperature Figure 17 : Line Transient Response VI = 3.8V to 4.4V, TJ = 25°C, IO = 150mA, CI = CO = 1µF (X7R), CBYP = 10nF, Rise-Fall time = 1µsec, VO = 2.7V Figure 15 : Supply Voltage Rejection vs Frequency Figure 18 : START-UP VI = 3.3V, IO = 1mA, CI = CO = 1µF (cer), CBYP = 10nF, Tr = 20ns, VO = 2.8V 7/12 LD3985 SERIES Figure 19 : TURN-OFF VI = 3.3V, IO = 1mA, CI = CO = 1µF (cer), CBYP = 10nF, Tf = 20ns, VO = 2.8V 8/12 LD3985 SERIES SOT23-5L MECHANICAL DATA mm. mils DIM. MIN. TYP MAX. MIN. TYP. MAX. A 0.90 1.45 35.4 57.1 A1 0.00 0.10 0.0 3.9 A2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 118.1 E 1.50 1.75 59.0 68.8 e 0.95 37.4 H 2.60 3.00 102.3 118.1 L 0.10 0.60 3.9 23.6 . 7049676C 9/12 LD3985 SERIES Flip-Chip5 MECHANICAL DATA mm. mils DIM. 10/12 MIN. TYP MAX. MIN. TYP. MAX. A 0.835 0.9 0.965 32.874 35.433 37.992 A1 0.21 0.25 0.29 8.268 9.843 11.417 A2 0.625 0.65 0.675 24.606 25.591 26.575 b 0.265 0.315 0.365 10.433 12.402 14.370 D 1.510 1.540 1.570 59.449 60.630 61.811 E 1.16 1.19 1.22 45.669 46.850 48.031 e 0.45 0.5 0.55 17.717 19.685 21.654 e1 0.816 0.866 0.916 32.126 34.094 36.063 f 0.345 13.583 f1 0.337 13.268 LD3985 SERIES Tape & Reel SOT23-xL MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. 180 13.0 7.086 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 MAX. 0.504 0.512 14.4 0.519 0.567 Ao 3.13 3.23 3.33 0.123 0.127 0.131 Bo 3.07 3.17 3.27 0.120 0.124 0.128 Ko 1.27 1.37 1.47 0.050 0.054 0.0.58 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 3.9 4.0 4.1 0.153 0.157 0.161 11/12 LD3985 SERIES Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 12/12