ETC NC7SZ125P5

Revised January 2001
NC7SZ125
TinyLogic UHS Buffer with 3-STATE Output
General Description
Features
The NC7SZ125 is a single buffer with 3-STATE output from
Fairchild’s Ultra High Speed Series of TinyLogic. The
device is fabricated with advanced CMOS technology to
achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad VCC
operating range. The device is specified to operate over
the 1.65V to 5.5V range.
■ Space saving SOT23 or SC70 5-lead package
The inputs and output are high impedance above ground
when VCC is 0V. Inputs tolerate voltages up to 6V independent of VCC operating voltage. The output tolerates voltages above VCC when in the 3-STATE condition.
■ Power down high impedance inputs/output
■ Ultra High Speed; tPD 2.6 ns Typ into 50 pF at 5V VCC
■ High Output Drive; ±24 mA at 3V VCC
■ Broad VCC Operating Range; 1.65V to 5.5V
■ Matches the performance of LCX when operated at
3.3V VCC
■ Overvoltage Tolerant inputs facilitate 5V to 3V
translation
■ Patented noise/EMI reduction circuitry implemented
Ordering Code:
Product
Package
Product Code
Number
Drawing
Top Mark
NC7SZ125M5
MA05B
7Z25
5-Lead SOT23, JEDEC MO-178, 1.6mm
NC7SZ125M5X
MA05B
7Z25
5-Lead SOT23, JEDEC MO-178, 1.6mm
3k Units on Tape and Reel
NC7SZ125P5
MAA05A
Z25
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
250 Units on Tape and Reel
NC7SZ125P5X
MAA05A
Z25
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
3k Units on Tape and Reel
Package Description
Logic Symbol
Supplied As
250 Units on Tape and Reel
Connection Diagram
IEEE/IEC
(Top View)
Pin Descriptions
Pin Names
Function Table
Description
Inputs
Output
A, OE
Inputs
OE
In A
Y
Output
L
L
L
L
H
H
H
X
Z
Out Y
H = HIGH Logic Level
L = LOW Logic Level
X = HIGH or LOW Logic Level
Z = HIGH Impedance State
TinyLogic is a trademark of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation
DS012161
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NC7SZ125 TinyLogic UHS Buffer with 3-STATE Output
October 1996
NC7SZ125
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC )
−0.5V to +6V
DC Input Voltage (VIN)
−0.5V to +6V
Supply Voltage Operating (VCC)
DC Output Voltage (VOUT)
−0.5V to +6V
Supply Voltage Data Retention (VCC)
DC Input Diode Current (IIK)
1.65V to 5.5V
Input Voltage (VIN)
@VIN < −0.5V
−50 mA
@ VIN > 6V
+20 mA
1.5V to 5.5V
0V to 5.5V
Output Voltage (VOUT)
DC Output Diode Current (IOK)
Active State
0V to VCC
3-STATE
0V to 5.5V
@VOUT < −0.5V
−50 mA
Operating Temperature (TA)
@ VOUT > 6V, VCC = GND
+20 mA
Input Rise and Fall Time (tr, tf)
−40°C to +85°C
DC Output Current (IOUT)
± 50 mA
VCC = 1.8V, 2.5V ± 0.2V
0 ns/V to 20 ns/V
DC VCC/GND Current (ICC/IGND)
± 50 mA
VCC = 3.3V ± 0.3V
0 ns/V to 10 ns/V
−65°C to +150 °C
VCC = 5.0V ± 0.5V
0 ns/V to 5 ns/V
Storage Temperature (TSTG)
150 °C
Junction Temperature under Bias (TJ)
Thermal Resistance (θJA)
Junction Lead Temperature (TL);
260 °C
(Soldering, 10 seconds)
Power Dissipation (PD) @ +85°C
SOT23-5
200 mW
SC70-5
150 mW
SOT23-5
300°C/W
SC70-5
425°C/W
Note 1: Absolute maximum ratings are DC values beyond which the device
may be damaged or have its useful life impaired. The datasheet specifications should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside datasheet specifications.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
(V)
VIH
HIGH Level Input Voltage
VOH
VOL
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
IIN
Input Leakage Current
IOZ
3-STATE
Output Leakage
IOFF
Power Off Leakage Current
ICC
Quiescent Supply Current
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Min
Typ
TA = −40°C to +85°C
Max
1.65 to 1.95 0.75 VCC
2.3 to 5.5
VIL
TA = +25°C
VCC
Min
0.75 VCC
0.7 VCC
1.65 to 1.95
0.25 VCC
0.25 VCC
2.3 to 5.5
0.3 VCC
0.3 VCC
1.55
1.65
1.55
1.8
1.7
1.8
1.7
2.3
2.2
2.3
2.2
3.0
2.9
3.0
2.9
Conditions
V
0.7 VCC
1.65
Units
Max
V
V
VIN = VIH IOH = −100 µA
4.5
4.4
4.5
4.4
1.65
1.29
1.52
1.29
IOH = −4 mA
2.3
1.9
2.15
1.9
IOH = −8 mA
3.0
2.4
2.80
2.4
3.0
2.3
2.68
2.3
4.5
3.8
4.20
3.8
V
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
1.65
0.0
0.1
0.0
1.8
0.0
0.1
0.1
2.3
0.0
0.1
0.1
3.0
0.0
0.1
0.1
V
VIN = VIL IOL = 100 µA
4.5
0.0
0.1
0.1
1.65
0.08
0.24
0.24
IOL = 4 mA
2.3
0.10
0.3
0.3
IOL = 8 mA
3.0
0.15
0.4
0.4
3.0
0.22
0.55
0.55
4.5
0.22
0.55
0.55
0 to 5.5
±1
±10
µA
1.65 to 5.5
±1
±10
µA
0.0
1
10
µA
VIN or VOUT = 5.5V
1.65 to 5.5
2.0
20
µA
VIN = 5.5V, GND
2
V
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
0 ≤ VIN ≤ 5.5V
VIN = VIH or VIL
0 ≤ VO ≤ 5.5V
Symbol
tPLH
Propagation Delay
tPHL
tPLH
Propagation Delay
tPHL
tPZL
TA = −40°C to +85°C
(V)
Min
Typ
Max
Min
Max
1.65
2.0
6.4
13.2
2.0
13.8
1.8
2.0
5.3
11.0
2.0
11.5
2.5 ± 0.2
0.8
3.4
7.5
0.8
8.0
3.3 ± 0.3
0.5
2.5
5.2
0.5
5.5
4.8
Units
Conditions
CL = 15 pF,
ns
RD = 1 MΩ,
S1 = OPEN
5.0 ± 0.5
0.5
2.1
4.5
0.5
3.3 ± 0.3
1.5
3.2
5.7
1.5
6.0
5.0 ± 0.5
0.8
2.6
5.0
0.8
5.3
1.65
2.0
8.4
15.0
2.0
15.6
1.8
2.0
7.0
12.5
2.0
13
2.5 ± 0.2
1.5
4.6
8.5
1.5
9
3.3 ± 0.3
1.5
3.5
6.2
1.5
6.5
S1 = V IN for tPZL
Output Enable Time
tPZH
tPLZ
TA = +25°C
VCC
Parameter
ns
CL = 50 pF, RD = 500Ω, Figures
1, 3
CL = 50 pF, RD = 500Ω
RU = 500Ω
ns
S1 = GND for tPZH
0.8
2.8
5.5
0.8
5.8
VIN = 2 x VCC
1.65
2.0
6.5
13.2
2.0
14.5
CL = 50 pF, RD = 500Ω
1.8
2.0
5.4
11
2.0
12
2.5 ± 0.2
1.5
3.5
8
1.5
8.5
3.3 ± 0.3
1.0
2.8
5.7
1.0
6
5.0 ± 0.5
0.5
2.1
4.7
0.5
5.0
tPHZ
CIN
Input Capacitance
0
4
COUT
Output Capacitance
0
8
CPD
Power Dissipation
3.3
17
Capacitance
5.0
24
Figures
1, 3
S1 = OPEN
5.0 ± 0.5
Output Disable Time
Fig. No.
Figures
1, 3
RU = 500Ω
ns
S1 = GND for tPHZ
S1 = V IN for tPLZ
Figures
1, 3
VIN = 2 x VCC
pF
pF
(Note 3)
Figure 2
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (C PD)(VCC)(fIN) + (ICCstatic).
AC Loading and Waveforms
CL includes load and stray capacitance
Input PRR = 1.0 MHz; tW = 500 ns
FIGURE 1. AC Test Circuit
Input = AC Waveform; tr = tf = 1.8 ns;
PRR = 10 MHz; Duty Cycle = 50%
FIGURE 2. ICCD Test Circuit
FIGURE 3. AC Waveforms
3
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NC7SZ125
AC Electrical Characteristics
NC7SZ125
Tape and Reel Specification
TAPE FORMAT
Package
Designator
Tape
Number
Cavity
Section
Cavities
Status
Status
125 (typ)
Empty
Sealed
Sealed
Leader (Start End)
M5, P5
Carrier
M5X, P5X
Cover Tape
250
Filled
Trailer (Hub End)
75 (typ)
Empty
Sealed
Leader (Start End)
125 (typ)
Empty
Sealed
3000
Filled
Sealed
75 (typ)
Empty
Sealed
Carrier
Trailer (Hub End)
TAPE DIMENSIONS inches (millimeters)
Package
SC70-5
SOT23-5
Tape Size
8 mm
8 mm
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DIM A
DIM B
0.093
0.096
(2.35)
(2.45)
0.130
0.130
(3.3)
(3.3)
DIM F
DIM Ko
0.138 ± 0.004 0.053 ± 0.004
(3.5 ± 0.10)
(1.35 ± 0.10)
0.138 ± 0.002 0.055 ± 0.004
(3.5 ± 0.05)
4
(1.4 ± 0.11)
DIM P1
DIM W
0.157
0.315 ± 0.004
(4)
(8 ± 0.1)
0.157
0.315 ± 0.012
(4)
(8 ± 0.3)
NC7SZ125
Tape and Reel Specification
(Continued)
REEL DIMENSIONS inches (millimeters)
Tape
Size
8 mm
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165
0.331 + 0.059/−0.000
0.567
W1 + 0.078/−0.039
(177.8)
(1.50)
(13.00)
(20.20)
(55.00)
(8.40 + 1.50/−0.00)
(14.40)
(W1 + 2.00/−1.00)
5
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NC7SZ125
Physical Dimensions inches (millimeters) unless otherwise noted
5-Lead SOT23, JEDEC MO-178, 1.6mm
Package Number MA05B
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6
NC7SZ125 TinyLogic UHS Buffer with 3-STATE Output
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
Package Number MAA05A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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7
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