NCP4413, NCP4414 3 A High-Speed MOSFET Drivers The NCP4413/4414 are 3 A CMOS buffer/drivers. They will not latch up under any conditions within their power and voltage ratings. They are not subject to damage when up to 5 V of noise spiking of either polarity that occurs on the ground pin. They can accept, without damage or logic upset, up to 500 mA of current of either polarity being forced back into their output. All terminals are fully protected against up to 4 kV of electrostatic discharge. As MOSFET drivers, the NCP4413/4414 can easily switch 1800 pF gate capacitance in 20 nsec with matched rise and fall times, and provide low enough impedance in both the ON and the OFF states to ensure the MOSFET’s intended state will not be affected, even by large transients. The rise and fall time edges are matched to allow driving short–duration inputs with greater output accuracy. http://onsemi.com MARKING DIAGRAM 8 SO–8 D SUFFIX CASE 751 8 1 1 8 Features • • • • • • • • • • • NCP 441x YWWXZ Latch–up Protected: Will Withstand 500 mA Reverse Current Input Will Withstand Negative Inputs Up to 5 V ESD Protected (4 kV) High Peak Output Current (3 A) Wide Operating Range (4.5 V to 16 V) High Capacitive Load Drive Capability (1800 pF in 20 nsec) Short Delay Time (35 nsec Typ) Consistent Delay Times with Changes in Supply Voltage Matched Delay Times Low Supply Current With Logic “1” Input (500 A) With Logic “0” Input (100 A) Low Output Impedance (2.7 ) m m W 8 1 1 x = Device Number (3 or 4) YY, Y = Year WW, W = Work Week X = Assembly ID Code Z = Subcontractor ID Code CO = Country of Origin ORDERING INFORMATION Device Package Shipping NCP4413DR2 Inverting SO–8 2500 Tape & Reel PDIP–8 50 Units/Rail NCP4414DR2 Non–Inverting SO–8 2500 Tape & Reel NCP4414P Non–Inverting PDIP–8 50 Units/Rail NCP4413P Inverting Functional Block Diagram VDD NCP4413 INVERTING OUTPUTS NCP441x YYWWXZ CO PDIP–8 P SUFFIX CASE 626 300 mV OUTPUT NONINVERTING OUTPUTS INPUT 4.7 V NCP4414 GND EFFECTIVE INPUT C = 10 pF Semiconductor Components Industries, LLC, 2000 June, 2000 – Rev. 0 Powered by ICminer.com Electronic-Library Service CopyRight 2003 1 Publication Order Number: NCP4413/D NCP4413, NCP4414 PIN CONNECTIONS 8–Pin SOIC/PDIP–8 VDD 1 IN 2 NC 3 GND 4 NCP4413 8 VDD 7 OUT 6 OUT 5 GND 8–Pin SOIC/PDIP–8 2 VDD 1 6, 7 INVERTING IN 2 NC 3 GND 4 (Top View) (Top View) NC = NO INTERNAL CONNECTION http://onsemi.com 2 Powered by ICminer.com Electronic-Library Service CopyRight 2003 NCP4414 8 VDD 7 OUT 6 OUT 5 GND 2 6, 7 NONINVERTING NCP4413, NCP4414 ABSOLUTE MAXIMUM RATINGS* Symbol Value Unit Supply Voltage Rating VDD +20 V Input Voltage, IN A or IN B VIN VDD + 0.3 to GND – 5.0 V +150 °C Maximum Chip Temperature Storage Temperature Range Tstg –65 to +150 °C Lead Temperature (Soldering, 10 sec) TSOI +300 °C Package Thermal Resistance SOIC SOIC RθJA RθJC 155 45 Operating Temperature Range TA –40 to +85 °C Power Dissipation (TA SOIC PD 470 mW °C/W v 70°C) *Static–sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation section of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Over operating temperature range with 4.5 V v v VDD 16 V, unless otherwise specified. Typical values are measured at TA = 25°C; VDD = 16 V.) Characteristic Symbol Test Conditions Min Typ Logic 1 High Input Voltage VIH – 2.0 Logic 0 Low Input Voltage VIL – – Input Current IIN Max Unit – – V – 0.8 V –1.0 –10 – – 1.0 10 Input 0V v VIN v VDD TA = 25°C – 40°C TA v v 85°C mA Output High Output Voltage VOH DC Test VDD – 0.025 – – V Low Output Voltage VOL DC Test – – 0.025 v Output Resistance RO – – 2.7 3.3 4.0 5.0 Peak Output Current IPK VDD = 16 V – 3.0 – A IREV Duty Cycle 2% t 300 sec 0.5 – – A Rise Time tR Figure 1 TA = 25°C – 40°C TA – – 20 24 28 33 nsec Fall Time tF Figure 1 TA = 25°C – 40°C TA – – 20 24 28 33 nsec Delay Time tD1 Figure 1 TA = 25°C – 40°C TA – – 35 40 45 50 nsec Delay Time tD2 Figure 1 TA = 25°C – 40°C TA – – 35 40 45 50 nsec IS VIN = 3 V VIN = 0 V – – 0.5 0.1 1.0 0.15 mA Latch–Up Protection Withstand Reverse Current VDD = 16 V, IO = 10 mA TA = 25°C – 40°C TA v v 85°C v v m VDD = 16 V W Switching Time (Note 1.) v v 85°C v v 85°C v v 85°C v v 85°C Power Supply Power Supply Current VDD = 16 V 1. Switching times are guaranteed by design. http://onsemi.com 3 Powered by ICminer.com Electronic-Library Service CopyRight 2003 NCP4413, NCP4414 +5 V INPUT VDD = 16 V 0V 4.7 µF 0.1 µF 10% V DD 1, 8 tD1 tD2 tF tR 90% 90% OUTPUT 2 INPUT 90% 6, 7 10% 0V OUTPUT 10% Inverting Driver NCP4413 CL = 1800 pF NCP4413 NCP4414 +5 V 90% INPUT 4, 5 0V 10% V DD INPUT: 100 kHz, square wave, tRISE = tFALL≤10 nsec 90% tD1 OUTPUT 10% 0V tR 90% tD2 tF 10% Noninverting driver NCP4414 Figure 1. Switching Time Test Circuit 1600 MAX. POWER (mV) 1400 1200 1000 800 8 Pin SOIC 600 400 200 0 0 10 20 30 40 50 60 70 AMBIENT TEMOERATURE (°C) Figure 2. Thermal Derating Curves http://onsemi.com 4 Powered by ICminer.com Electronic-Library Service CopyRight 2003 80 90 100 110 120 NCP4413, NCP4414 TYPICAL CHARACTERISTICS 500 500 400 400 VIN = 3 V I SUPPLY (m A) I SUPPLY (m A) VIN = 3 V 300 200 100 0 6 8 10 12 VDD (VOLTS) 14 200 VIN = 0 V 100 VIN = 0 V 4 300 0 –40 16 60 80 1.6 1.5 VTHRESHOLD,(VOLTS) VTHRESHOLD,(VOLTS) 1.6 VIH 1.4 1.3 VIL 1.2 1.1 4 6 8 10 12 VDD (VOLTS) 14 1.5 VIH 1.4 1.3 VIL 1.2 1.1 –40 16 9 8 8 7 7 R ds, (ON) W 9 6 TA = 85°C 5 –20 0 20 40 TEMPERATURE (°C) 60 80 Figure 6. Input Threshold vs. Temperature VSUPPLY = 16 V Figure 5. Input Threshold vs. Supply Voltage TA = 25°C R ds, (ON) W 0 20 40 TEMPERATURE (°C) Figure 4. Quiescent Supply Current vs. Temperature VSUPPLY = 16 V Figure 3. Quiescent Supply Current vs. Supply Voltage TA = 25°C TA = 25°C 4 3 6 TA = 85°C 5 TA = 25°C 4 3 2 1 –20 2 TA = – 40°C 4 6 8 10 12 14 1 16 TA = – 40°C 4 VDD (VOLTS) 8 10 12 14 VDD (VOLTS) Figure 7. High–State Output Resistance Figure 8. Low–State Output Resistance http://onsemi.com 5 Powered by ICminer.com Electronic-Library Service CopyRight 2003 6 16 NCP4413, NCP4414 70 70 60 60 50 50 T FALL,(nsec) TRISE,(nsec) TYPICAL CHARACTERISTICS TA = 85°C 40 30 TA = 25°C 20 TA = 85°C 40 30 TA = 25°C 20 TA = – 40°C TA = – 40°C 10 10 4 6 8 10 12 VDD (VOLTS) 14 4 16 Figure 9. Rise Time vs. Supply Voltage CLOAD = 1800 pF 100 90 90 80 80 T D2, (nsec) 100 T D1,(nsec) 110 TA = 85°C 60 TA = 25°C 70 50 40 40 16 TA = 25°C TA = – 40°C 20 4 6 8 10 12 VDD (VOLTS) 14 4 16 6 8 10 12 VDD (VOLTS) 14 16 Figure 12. TD2 Propagation Delay vs. Supply Voltage CLOAD = 1800 pF Figure 11. TD1 Propagation Delay vs. Supply Voltage CLOAD = 1800 pF 35 40 PROPAGATION DELAYS (nsec) TRISE T RISE,T FALL, (nsec) 14 TA = 85°C 30 TA = – 40°C 20 TFALL 30 20 10 0 10 12 VDD (VOLTS) 60 50 30 8 Figure 10. Fall Time vs. Supply Voltage CLOAD = 1800 pF 110 70 6 0 1000 3000 2000 CLOAD (pF) 4000 33 TD1 32 31 30 29 28 5000 TD2 34 0 2000 3000 CLOAD (pF) 4000 Figure 14. Propagation Delays vs. Capacitive Load TA = 25°C, VDD = 16 V Figure 13. Rise and Fall Times vs. Capacitive Load TA = 25°C, VDD = 16 V http://onsemi.com 6 Powered by ICminer.com Electronic-Library Service CopyRight 2003 1000 5000 NCP4413, NCP4414 PACKAGE DIMENSIONS PDIP–8 P SUFFIX CASE 626–05 ISSUE K 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 –B– 1 MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC ––– 10_ 0.76 1.01 4 DIM A B C D F G H J K L M N F –A– NOTE 2 L C J –T– INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC ––– 10_ 0.030 0.040 N SEATING PLANE D M K G H 0.13 (0.005) M T A M B M SO–8 D SUFFIX CASE 751–06 ISSUE T D A 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 5 0.25 H E M B M 1 4 h B e X 45 _ q A C SEATING PLANE L 0.10 A1 B 0.25 M C B S A S q http://onsemi.com 7 Powered by ICminer.com Electronic-Library Service CopyRight 2003 DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ NCP4413, NCP4414 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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