ETC NLAS44599/D

NLAS44599
Low Voltage Single Supply
Dual DPDT Analog Switch
The NLAS44599 is an advanced dual–independent CMOS double
pole–double throw (DPDT) analog switch fabricated with silicon
gate CMOS technology. It achieves high speed propagation delays
and low ON resistances while maintaining CMOS low power
dissipation. This DPDT controls analog and digital voltages that may
vary across the full power–supply range (from VCC to GND).
The device has been designed so the ON resistance (RON) is much
lower and more linear over input voltage than R ON of typical CMOS
analog switches.
The channel select input is compatible with standard CMOS outputs.
The channel select input structure provides protection when
voltages between 0 V and 5.5 V are applied, regardless of the supply
voltage. This input structure helps prevent device destruction caused
by supply voltage – input/output voltage mismatch, battery backup,
hot insertion, etc.
The NLAS44599 can also be used as a quad 2–to–1
multiplexer–demultiplexer analog switch with two Select pins that each
controls two multiplexer–demultiplexers.
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MARKING
DIAGRAMS
1
16
16
C
1
ALYW
QFN–16
MN SUFFIX
CASE 485G
16
Channel Select Input Over–Voltage Tolerant to 5.5 V
16
Fast Switching and Propagation Speeds
NLAS
44599
AWLYWW
1
Break–Before–Make Circuitry
TSSOP–16
DT SUFFIX
CASE 948F
Low Power Dissipation: ICC = 2 A (Max) at TA = 25C
9
1
8
Diode Protection Provided on Channel Select Input
Improved Linearity and Lower ON Resistance over Input Voltage
Latch–up Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; MM > 200 V
A
L, WL
Y
W, WW
Chip Complexity: 158 FETs
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
 Semiconductor Components Industries, LLC, 2001
May, 2001 – Rev. 2
1
Publication Order Number:
NLAS44599/D
NLAS44599
COM A
NO A0
VCC
NC D1
14
13
FUNCTION TABLE
COM D
NO D0
10
SCD
9
1
15
11
SAB
16
12
NC A1
2
QFN–16 PACKAGE
NC C1
Select XY
ON Channel
L
H
NC X1
NO X0
0/1
2/3
3
U
X1
0
U
1
U
NC B1
GND
NO C0
COM C
4
COM A
2
15
NC D1
SELECT CD
COM C
0/1
2
3
14
COM D
SELECT AB
4
13
NO D0
NO B0
5
12
SELECT CD
COM B
6
11
NC C1
NC B1
7
10
COM C
GND
8
9
NO C0
Figure 1. Logic Diagrams
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2
COM D
U
NC A1
2/3
3
U
VCC
U
16
U
1
U
NO A0
1
2
TSSOP–16 PACKAGE
COM B
0
U
U
COM A
X1
U
SELECT AB
U
5
6
7
COM B
8
NO B0
3
See TSSOP–16
Switch Configuration
Figure 2. IEC Logic Symbol
NO A0
NC A1
NO B0
NC B1
NO C0
NC C1
NO D0
NC D1
NLAS44599
MAXIMUM RATINGS
Symbol
Parameter
VCC
Positive DC Supply Voltage
VIS
Analog Input Voltage (VNO or VCOM)
VIN
Digital Select Input Voltage
IIK
DC Current, Into or Out of Any Pin
PD
Power Dissipation in Still Air
TSTG
Storage Temperature Range
TL
Value
Unit
0.5 to 7.0
V
0.5 VIS VCC 0.5
0.5 VI 7.0
V
50
mA
450
mW
65 to 150
C
Lead Temperature, 1 mm from Case for 10 Seconds
260
C
TJ
Junction Temperature Under Bias
150
C
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ESD Withstand Voltage
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
2000
200
1000
V
ILatch–Up
Latch–Up Performance
Above VCC and Below GND at 125C (Note 4)
300
mA
JA
Thermal Resistance
164
C/W
TSSOP–16
Level 1
Oxygen Index: 30% – 35%
UL–94–VO (0.125 in)
TSSOP–16
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
1. Tested to EIA/JESD22–A114–A.
2. Tested to EIA/JESD22–A115–A.
3. Tested to JESD22–C101–A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
2.0
5.5
V
VCC
DC Supply Voltage
VIN
Digital Select Input Voltage
GND
5.5
V
VIS
Analog Input Voltage (NC, NO, COM)
GND
VCC
V
TA
Operating Temperature Range
55
125
C
tr, tf
Input Rise or Fall Time, SELECT
0
0
100
20
ns/V
VCC = 3.3 V 0.3 V
VCC = 5.0 V 0.5 V
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80C
117.8
TJ = 90C
1,032,200
TJ = 100C
80
TJ = 110C
Time, Years
TJ = 120C
Time, Hours
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130C
Junction
Temperature °C
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
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3
NLAS44599
DC CHARACTERISTICS – Digital Section (Voltages Referenced to GND)
Guaranteed Limit
Symbol
VIH
VIL
Parameter
Condition
Minimum High–Level Input
Voltage, Select Inputs
Maximum Low–Level Input
Voltage, Select Inputs
IIN
Maximum Input Leakage
Current, Select Inputs
VIN = 5.5 V or GND
ICC
Maximum Quiescent Supply
Current
Select and VIS = VCC or GND
VCC
55C to 25C
85C
125C
Unit
2.0
1.5
1.5
1.5
V
2.5
1.9
1.9
1.9
3.0
2.1
2.1
2.1
4.5
3.15
3.15
3.15
5.5
3.85
3.85
3.85
2.0
0.5
0.5
0.5
2.5
0.6
0.6
0.6
V
3.0
0.9
0.9
0.9
4.5
1.35
1.35
1.35
5.5
1.65
1.65
1.65
0 V to 5.5 V
0.2
2.0
2.0
A
5.5
4.0
4.0
8.0
A
DC ELECTRICAL CHARACTERISTICS – Analog Section
Guaranteed Limit
Symbol
RON
Parameter
Maximum “ON” Resistance
(Figures 17 – 23)
Condition
VIN = VIL or VIH
VIS = GND to VCC
IINI 10.0 mA
VCC
55C to 25C
85C
125C
Unit
2.5
85
95
105
3.0
45
50
55
4.5
30
35
40
5.5
25
30
35
RFLAT (ON)
ON Resistance Flatness
(Figures 17 – 23)
VIN = VIL or VIH
IINI 10.0 mA
VIS = 1 V, 2 V, 3.5 V
4.5
4
4
5
INC(OFF)
INO(OFF)
NO or NC Off Leakage
Current (Figure 9)
VIN = VIL or VIH
VNO or VNC = 1.0 VCOM 4.5 V
5.5
1
10
100
nA
ICOM(ON)
COM ON Leakage Current
(Figure 9)
VIN = VIL or VIH
VNO 1.0 V or 4.5 V with VNC floating or
VNO 1.0 V or 4.5 V with VNO floating
VCOM = 1.0 V or 4.5 V
5.5
1
10
100
nA
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4
NLAS44599
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Guaranteed Maximum Limit
Symbol
tON
tOFF
tBBM
Parameter
Turn–On Time
(Figures 12 and 13)
Turn–Off Time
(Figures 12 and 13)
Minimum Break–Before–Make
Time
55C to 25C
85C
125C
VCC
VIS
Test Conditions
(V)
(V)
Min
Typ*
Max
Min
Max
Min
Max
Unit
RL = 300 CL = 35 pF
(Figures 5 and 6)
2.5
2.0
5
23
35
5
38
5
41
ns
3.0
2.0
5
16
24
5
27
5
30
4.5
3.0
2
11
16
2
19
2
22
5.5
3.0
2
9
14
2
17
2
20
2.5
2.0
1
7
12
1
15
1
18
3.0
2.0
1
5
10
1
13
1
16
4.5
3.0
1
4
6
1
9
1
12
5.5
3.0
1
3
5
1
8
1
11
2.5
2.0
1
12
1
1
3.0
2.0
1
11
1
1
4.5
3.0
1
6
1
1
5.5
3.0
1
5
1
1
RL = 300 CL = 35 pF
(Figures 5 and 6)
VIS = 3.0 V (Figure 4)
RL = 300 CL = 35 pF
ns
ns
*Typical Characteristics are at 25C.
Typical @ 25, VCC = 5.0 V
CIN
CNO or CNC
CCOM
C(ON)
Maximum Input Capacitance, Select Input
Analog I/O (switch off)
Common I/O (switch off)
Feedthrough (switch on)
8
pF
10
10
20
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Symbol
BW
VONL
VISO
Q
THD
VCT
Parameter
Condition
VCC
Typical
V
25°C
Unit
MHz
Maximum On–Channel –3dB
Bandwidth or Minimum Frequency
Response (Figure 11)
VIN = 0 dBm
VIN centered between VCC and GND
(Figure 7)
3.0
145
4.5
170
5.5
175
Maximum Feedthrough On Loss
VIN = 0 dBm @ 100 kHz to 50 MHz
VIN centered between VCC and GND
(Figure 7)
3.0
2
4.5
2
5.5
2
f = 100 kHz; VIS = 1 V RMS
VIN centered between VCC and GND
(Figure 7)
3.0
93
4.5
93
5.5
93
3.0
1.5
5.5
3.0
5.5
0.1
5.5
90
3.0
90
Off–Channel Isolation (Figure 10)
Charge Injection Select Input to
Common I/O (Figure 15)
VIN = VCC to GND, FIS = 20 kHz
tr = tf = 3 ns
RIS = 0 , CL = 1000 pF
Q = CL * VOUT
(Figure 8)
Total Harmonic Distortion THD +
Noise (Figure 14)
FIS = 20 Hz to 100 kHz, RL = Rgen = 600 , CL = 50 pF
VIS = 5.0 VPP sine wave
Channel–to–Channel Crosstalk
f = 100 kHz; VIS = 1 V RMS
VIN centered between VCC and GND
(Figure 7)
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5
dB
dB
pC
%
dB
NLAS44599
VCC
DUT
VCC
Input
Output
GND
VOUT
0.1 F
300 Ω
tBMM
35 pF
90%
90% of VOH
Output
Switch Select Pin
GND
Figure 4. tBBM (Time Break–Before–Make)
VCC
Input
DUT
VCC
0.1 F
50%
Output
VOUT
Open
50%
0V
300 Ω
VOH
90%
35 pF
90%
Output
VOL
Input
tON
tOFF
Figure 5. tON/tOFF
VCC
VCC
Input
DUT
Output
300 Ω
50%
VOUT
Open
50%
0V
VOH
35 pF
Output
10%
VOL
Input
tOFF
Figure 6. tON/tOFF
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6
10%
tON
NLAS44599
50 Ω
DUT
Reference
Transmitted
Input
Output
50 Ω Generator
50 Ω
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction.
VVOUT
for VIN at 100 kHz
IN
VOUT
for VIN at 100 kHz to 50 MHz
VONL = On Channel Loss = 20 Log VIN
VISO = Off Channel Isolation = 20 Log
Bandwidth (BW) = the frequency 3 dB below VONL
VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 Figure 7. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
VCC
VIN
Output
Open
GND
CL
Output
Off
On
VIN
Figure 8. Charge Injection: (Q)
100
LEAKAGE (nA)
10
1
ICOM(ON)
0.1
ICOM(OFF)
0.01
VCC = 5.0 V
INO(OFF)
0.001
–55
–20
25
70
85
TEMPERATURE (°C)
Figure 9. Switch Leakage vs. Temperature
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7
125
Off
∆VOUT
NLAS44599
+15
0
1.0
2.0
–20
+10
Bandwidth
(ON–RESPONSE)
+5
3.0
0
PHASE SHIFT
4.0
–40
(dB)
(dB)
Off Isolation
–60
VCC = 5.0 V
TA = 25C
–80
–100
0.01
0.1
–10
6.0
–15
7.0
–20
8.0
–25
9.0
10.0
0.01
100 200
1
10
FREQUENCY (MHz)
–5
5.0
PHASE (°)
0
VCC = 5.0 V
TA = 25°C
–30
0.1
1
–35
100 300
10
FREQUENCY (MHz)
Figure 10. Off–Channel Isolation
Figure 11. Typical Bandwidth and Phase Shift
30
30
25
25
20
20
TIME (ns)
TIME (ns)
VCC = 4.5 V
15
tON (ns)
10
tOFF (ns)
5
0
2.5
3
3.5
4
4.5
10
tON
5
tOFF
0
–55
5
–40
25
85
125
VCC (VOLTS)
Temperature (°C)
Figure 12. tON and tOFF vs. VCC at 25C
Figure 13. tON and tOFF vs. Temp
1
3.0
VINpp = 3.0 V
VCC = 3.6 V
2.5
2.0
Q (pC)
THD + NOISE (%)
15
0.1
VINpp = 5.0 V
VCC = 5.5 V
VCC = 5 V
1.5
1.0
0.5
VCC = 3 V
0
–0.5
0.01
1
10
100
0
1
2
3
4
FREQUENCY (kHz)
VCOM (V)
Figure 14. Total Harmonic Distortion
Plus Noise vs. Frequency
Figure 15. Charge Injection vs. COM Voltage
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8
5
NLAS44599
100
100
VCC = 2.0 V
10
80
RON (Ω)
1
ICC (nA)
0.1
0.01
60
VCC = 2.5 V
40
VCC = 3.0 V
0.001
VCC = 3.0 V
VCC = 4.0 V
20
0.0001
VCC = 5.0 V
0.00001
–40
–20
0
20
60
VCC = 5.5 V
80
100
0
0.0
120
3.0
4.0
5.0
VIS (VDC)
Figure 16. ICC vs. Temp, VCC = 3 V & 5 V
Figure 17. RON vs. VCC, Temp = 25C
90
90
80
80
70
70
60
60
RON (Ω)
100
RON (Ω)
2.0
Temperature (°C)
100
50
40
125°C
30
40
25°C
–55°C
10
85°C
0.5
50
20
–55°C
10
6.0
30
25°C
20
0
0.0
1.0
1.0
1.5
2.0
0
0.0
2.5
85°C
125°C
0.5
1.0
1.5
VIS (VDC)
2.0
2.5
3.0
VIS (VDC)
Figure 18. RON vs Temp, VCC = 2.0 V
Figure 19. RON vs. Temp, VCC = 2.5 V
30
50
45
25
40
20
30
RON (Ω)
RON (Ω)
35
25
20
125°C
10
15
0
0.0
25°C
85°C
10
5
15
5
25°C
85°C
125°C
–55°C
–55°C
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VIS (VDC)
VIS (VDC)
Figure 21. RON vs. Temp, VCC = 4.5 V
Figure 20. RON vs. Temp, VCC = 3.0 V
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9
4.5
NLAS44599
25
25
125°C
20
20
RON (Ω)
RON (Ω)
125°C
15
25°C
10
–55°C
85°C
25°C
10
–55°C
85°C
5
0
0.0
15
5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
5.0
VIS (VDC)
VIS (VDC)
Figure 22. RON vs. Temp, VCC = 5.0 V
Figure 23. RON vs. Temp, VCC = 5.5 V
DEVICE ORDERING INFORMATION
Device Nomenclature
Device Order
Number
Circuit
Indicator
Technology
Device
Function
Package
Suffix
Tape & Reel
Suffix
Package Type
Tape & Reel Size
NLAS44599MNR2
NL
AS
44599
MN
R2
QFN
7–inch/2500 Unit
NLAS44599DTR2
NL
AS
44599
DT
R2
TSSOP
13–inch/2500 Unit
PIN1/PRODUCT ORIENTATION CARRIER TAPE
USER DIRECTION OF FEED
Figure 24.
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10
NLAS44599
PACKAGE DIMENSIONS
QFN–16
MN SUFFIX
CASE 485G–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
–X–
A
M
–Y–
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
B
N
0.25 (0.010) T
0.25 (0.010) T
J
R
C
0.08 (0.003) T
–T–
K
SEATING
PLANE
E
H
G
L
5
8
4
9
F
12
1
16
13
P
D NOTE 3
0.10 (0.004) M T X Y
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11
MILLIMETERS
MIN
MAX
3.00 BSC
3.00 BSC
0.80
1.00
0.23
0.28
1.75
1.85
1.75
1.85
0.50 BSC
0.875
0.925
0.20 REF
0.00
0.05
0.35
0.45
1.50 BSC
1.50 BSC
0.875
0.925
0.60
0.80
INCHES
MIN
MAX
0.118 BSC
0.118 BSC
0.031
0.039
0.009
0.011
0.069
0.073
0.069
0.073
0.020 BSC
0.034
0.036
0.008 REF
0.000
0.002
0.014
0.018
0.059 BSC
0.059 BSC
0.034
0.036
0.024
0.031
NLAS44599
PACKAGE DIMENSIONS
TSSOP–16
DT SUFFIX
CASE 948F–01
ISSUE O
16X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
K
ÎÎÎ
ÏÏ
ÎÎÎ
ÏÏ
K1
2X
L/2
16
9
J1
B
–U–
L
SECTION N–N
J
PIN 1
IDENT.
8
1
N
0.15 (0.006) T U
S
0.25 (0.010)
A
–V–
M
N
F
DETAIL E
–W–
C
0.10 (0.004)
–T– SEATING
PLANE
H
D
DETAIL E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT
DATUM PLANE -W-.
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
--1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0
8
INCHES
MIN
MAX
0.193
0.200
0.169
0.177
--0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.007
0.011
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0
8
G
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: [email protected]
Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
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German Phone: (+1) 303–308–7140 (Mon–Fri 2:30pm to 7:00pm CET)
Email: ONlit–[email protected]
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Toll–Free from Mexico: Dial 01–800–288–2872 for Access –
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Toll Free from Hong Kong & Singapore:
001–800–4422–3781
Email: ONlit–[email protected]
JAPAN: ON Semiconductor, Japan Customer Focus Center
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Phone: 81–3–5740–2700
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ON Semiconductor Website: http://onsemi.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
*Available from Germany, France, Italy, UK, Ireland
For additional information, please contact your local
Sales Representative.
http://onsemi.com
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