ETC NTQD6866/D

NTQD6866
Product Preview
Power MOSFET
5.8 Amps, 20 Volts
N–Channel TSSOP–8
Features
•
•
•
•
•
•
•
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New Low Profile TSSOP–8 Package
Ultra Low RDS(on)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
IDSS and VDS(on) Specified at Elevated Temperatures
5.8 AMPERES
20 VOLTS
RDS(on) = 30 mΩ
N–Channel
Applications
• Power Management in Portable and Battery–Powered Products, i.e.:
•
•
Computers, Printers, PCMCIA Cards, Cellular and Cordless
Telephones
Lithium Ion Battery Applications
Note Book PC
Drain–to–Source Voltage
Gate–to–Source Voltage – Continuous
Drain Current – Continuous
Drain Current – Continuous @ 70°C
Drain Current – Single Pulse (tp ≤ 10 s)
Total Power Dissipation
Operating and Storage
Temperature Range
Single Pulse Drain–to–Source Avalanche
Energy – Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 5 Vdc,
IL = 10 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance –
Junction–to–Ambient (Note 1.)
Single Channel
Steady State
Both Channels
Junction–to–Ambient (Note 2.)
Both Channels
Thermal Resistance – Junction–to–Lead
Single Channel
Both Channels
Steady State
Symbol
Value
Unit
VDSS
VGS
20
Vdc
12
Vdc
ID
ID
IDM
PD
5.8
TBD
20
Adc
1.6
W
TJ, Tstg
–55 to
+150
°C
EAS
580
mJ
°C/W
RJA
D
G1
G2
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
180
176
N–Channel
D
S1
S2
TSSOP–8
CASE 948S
PLASTIC
8
1
MARKING DIAGRAM
& PIN ASSIGNMENT
1
S1
G1
S2
2
3
G2
4
DEVICE
MARKING
TBD
8
7
6
5
D
D
D
D
Top View
100
RJL
°C/W
27
24
ORDERING INFORMATION
1. Surface Mounted to Min Pad.
2. Surface Mounted to 1″ x 1″ FR4 Board.
Device
Package
Shipping
NTQD6866
TSSOP–8
100 Units/Rail
NTQD6866R2
TSSOP–8
3000/Tape & Reel
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
 Semiconductor Components Industries, LLC, 2001
January, 2001 – Rev. 1
1
Publication Order Number:
NTQD6866/D
NTQD6866
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
Unit
20
–
–
TBD
–
–
–
–
–
–
1.0
25
–
–
–
–
100
100
0.6
–
0.9
TBD
1.2
–
–
–
–
TBD
0.026
0.031
TBD
0.030
0.040
gFS
TBD
17
–
Mhos
Ciss
–
930
TBD
pF
Coss
–
370
TBD
Crss
–
105
TBD
td(on)
–
8.6
TBD
tr
–
14
TBD
td(off)
–
57
TBD
tf
–
54
TBD
QT
–
11
15
Q1
–
2.4
–
Q2
–
2.4
–
VSD
–
–
0.7
TBD
1.0
–
Vdc
trr
–
30
–
ns
ta
–
14.5
–
tb
–
15.5
–
QRR
–
0.01
–
OFF CHARACTERISTICS
V(BR)DSS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 mAdc)
Temperature Coefficient (Positive)
Zero Gate Voltage Collector Current
(VDS = 20 Vdc, VGS = 0 Vdc)
(VDS = 20 Vdc, VGS = 0 Vdc, TJ = 85°C)
Vdc
µAdc
IDSS
Gate–Body Leakage Current
(VGS = ±12 Vdc, VDS = 0 Vdc)
IGSS(f)
IGSS(r)
mV/°C
nAdc
ON CHARACTERISTICS (Note 3.)
Gate Threshold Voltage
(VDS = VGS, ID = 0.25 mA)
Temperature Coefficient (Negative)
VGS(th)
Static Drain–to–Source On–State Resistance
(VGS = 4.5 Vdc, ID = 7.0 Adc)
(VGS = 4.0 Vdc, ID = 7.0 Adc)
(VGS = 2.5 Vdc, ID = 3.5 Adc)
RDS(on)
Forward Transconductance (VDS = 10 Vdc, ID = 7.0 Adc)
Vdc
mV/°C
Ω
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = 10 Vd
Vdc, VGS = 0 Vdc,
Vd
f = 1.0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 4.)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
(VDD = 10 Vdc, ID = 1.0 Adc,
VGS = 4.5
4 5 Vdc,
Vdc
RL = 10, RG = 6.0 Ω)
Fall Time
Gate Charge
(VDS = 10 Vdc,
VGS = 4.5 Vdc,
ID = 5.8
5 8 Adc)
Ad )
ns
nC
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (Note 3.)
(IS = 1.8 Adc, VGS = 0 Vdc)
(IS = 1.8 Adc, VGS = 0 Vdc, TJ = 85°C)
Reverse Recovery Time
(IS = 1.5
1 5 Adc,
Ad VGS = 0 Vdc,
Vd
dIS/dt = 100 A/µs)
Reverse Recovery Stored Charge
3. Pulse Test: Pulse Width = 300 µs, Duty Cycle = 2%.
4. Switching characteristics are independent of operating junction temperature.
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2
µC
NTQD6866
PACKAGE DIMENSIONS
TSSOP–8
CASE 948S–01
PLASTIC
ISSUE O
8x
0.20 (0.008) T U
K REF
0.10 (0.004)
S
2X
L/2
8
B
–U–
1
V
S
J J1
4
PIN 1
IDENT
S
T U
5
L
0.20 (0.008) T U
M
ÇÇÇ
ÉÉÉÉ
ÉÉÉÉ
ÇÇÇ
K1
K
A
–V–
SECTION N–N
–W–
C
0.076 (0.003)
–T–
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
S
D
DETAIL E
G
P
0.25 (0.010)
N
M
N
P1
F
DETAIL E
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3
DIM
A
B
C
D
F
G
J
J1
K
K1
L
M
P
P1
MILLIMETERS
MIN
MAX
2.90
3.10
4.30
4.50
--1.10
0.05
0.15
0.50
0.70
0.65 BSC
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0
8
--2.20
--3.20
INCHES
MIN
MAX
0.114
0.122
0.169
0.177
--0.043
0.002
0.006
0.020
0.028
0.026 BSC
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0
8
--0.087
--0.126
NTQD6866
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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For additional information, please contact your local
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NTQD6866/D