ETC BAT54T1/D

BAT54T1
Preferred Device
Schottky Barrier Diodes
These Schottky barrier diodes are designed for high speed switching
applications, circuit protection, and voltage clamping. Extremely low
forward voltage reduces conduction loss. Miniature surface mount
package is excellent for hand held and portable applications where
space is limited.
• Extremely Fast Switching Speed
• Low Forward Voltage – 0.35 Volts (Typ) @ IF = 10 mAdc
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30 VOLT
SCHOTTKY BARRIER
DETECTOR AND SWITCHING
DIODES
1
CATHODE
2
ANODE
MARKING
DIAGRAM
2
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BU
1
1
SOD–123
CASE 425
STYLE 1
MAXIMUM RATINGS (TJ = 125°C unless otherwise noted)
Rating
Symbol
Value
Unit
Reverse Voltage
VR
30
Volts
Forward Power Dissipation, FR–5 Board
(Note 1.)
@ TA = 25°C
Derate above 25°C
PF
mW
mW/°C
Thermal Resistance, Junction to Case
RθJL
174
°C/W
Thermal Resistance, Junction to Ambient
RθJA
492
°C/W
Forward Current (DC)
ORDERING INFORMATION
Device
400
3.2
IF
200 Max
mA
Non–Repetitive Peak Forward Current
tp < 10 msec
IFSM
600
mA
Repetitive Peak Forward Current
Pulse Wave = 1 sec, Duty Cycle = 66%
IFRM
300
mA
Junction Temperature
TJ
125 Max
°C
Storage Temperature Range
Tstg
–55 to +150
°C
2
BAT54T1
Package
Shipping
SOD–123
3000/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
1. FR-5 = 1.0 x 0.75 x 0.062 in.
 Semiconductor Components Industries, LLC, 2000
November, 2000 – Rev. 6
Publication Order Number:
BAT54T1/D
BAT54T1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
V(BR)R
30
–
–
Volts
Total Capacitance (VR = 1.0 V, f = 1.0 MHz)
CT
–
7.6
10
pF
Reverse Leakage (VR = 25 V)
IR
–
0.5
2.0
µAdc
Forward Voltage (IF = 0.1 mAdc)
VF
–
0.22
0.24
Vdc
Forward Voltage (IF = 30 mAdc)
VF
–
0.41
0.5
Vdc
Forward Voltage (IF = 100 mAdc)
VF
–
0.52
0.8
Vdc
Reverse Recovery Time
(IF = IR = 10 mAdc, IR(REC) = 1.0 mAdc, Figure 1)
trr
–
–
5.0
ns
Forward Voltage (IF = 1.0 mAdc)
VF
–
0.29
0.32
Vdc
Forward Voltage (IF = 10 mAdc)
VF
–
0.35
0.40
Vdc
Forward Current (DC)
IF
–
–
200
mAdc
Repetitive Peak Forward Current
IFRM
–
–
300
mAdc
Non–Repetitive Peak Forward Current (t < 1.0 s)
IFSM
–
–
600
mAdc
Reverse Breakdown Voltage (IR = 10 µA)
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2
BAT54T1
820 Ω
+10 V
2k
100 µH
0.1 µF
IF
tr
tp
IF
t
10%
0.1 µF
trr
t
DUT
50 Ω Output
Pulse
Generator
90%
50 Ω Input
Sampling
Oscilloscope
iR(REC) = 1 mA
IR
VR
OUTPUT PULSE
(IF = IR = 10 mA; measured
at iR(REC) = 1 mA)
INPUT SIGNAL
Notes: 1. A 2.0 kΩ variable resistor adjusted for a Forward Current (IF) of 10 mA.
Notes: 2. Input pulse is adjusted so IR(peak) is equal to 10 mA.
Notes: 3. tp » trr
Figure 1. Recovery Time Equivalent Test Circuit
100
1000
TA = 150°C
IR, REVERSE CURRENT (µA)
85°C
10
150°C
1.0
25°C
0.1
0.0
–40°C
–55°C
100
TA = 125°C
10
1.0
TA = 85°C
0.1
0.01
TA = 25°C
0.001
0.2
0.3
0.4
0.1
0.5
VF, FORWARD VOLTAGE (VOLTS)
0
0.6
5
15
25
10
20
VR, REVERSE VOLTAGE (VOLTS)
Figure 2. Forward Voltage
Figure 3. Leakage Current
14
CT, TOATAL CAPACITANCE (pF)
IF, FORWARD CURRENT (mA)
125°C
12
10
8
6
4
2
0
0
5
10
15
20
VR, REVERSE VOLTAGE (VOLTS)
Figure 4. Total Capacitance
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3
25
30
30
BAT54T1
INFORMATION FOR USING THE SOD–123 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
SOD–123
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
0.91
0.036
2.36
0.093
4.19
0.165
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
1.22
0.048
mm
inches
SOD–123 POWER DISSIPATION
SOLDERING PRECAUTIONS
The power dissipation of the SOD–123 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from the
device junction to ambient, and the operating temperature,
TA. Using the values provided on the data sheet for the
SOD–123 package, PD can be calculated as follows:
PD =
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOD–123 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225
milliwatts. There are other alternatives to achieving higher
power dissipation from the SOD–123 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
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4
BAT54T1
PACKAGE DIMENSIONS
(SC–70)
SOD–123
PLASTIC PACKAGE
CASE 425–04
ISSUE C
A
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
H
ÂÂÂÂ
ÂÂÂÂ
1
K
B
E
2
D
J
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5
DIM
A
B
C
D
E
H
J
K
INCHES
MIN
MAX
0.055
0.071
0.100
0.112
0.037
0.053
0.020
0.028
0.01
--0.000
0.004
--0.006
0.140
0.152
STYLE 1:
PIN 1. CATHODE
2. ANODE
MILLIMETERS
MIN
MAX
1.40
1.80
2.55
2.85
0.95
1.35
0.50
0.70
0.25
--0.00
0.10
--0.15
3.55
3.85
BAT54T1
Notes
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BAT54T1
Notes
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7
BAT54T1
Thermal Clad is a registered trademark of the Bergquist Company.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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BAT54T1/D