ETC BFR30LT1/D

ON Semiconductor
BFR30LT1
BFR31LT1
JFET Amplifiers
N–Channel
2 SOURCE
3
3
GATE
1
1 DRAIN
2
CASE 318–08, STYLE 10
SOT–23 (TO–236AB)
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Drain–Source Voltage
VDS
25
Vdc
Gate–Source Voltage
VGS
25
Vdc
Symbol
Max
Unit
PD
225
mW
1.8
mW/°C
RJA
556
°C/W
PD
300
mW
2.4
mW/°C
RJA
417
°C/W
TJ, Tstg
–55 to +150
°C
THERMAL CHARACTERISTICS
Characteristic
Dissipation(1)
Total Device
TA = 25°C
Derate above 25°C
Thermal Resistance Junction to Ambient
Total Device Dissipation
Alumina Substrate,(2) TA = 25°C
Derate above 25°C
Thermal Resistance Junction to Ambient
Junction and Storage Temperature
DEVICE MARKING
BFR30LT1 = M1; BFR31LT1 = M2
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
IGSS
—
0.2
nAdc
OFF CHARACTERISTICS
Gate Reverse Current
(VGS = 10 Vdc, VDS = 0)
Gate Source Cutoff Voltage
(ID = 0.5 nAdc, VDS = 10 Vdc)
BFR30
BFR31
VGS(OFF)
—
—
5.0
2.5
Vdc
Gate Source Voltage
(ID = 1.0 mAdc, VDS = 10 Vdc)
BFR30
BFR31
BFR30
BFR31
VGS
–0.7
—
—
—
–3.0
–1.3
–4.0
–2.0
Vdc
(ID = 50 Adc, VDS = 10 Vdc)
1. Device mounted on FR4 glass epoxy printed circuit board using the recommended footprint.
2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina.
 Semiconductor Components Industries, LLC, 2001
March, 2001 – Rev. 1
1
Publication Order Number:
BFR30LT1/D
BFR30LT1 BFR31LT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic
Symbol
Min
Max
Unit
IDSS
4.0
1.0
10
5.0
mAdc
1.0
1.5
0.5
0.75
4.0
4.5
—
—
40
20
25
15
ON CHARACTERISTICS
Zero–Gate–Voltage Drain Current
(VDS = 10 Vdc, VGS = 0)
BFR30
BFR31
SMALL–SIGNAL CHARACTERISTICS
yfs
Forward Transconductance
(ID = 1.0 mAdc, VDS = 10 Vdc, f = 1.0 kHz)
BFR30
BFR31
BFR30
BFR31
(ID = 200 Adc, VDS = 10 Vdc, f = 1.0 kHz)
mAdc
yos
Output Admittance
(ID = 1.0 mAdc, VDS = 10 Vdc, f = 1.0 kHz)
(ID = 200 Adc, VDS = 10 Vdc)
BFR30
BFR31
Adc
Input Capacitance
(ID = 1.0 mAdc, VDS = 10 Vdc, f = 1.0 MHz)
(ID = 200 Adc, VDS = 10 Vdc, f = 1.0 MHz)
Ciss
—
—
5.0
4.0
pF
Reverse Transfer Capacitance
(ID = 1.0 mAdc, VDS = 10 Vdc, f = 1.0 MHz)
(ID = 200 Adc, VDS = 10 Vdc, f = 1.0 MHz)
Crss
—
—
1.5
1.5
pF
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BFR30LT1 BFR31LT1
TYPICAL CHARACTERISTICS
14
VDS = 15 V
VGS = 0
RS = 1 M
4
3
2
1
0
VDS = 15 V
VGS = 0
f = 1 kHz
12
NF, NOISE FIGURE (dB)
NF, NOISE FIGURE (dB)
5
10
8
6
4
2
0.01
0.1
1.0
f, FREQUENCY (kHz)
0
100
10
0.001
Figure 1. Noise Figure versus Frequency
VGS(off) -1.2 V
1.2
VGS = 0 V
1.0
-0.2 V
0.8
0.6
-0.4 V
0.4
-0.6 V
0
0
0.8
VDS = 15 V
0.6
0.4
0
-1.2
25
5
10
15
20
VDS, DRAIN-SOURCE VOLTAGE (VOLTS)
VGS(off) -1.2 V
1.0
0.2
-0.8 V
-1.0 V
0.2
10
Figure 2. Noise Figure versus Source
Resistance
I D , DRAIN CURRENT (mA)
I D , DRAIN CURRENT (mA)
1.2
0.01
0.1
1.0
RS, SOURCE RESISTANCE (Megohms)
Figure 3. Typical Drain Characteristics
-0.8
-0.4
VGS, GATE-SOURCE VOLTAGE (VOLTS)
Figure 4. Common Source Transfer
Characteristics
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0
BFR30LT1 BFR31LT1
TYPICAL CHARACTERISTICS
5
VGS = 0 V
VGS(off) -3.5 V
4
I D , DRAIN CURRENT (mA)
I D , DRAIN CURRENT (mA)
5
VGS(off) -3.5 V
3
-1 V
2
-2 V
1
4
3
VDS = 15 V
2
1
-3 V
0
0
5
10
15
20
VDS, DRAIN-SOURCE VOLTAGE (VOLTS)
0
-5
25
Figure 5. Typical Drain Characteristics
10
VGS(off) -5.8 V
I D , DRAIN CURRENT (mA)
I D , DRAIN CURRENT (mA)
VGS = 0 V
-1 V
6
-2 V
4
-3 V
2
0
-4 V
-5 V
0
5
10
15
20
VDS, DRAIN-SOURCE VOLTAGE (VOLTS)
0
Figure 6. Common Source Transfer
Characteristics
10
8
-3
-2
-1
-4
VGS, GATE-SOURCE VOLTAGE (VOLTS)
8
6
VDS = 15 V
4
2
0
-7
25
VGS(off) -5.8 V
Figure 7. Typical Drain Characteristics
-6
-5
-4
-3
-2
VGS, GATE-SOURCE VOLTAGE (VOLTS)
-1
Figure 8. Common Source Transfer
Characteristics
Note: Graphical data is presented for dc conditions. Tabular
data is given for pulsed conditions (Pulse Width = 630
ms, Duty Cycle = 10%). Under dc conditions, self heating in higher IDSS units reduces IDSS.
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0
BFR30LT1 BFR31LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
SOLDERING PRECAUTIONS
The power dissipation of the SOT–23 is a function of the
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from the
device junction to ambient, and the operating temperature,
TA. Using the values provided on the data sheet for the
SOT–23 package, PD can be calculated as follows:
PD =
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use of
the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts.
There are other alternatives to achieving higher power
dissipation from the SOT–23 package. Another alternative
would be to use a ceramic substrate or an aluminum core
board such as Thermal Clad. Using a board material such
as Thermal Clad, an aluminum core board, the power
dissipation can be doubled using the same footprint.
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BFR30LT1 BFR31LT1
PACKAGE DIMENSIONS
SOT–23 (TO–236AB)
CASE 318–08
ISSUE AF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
A
L
3
1
V
B S
2
G
C
D
H
K
J
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
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DIM
A
B
C
D
G
H
J
K
L
S
V
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.35
0.69
0.89
1.02
2.10
2.64
0.45
0.60
BFR30LT1 BFR31LT1
Notes
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BFR30LT1 BFR31LT1
Thermal Clad is a trademark of the Bergquist Company.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
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attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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BFR30LT1/D