ETC LC75411WS

Ordering number : ENN6928
CMOS IC
LC75411ES, 75411WS
Electronic Volume Controller
for Car Audio Systems
Overview
Features
The LC75411ES and 75411WS are electronic volume
controllers that enable control of volume, balance, fader,
bass/treble, loudness, input switching, and input gain
using only a small number of external components.
• On-chip buffer amplifier cuts down number of external
components
• Low switching noise generated by on-chip switch
through use of silicon gate CMOS process, for low
switching noise when there is no signal
• Low switching noise when there is a signal due to use
of on-chip zero-cross switching circuit
• On-chip 1/2 VDD reference voltage circuit
• Controls performed with serial input (CCB)
Functions
• Volume: 0 dB to –79.5 dB in 0.5-dB steps, and –∞ (161
positions) Balance function with separate L/R
control
• Fader: rear output or front output can be attenuated
across 16 positions (in 1-dB steps from 0 dB to
–2 dB, 2-dB steps from –2 dB to 20 dB, 10-dB
steps from –20 dB to –30 dB, and –45 dB,
–60 dB, –∞)
• Bass/treble: Both bass and treble can be controlled in
1-dB steps from 0 dB to ±6 dB, and in 2-dB
steps from ±8 dB to ±12 dB.
• Input gain: 0 dB to +18.75 dB (1.25-dB steps)
amplification is possible for the input signal.
• Input switching: four input signals can be selected for
Left and for Right
• Loudness: A tap is output from the –32 dB position of a
2 dB step volume control resistor ladder.
A loudness function can be implemented by
connecting an external RC circuit.
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
62901RM (OT) No. 6928-1/34
LC75411ES, 75411WS
Package Dimensions
unit: mm
unit: mm
3148-QIP44MA
3163A-SQFP48
[LC75411ES]
[LC75411WS]
9.0
7.0
1.6
1.0
0.75
0.2
23
33
34
0.75
0.18
37
22
0.15
25
36
24
13
48
0.1
2.5
12
0.1
1
1.7max
12
11
1
0.75
44
2.8max
0.5
9.0
7.0
13.2
10.0
0.8
1.0
1.0
0.5
0.75
1.6
13.2
10.0
1.0 0.8 0.35
0.8
11.6
0.5
0.5
SANYO: SQFP48
SANYO: QIP44MA
Pin Assignment
LVRIN
LCT
LCOM
LVROUT
LTIN
LF1C1
LF1C2
LF1C3
LF3C1
LTOUT
LFIN
[LC75411ES]
33
32
31
30
29
28
27
26
25
24
23
LSELO 34
22 LFOUT
L4 35
21 LROUT
L3 36
20 VSS
L2 37
19 CL
L1 38
18 DI
LC75411ES
VDD 39
17 CE
16 TEST
Vref 40
1
2
3
4
5
6
7
8
9
10
11
RF1C2
RF1C3
RF3C1
RTOUT
12 RFIN
RF1C1
R4 44
RTIN
13 RFOUT
RVROUT
R3 43
RCOM
14 RROUT
RCT
R2 42
RVRIN
15 TIM
RSELO
R1 41
No. 6928-2/33
22µF
44
RVref
RCOM
RCT
RVRIN
RSELO
10µF
0.1µF
4
5
6
8
9
10
ZEROCROSS DET
0.1µF
0.1µF
[BASS fo=100Hz]
7
24
[TREBLE]
11
LOGIC CIRCUIT
ZEROCROSS DET
25
RF3C1 2700pF
4.7kΩ
3
RF1C1
1µF
2
RF1C2
220pF
1
RVref
Multiplexer
CONTROL
CIRCUIT
Multiplexer
26
LVref
R4
43
42
41
40
LVref
LVref
27
[TREBLE]
10µF
NO SIGNAL
TIMER
CCB
INTERFACE
10µF
VDD
12
13
14
15
16
17
18
19
20
21
22
23
RFIN
RFOUT
RROUT
TIM
TEST
CE
DI
CL
VSS
LROUT
LFOUT
LFIN
10µF
10µF
0.033µF
CE
DI
CL
10µF
10µF
Microcontroller
R3
R2
R1
Vref
39
LVref
VDD
38
LSELO
L1
LVRIN
37
68kΩ
LCT
L2
10µF
36
LCOM
L3
LVROUT
35
LTIN
L4
10µF
28
LF1C1
29
0.1µF
30
LF1C2
31
0.1µF
32
LF1C3
33
[BASS fo=100Hz]
2700pF LF3C1
34
0.1µF
LTOUT
1µF × 4
1µF
220pF
4.7kΩ
PA
PA
PA
PA
LC75411ES, 75411WS
Equivalent Circuit Block Diagram
[LC75411ES]
RVref
RTOUT
RF1C3
RTIN
10µF
RVROUT
68kΩ
RVref
No. 6928-3/33
LC75411ES, 75411WS
Sample Application Circuit
[LC75411ES]
0.1µF
2700pF
4.7kΩ
68kΩ
33
R4
LFIN
LTOUT
LF3C1
LF1C3
LF1C2
LF1C1
LTIN
LVROUT
LC75411ES
39
17
40
16
41
15
42
14
43
13
44
12
1
2
3
4
5
1µF
6
10µF
220pF
68kΩ
4.7kΩ
0.1µF
7
8
9
0.1µF 0.1µF
10
LFOUT
10µF
PA
LROUT
DVSS
PA
10µF
CL
DI
Microcontroller
CE
TEST
TIM
RROUT
0.033µF
10µF
PA
RFOUT
RFIN
PA
10µF
11
RTOUT
1µF
R3
18
RF3C1
1µF
R2
23
38
RF1C3
1µF
R1
24
19
RF1C2
1µF
Vref
25
37
RF1C1
22µF
VDD
26
20
RTIN
VDD
L1
27
36
RVROUT
1µF
L2
28
21
RCOM
1µF
L3
29
35
RCT
1µF
L4
30
10µF
0.1µF
22
RVRIN
1µF
31
0.1µF
34
RSELO
LSELO
32
LCOM
10µF
LCT
220pF
LVRIN
1µF
10µF
10µF
10µF
2700pF
No. 6928-4/33
LC75411ES, 75411WS
Pin Assignment
LSELO
LVRIN
LCT
LCOM
LVROUT
LTIN
LF1C1
LF1C2
LF1C3
LF3C1
LTOUT
NC
[LC75411WS]
36
35
34
33
32
31
30
29
28
27
26
25
L4 37
24 LFIN
L3 38
23 LFOUT
L2 39
22 LROUT
L1 40
21 VSS
20 CL
NC 41
VDD 42
19 DI
LC75411WS
Vref 43
18 CE
1
2
3
4
5
6
7
8
9
10
11
12
RF3C1
RTOUT
NC
13 RFIN
RF1C3
R4 48
RF1C2
14 RFOUT
RF1C1
R3 47
RTIN
15 RROUT
RVROUT
R2 46
RCOM
16 TIM
RCT
R1 45
RVRIN
17 TEST
RSELO
NC 44
No. 6928-5/33
43
R4
48
47
RCOM
10µF
RCT
RVRIN
RSELO
10µF
0.1µF
4
5
6
8
9
10
[TREBLE]
2700pF
RF1C2
0.1µF
0.1µF
[BASS fo=100Hz]
7
RF3C1
4.7kΩ
3
RF1C1
220pF
2
ZEROCROSS DET
11
25
12
RVref
1µF
1
RVref
Multiplexer
LOGIC CIRCUIT
26
LVref
R3
46
45
RVref
27
ZEROCROSS DET
28
10µF
NO SIGNAL
TIMER
CCB
INTERFACE
10µF
VDD
13
14
15
16
17
18
19
20
21
22
23
24
RFIN
RFOUT
RROUT
TIM
TEST
CE
DI
CL
VSS
LROUT
LFOUT
LFIN
10µF
10µF
0.033µF
CE
DI
CL
10µF
10µF
Microcontroller
R2
R1
NC 44
Vref
CONTROL
CIRCUIT
Multiplexer
0.1µF
22µF
LVref
LVref
42
LVref
29
2700pF
VDD
NC 41
40
LSELO
L1
LVRIN
39
68kΩ
L2
LCT
38
LCOM
L3
LVROUT
37
LTIN
L4
10µF
30
LF1C1
31
LF1C2
32
0.1µF
33
LF1C3
34
[TREBLE]
LF3C1
35
[BASS fo=100Hz]
LTOUT
36
0.1µF
NC
1µF × 4
1µF
220pF
4.7kΩ
PA
PA
PA
PA
LC75411ES, 75411WS
Equivalent Circuit Block Diagram
[LC75411WS]
NC
RTOUT
RF1C3
RTIN
RVROUT
10µF
68kΩ
RVref
No. 6928-6/33
LC75411ES, 75411WS
Sample Application Circuit
[LC75411WS]
0.1µF
2700pF
4.7kΩ
68kΩ
220pF
10µF
1µF
1µF
1µF
VDD
22µF
L4
L3
L2
L1
35
34
33
32
31
30
28
27
LTOUT
LF3C1
LF1C3
29
26
NC
10µF
0.1µF
LF1C2
LTIN
LVROUT
LCOM
LCT
LVRIN
LSELO
36
1µF
0.1µF
LF1C1
10µF
1µF
25
37
24
38
23
39
22
40
21
NC 41
20
VDD
Vref
42
19
LC75411WS
43
18
NC 44
15
47
14
48
13
1µF
10µF
220pF
68kΩ
8
9
0.1µF 0.1µF
10
11
LFOUT
10µF
PA
LROUT
VSS
PA
10µF
CL
DI
Microcontroller
CE
TEST
TIM
RROUT
10µF
PA
RFOUT
RFIN
PA
10µF
12
NC
7
RTOUT
6
RF3C1
5
RF1C3
4
RF1C2
3
RF1C1
2
RTIN
1
RVROUT
R4
46
RCOM
1µF
R3
16
RCT
1µF
R2
45
RVRIN
1µF
R1
RSELO
1µF
17
LFIN
10µF
10µF
4.7kΩ
0.1µF
2700pF
No. 6928-7/33
LC75411ES, 75411WS
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Symbol
Conditions
Maximum supply voltage
VDD max
VDD
Maximum input voltage
VIN max
All input pins
Allowable power dissipation
Pd max
Ta ≤ 85°C, when mounted on board
Ratings
Unit
11
V
VSS – 0.3 to VDD + 0.3
V
LC75411ES
600
LC75411WS
550
mW
Operating temperature
Topr
–40 to +85
°C
Storage temperature
Tstg
–50 to +125
°C
Allowable Operating Ranges at Ta = 25°C, VSS = 0 V
Parameter
Symbol
Ratings
Conditions
min
typ
max
Unit
Supply voltage
VDD
VDD
6.0
10.5
V
Input high-level voltage
VIH
CL, DI, CE, TEST
4.0
10.5
V
Input low-level voltage
VIL
CL, DI, CE, TEST
VSS
1.0
V
Input amplitude voltage
VIN
VSS
VDD
Vp-p
Input pulse width
CL
1
µs
Setup time
Tsetup
TøW
CL, DI, CE
1
µs
Hold time
Thold
CL, DI, CE
1
Operating frequency
fopg
CL
µs
500
kHz
Electrical Characteristics at Ta = 25°C, VDD = 9 V, VSS = 0 V
Parameter
Symbol
Pin Name
Conditions
Ratings
min
typ
max
Unit
[Input block]
Input resistance
Rin
L1 to L4, R1 to R4
25
50
100
kΩ
Minimum input gain
Ginmin
L1 to L4, R1 to R4
–1
0
+1
dB
Maximum input gain
Ginmax
+16.5
+18.75
+21
dB
ATerr
±0.5
dB
BAL
±0.5
dB
Step setting error
L/R balance
[Volume Block]
Input resistance
Step setting error
L/R balance
452
kΩ
ATerr
Rvr
LVRIN, RVRIN, loudness off
113
226
±0.5
dB
BAL
±0.5
dB
[Tone block]
Step setting error
ATerr
±1.0
dB
Bass control range
Gbass
max. boost/cut
±9
±12
±15
dB
Treble control range
Gtre
max. boost/cut
±9
±12
±15
dB
L/R balance
BAL
±0.5
dB
Continued on next page.
No. 6928-8/33
LC75411ES, 75411WS
Continued from preceding page.
Parameter
Symbol
Pin Name
Conditions
Ratings
min
typ
max
Unit
[Fader Block]
Input resistance
Rfed
LFIN, RFIN
25
50
0dB to –2dB
Step setting error
kΩ
dB
±1
dB
–2dB to –20dB
ATerr
L/R balance
100
±0.5
–20dB to –30dB
±2
dB
–30dB to –60dB
±3
dB
±0.5
dB
%
BAL
[General]
Total harmonic distortion
Input crosstalk
L/R crosstalk
Maximum attenuated output
Output noise voltage
THD (1)
VIN = –10dBV, f = 1 kHz
0.004
0.01
THD (2)
VIN = –10dBV, f = 10 kHz
0.006
0.01
VIN = 1Vrms, f = 1 kHz
80
88
dB
CT
VIN = 1Vrms, f = 1 kHz
80
88
dB
Vomin (1) VIN = 1Vrms, f = 1 kHz
80
88
dB
VIN = 1Vrms, f = 1 kHz
Vomin (2)
INMUTE, fader –∞
90
95
dB
VN (1)
Flat overall, IHF-A filter
5
10
VN (2)
Flat overall, 20 to 20 kHzBPF
7
15
µV
33
40
mA
10
µA
Current drain
IDD
Input high-level current
IIH
CL, DI, CE, VIN = 9 V
Input low-level current
IIL
CL, DI, CE, VIN = 0 V
–10
THD = 1%, RL = 10 kΩ
flat overall, fIN = 1 kHz
2.5
Maximum input voltage
%
CT
VCL
µV
µA
2.9
Vrms
Control Timing and Data Format
To control the LC75411ES and LC75411WS input specified serial data to the CE, CL, and DI pins.
The data configuration consists of a total of 52 bits broken down into 8 address bits and 44 data bits.
CE
DI
CL
B0
B1
B2
B3
A0
A1
A2
D0
D1 D2 D3 D4 D5
1µs 1µs 1µs
min min min
CE
CL
A3
D38 D39 D40 D41 D42 D43
1µs
min
1µs
min
DI
1µs min ≤ TDEST
No. 6928-9/33
LC75411ES, 75411WS
Address code (B0 to A3)
The LC75411ES and 75411WS use 8-bit address code and can be used in common with ICs that support SANYO’s CCB
serial bus.
Address Code
(LSB)
B0
B1
B2
B3
A0
A1
A2
A3
1
0
0
0
0
0
0
1
(81HEX)
Control code allocation
Input Switching Control
D0
D1
D2
Setting
0
0
0
L1 (R1)
1
0
0
L2 (R2)
0
1
0
L3 (R3)
1
1
0
L4 (R4)
0
1
1
1
1
1
D3
Setting
For IC testing: Normally not used
Bit for IC testing: Normally set to 0
Input Gain Control
D4
D5
D6
D7
0
0
0
0
0dB
Operation
1
0
0
0
+1.25dB
0
1
0
0
+2.50dB
1
1
0
0
+3.75dB
0
0
1
0
+5.00dB
1
0
1
0
+6.25dB
0
1
1
0
+7.50dB
1
1
1
0
+8.75dB
0
0
0
1
+10.0dB
1
0
0
1
+11.25dB
0
1
0
1
+12.5dB
1
1
0
1
+13.75dB
0
0
1
1
+15.0dB
1
0
1
1
+16.25dB
0
1
1
1
+17.5dB
1
1
1
1
+18.75dB
No. 6928-10/33
LC75411ES, 75411WS
Volume Control (0 to –20.5dB)
D8
D9
D10
D11
D12
D13
D14
D15
0
0
0
0
0
0
0
0
0dB
Operation
0
0
0
0
0
0
0
1
–0.5dB
1
0
0
0
0
0
0
0
–1dB
1
0
0
0
0
0
0
1
–1.5dB
0
1
0
0
0
0
0
0
–2dB
0
1
0
0
0
0
0
1
–2.5dB
1
1
0
0
0
0
0
0
–3dB
1
1
0
0
0
0
0
1
–3.5dB
0
0
1
0
0
0
0
0
–4dB
0
0
1
0
0
0
0
1
–4.5dB
1
0
1
0
0
0
0
0
–5dB
1
0
1
0
0
0
0
1
–5.5dB
0
1
1
0
0
0
0
0
–6dB
0
1
1
0
0
0
0
1
–6.5dB
1
1
1
0
0
0
0
0
–7dB
1
1
1
0
0
0
0
1
–7.5dB
0
0
0
1
0
0
0
0
–8dB
0
0
0
1
0
0
0
1
–8.5dB
1
0
0
1
0
0
0
0
–9dB
1
0
0
1
0
0
0
1
–9.5dB
0
1
0
1
0
0
0
0
–10dB
0
1
0
1
0
0
0
1
–10.5dB
1
1
0
1
0
0
0
0
–11dB
1
1
0
1
0
0
0
1
–11.5dB
0
0
1
1
0
0
0
0
–12dB
0
0
1
1
0
0
0
1
–12.5dB
1
0
1
1
0
0
0
0
–13dB
1
0
1
1
0
0
0
1
–13.5dB
0
1
1
1
0
0
0
0
–14dB
0
1
1
1
0
0
0
1
–14.5dB
1
1
1
1
0
0
0
0
–15dB
1
1
1
1
0
0
0
1
–15.5dB
0
0
0
0
1
0
0
0
–16dB
0
0
0
0
1
0
0
1
–16.5dB
1
0
0
0
1
0
0
0
–17dB
1
0
0
0
1
0
0
1
–17.5dB
0
1
0
0
1
0
0
0
–18dB
0
1
0
0
1
0
0
1
–18.5dB
1
1
0
0
1
0
0
0
–19dB
1
1
0
0
1
0
0
1
–19.5dB
0
0
1
0
1
0
0
0
–20dB
0
0
1
0
1
0
0
1
–20.5dB
No. 6928-11/33
LC75411ES, 75411WS
Volume Control (–21 to –40.5dB)
D8
D9
D10
D11
D12
D13
D14
D15
1
0
1
0
1
0
0
0
–21dB
Operation
1
0
1
0
1
0
0
1
–21.5dB
0
1
1
0
1
0
0
0
–22dB
0
1
1
0
1
0
0
1
–22.5dB
1
1
1
0
1
0
0
0
–23dB
1
1
1
0
1
0
0
1
–23.5dB
0
0
0
1
1
0
0
0
–24dB
0
0
0
1
1
0
0
1
–24.5dB
1
0
0
1
1
0
0
0
–25dB
1
0
0
1
1
0
0
1
–25.5dB
0
1
0
1
1
0
0
0
–26dB
0
1
0
1
1
0
0
1
–26.5dB
1
1
0
1
1
0
0
0
–27dB
1
1
0
1
1
0
0
1
–27.5dB
0
0
1
1
1
0
0
0
–28dB
0
0
1
1
1
0
0
1
–28.5dB
1
0
1
1
1
0
0
0
–29dB
1
0
1
1
1
0
0
1
–29.5dB
0
1
1
1
1
0
0
0
–30dB
0
1
1
1
1
0
0
1
–30.5dB
1
1
1
1
1
0
0
0
–31dB
1
1
1
1
1
0
0
1
–31.5dB
0
0
0
0
0
1
0
0
–32dB
0
0
0
0
0
1
0
1
–32.5dB
1
0
0
0
0
1
0
0
–33dB
1
0
0
0
0
1
0
1
–33.5dB
0
1
0
0
0
1
0
0
–34dB
0
1
0
0
0
1
0
1
–34.5dB
1
1
0
0
0
1
0
0
–35dB
1
1
0
0
0
1
0
1
–35.5dB
0
0
1
0
0
1
0
0
–36dB
0
0
1
0
0
1
0
1
–36.5dB
1
0
1
0
0
1
0
0
–37dB
1
0
1
0
0
1
0
1
–37.5dB
0
1
1
0
0
1
0
0
–38dB
0
1
1
0
0
1
0
1
–38.5dB
1
1
1
0
0
1
0
0
–39dB
1
1
1
0
0
1
0
1
–39.5dB
0
0
0
1
0
1
0
0
–40dB
0
0
0
1
0
1
0
1
–40.5dB
No. 6928-12/33
LC75411ES, 75411WS
Volume Control (–41 to –59.5dB)
D8
D9
D10
D11
D12
D13
D14
D15
1
0
0
1
0
1
0
0
–41dB
Operation
1
0
0
1
0
1
0
1
–41.5dB
0
1
0
1
0
1
0
0
–42dB
0
1
0
1
0
1
0
1
–42.5dB
1
1
0
1
0
1
0
0
–43dB
1
1
0
1
0
1
0
1
–43.5dB
0
0
1
1
0
1
0
0
–44dB
0
0
1
1
0
1
0
1
–44.5dB
1
0
1
1
0
1
0
0
–45dB
1
0
1
1
0
1
0
1
–45.5dB
0
1
1
1
0
1
0
0
–46dB
0
1
1
1
0
1
0
1
–46.5dB
1
1
1
1
0
1
0
0
–47dB
1
1
1
1
0
1
0
1
–47.5dB
0
0
0
0
1
1
0
0
–48dB
0
0
0
0
1
1
0
1
–48.5dB
1
0
0
0
1
1
0
0
–49dB
1
0
0
0
1
1
0
1
–49.5dB
0
1
0
0
1
1
0
0
–50dB
0
1
0
0
1
1
0
1
–50.5dB
1
1
0
0
1
1
0
0
–51dB
1
1
0
0
1
1
0
1
–51.5dB
0
0
1
0
1
1
0
0
–52dB
0
0
1
0
1
1
0
1
–52.5dB
1
0
1
0
1
1
0
0
–53dB
1
0
1
0
1
1
0
1
–53.5dB
0
1
1
0
1
1
0
0
–54dB
0
1
1
0
1
1
0
1
–54.5dB
1
1
1
0
1
1
0
0
–55dB
1
1
1
0
1
1
0
1
–55.5dB
0
0
0
1
1
1
0
0
–56dB
0
0
0
1
1
1
0
1
–56.5dB
1
0
0
1
1
1
0
0
–57dB
1
0
0
1
1
1
0
1
–57.5dB
0
1
0
1
1
1
0
0
–58dB
0
1
0
1
1
1
0
1
–58.5dB
1
1
0
1
1
1
0
0
–59dB
1
1
0
1
1
1
0
1
–59.5dB
No. 6928-13/33
LC75411ES, 75411WS
Volume Control (–60 to –∞)
D8
D9
D10
D11
D12
D13
D14
D15
0
0
1
1
1
1
0
0
–60dB
Operation
0
0
1
1
1
1
0
1
–60.5dB
1
0
1
1
1
1
0
0
–61dB
1
0
1
1
1
1
0
1
–61.5dB
0
1
1
1
1
1
0
0
–62dB
0
1
1
1
1
1
0
1
–62.5dB
1
1
1
1
1
1
0
0
–63dB
1
1
1
1
1
1
0
1
–63.5dB
0
0
0
0
0
0
1
0
–64dB
0
0
0
0
0
0
1
1
–64.5dB
1
0
0
0
0
0
1
0
–65dB
1
0
0
0
0
0
1
1
–65.5dB
0
1
0
0
0
0
1
0
–66dB
0
1
0
0
0
0
1
1
–66.5dB
1
1
0
0
0
0
1
0
–67dB
1
1
0
0
0
0
1
1
–67.5dB
0
0
1
0
0
0
1
0
–68dB
0
0
1
0
0
0
1
1
–68.5dB
1
0
1
0
0
0
1
0
–69dB
1
0
1
0
0
0
1
1
–69.5dB
0
1
1
0
0
0
1
0
–70dB
0
1
1
0
0
0
1
1
–70.5dB
1
1
1
0
0
0
1
0
–71dB
1
1
1
0
0
0
1
1
–71.5dB
0
0
0
1
0
0
1
0
–72dB
0
0
0
1
0
0
1
1
–72.5dB
1
0
0
1
0
0
1
0
–73dB
1
0
0
1
0
0
1
1
–73.5dB
0
1
0
1
0
0
1
0
–74dB
0
1
0
1
0
0
1
1
–74.5dB
1
1
0
1
0
0
1
0
–75dB
1
1
0
1
0
0
1
1
–75.5dB
0
0
1
1
0
0
1
0
–76dB
0
0
1
1
0
0
1
1
–76.5dB
1
0
1
1
0
0
1
0
–77dB
1
0
1
1
0
0
1
1
–77.5dB
0
1
1
1
0
0
1
0
–78dB
0
1
1
1
0
0
1
1
–78.5dB
1
1
1
1
0
0
1
0
–79dB
1
1
1
1
0
0
1
1
–79.5dB
0
1
1
1
1
1
1
0
–∞
No. 6928-14/33
LC75411ES, 75411WS
Tone Control
D16
D17
D18
D19
D40
Bass
D24
D25
D26
D27
D42
Treble
0
1
1
0
0
+12dB
1
0
1
0
0
+10dB
0
0
1
0
0
+8dB
1
1
0
0
0
+6dB
1
1
0
0
1
+5dB
0
1
0
0
0
+4dB
0
1
0
0
1
+3dB
1
0
0
0
0
+2dB
1
0
0
0
1
+1dB
0
0
0
0
0
0dB
1
0
0
1
1
–1dB
1
0
0
1
0
–2dB
0
1
0
1
1
–3dB
0
1
0
1
0
–4dB
1
1
0
1
1
–5dB
1
1
0
1
0
–6dB
0
0
1
1
0
–8dB
1
0
1
1
0
–10dB
0
1
1
1
0
–12dB
D20
D21
D22
D23
D41
0
0
0
0
0
Setting
Set to 0
Fader Volume Control
D28
D29
D30
D31
0
0
0
0
0dB
Operation
1
0
0
0
–1dB
0
1
0
0
–2dB
1
1
0
0
–4dB
0
0
1
0
–6dB
1
0
1
0
–8dB
0
1
1
0
–10dB
1
1
1
0
–12dB
0
0
0
1
–14dB
1
0
0
1
–16dB
0
1
0
1
–18dB
1
1
0
1
–20dB
0
0
1
1
–30dB
1
0
1
1
–45dB
0
1
1
1
–60dB
1
1
1
1
–∞
Channel Selection Control
D32
D33
0
0
Initial setting mode: Rapid charging
Operation
RCH
1
0
0
1
LCH
1
1
L/R simultaneously
No. 6928-15/33
LC75411ES, 75411WS
Fader Rear/Front Control
D34
Setting
0
Rear
1
Front
Loudness Control
D35
Setting
0
OFF
1
ON
Zero-Cross Control
D36
D37
0
0
Data write through zero-cross detection
Setting
1
1
Zero-cross detection stopped (data write at falling edge of CE)
Zero-Cross Signal Detection Block Control
D38
D39
0
0
Setting
Selector
1
0
Volume
0
1
Tone
1
1
Fader
Test Mode Control
D43
0
Setting
For IC testing. Always set to 0.
No. 6928-16/33
LC75411ES, 75411WS
Pin Functions
Pin Name
Pin No.
Function
LC75411ES LC75411WS
L1
38
40
L2
37
39
L3
36
38
L4
35
37
R1
41
45
R2
42
46
R3
43
47
R4
44
48
Equivalent circuit
VDD
• Single-end input pin
LVref
RVref
VDD
LSEL0
34
36
RSEL0
1
1
• Input selector output pins
VDD
LVRIN
33
35
• 2-dB step volume input pins
RVRIN
2
2
• Perform input at low-impedance.
LVref
RVref
VDD
LCT
32
34
RCT
3
3
LCOM
31
33
RCOM
4
4
• Loudness pins. Connect high-pass compensation
RC between LCT (RCT) and LVRIN (RVRIN), and
connect low-pass compensation RC between LCT
(RCT) and GND.
VDD
• 2-dB stop volume output pins.
• Connect these pins to GND through coupling
capacitors to reduce switching noise.
VDD
LVROUT
30
32
RVROUT
5
5
• 0.5-dB step volume output pin
VDD
LTIN
29
31
RTIN
6
6
• Equalizer input pin
Lvref
RVref
Continued on next page.
No. 6928-17/33
LC75411ES, 75411WS
Continued from preceding page.
Pin Name
Pin No.
Function
LC75411ES LC75411WS
Equivalent circuit
VDD
VDD
TIN
LF1C1
28
Vref
30
LF1C2
27
29
LF1C3
26
28
RF1C1
7
7
RF1C2
8
8
RF1C3
9
9
• Equalizer F1 band filter configuration capacitor
connection pins.
VDD
Connect capacitor between
VDD
LF1C1 (RF1C1) and LF1C2 (RF1C2)
LF1C2 (RF1C2) and LF1C3 (RF1C3)
FnC1
FnC3
FnC2
LF3C1
25
27
RF3C1
10
10
• Equalizer F3 band circuit filter configuration
capacitor connection pins.
Connect high-pass compensation capacitor
between LF3C1 (RF3C1) and VSS.
VDD
VDD
C1
VDD
LTOUT
24
26
RTOUT
11
11
LFIN
23
24
• Fader block input pins
RFIN
12
13
• Drive at low impedance.
LFOUT
22
23
• Equalizer output pins
VDD
VDD
LROUT
21
22
RFOUT
13
14
RROUT
14
15
• Fader output pins. Attenuation is possible separately
for the front end and rear end. The attenuation
amount is the same for L and R.
VDD
Vref
40
43
• Connect a capacitor of a few tens of µF between
Vref and VSS as a 0.55 VDD voltage generator,
current ripple countermeasure.
LVref
RVref
Continued on next page.
No. 6928-18/33
LC75411ES, 75411WS
Continued from preceding page.
Pin Name
Pin No.
Function
LC75411ES LC75411WS
VDD
39
42
• Power supply pin
VSS
20
21
• Ground pin
Equivalent circuit
VDD
TEST
16
17
• Dedicated IC test pin
• Normally this pin is used connected to GND.
VDD
TIM
15
16
CL
19
20
DI
18
19
CE
17
18
• Timer pin when there is no signal in the zero-cross
circuit.
Forcibly set data when there is no zero-cross signal,
from the time the data is set until the timer ends.
• Input pin for serial data and clock used for control
VDD
• Chip enable pin. Data is written to the internal latch
and the analog switches are operated when the
level changes from High to Low.
Data transfer is enabled when the level is High.
12
NC
—
25
41
• No Connect pin. Leave this pin open or connect it to
VSS.
44
No. 6928-19/33
LC75411ES, 75411WS
Internal Equivalent Circuit Block Diagram
Selector Block Equivalent Circuit Block Diagram
L4
LSELO
50k
0dB
LVref
6.702k
L3
1.25dB
50k
5.804k
2.50dB
LVref
5.026k
L2
3.75dB
50k
4.352k
5.00dB
LVref
3.769k
L1
6.25dB
50k
3.264k
7.50dB
LVref
2.826k
INMUTE SW
8.75dB
2.447k
10.0dB
LVref
2.119k
11.25dB
Total resistance: 50 kΩ
Same for right channel
Unit (Resistance: Ω)
1.835k
12.5dB
1.589k
13.75dB
1.376k
15.0dB
1.192k
16.25dB
1.032k
17.5dB
0.894k
18.75dB
5.774k
LVref
No. 6928-20/33
LC75411ES, 75411WS
2-dB Volume Block Equivalent Circuit Block Diagram
LVRIN
0dB
41.139k
–2dB
32.678k
–4dB
25.957k
–6dB
20.618k
–8dB
16.378k
–10dB
13.009k
Total resistance of
195 kΩ over tap
To left
channel
0.5–dB block
–12dB
10.334k
–14dB
8.208k
–16dB
6.520k
–18dB
5.179k
Initial setting switch
–20dB
4.114k
–22dB
3.268k
–24dB
2.596k
Same for right channel
Unit (Resistance: Ω)
–26dB
2.062k
–28dB
1.638k
–30dB
1.301k
LCT
–32dB
6.344k
–34dB
5.040k
5.750k
–36dB
4.003k
–38dB
3.180k
–40dB
2.526k
–42dB
2.006k
–44dB
1.594k
–46dB
1.266k
Total resistance of
30.847 kΩ under tap
–48dB
1.006k
–50dB
0.799k
–52dB
0.634k
–54dB
0.504k
–56dB
0.400k
–58dB
0.318k
–60dB
0.253k
–62dB
0.201k
–64dB
0.159k
–66dB
0.127k
–68dB
0.101k
–70dB
0.080k
–72dB
0.063k
–74dB
0.050k
–76dB
0.040k
–78dB
0.154k
–∞dB
LVref
No. 6928-21/33
LC75411ES, 75411WS
0.5-dB Volume Block Equivalent Circuit Block Diagram
From left channel
2-dB block
LVROUT
0dB
2.797k
–0.5dB
Initial setting switch
2.640k
Unit: Ω
Total resistance: 50 kΩ
Same for right channel
–1dB
2.493k
–1.5dB
42.070k
–∞dB
Vref
Initial setting switch
LCOM
No. 6928-22/33
LC75411ES, 75411WS
Tone Block Equivalent Circuit Diagram
LTOUT
LTIN
50k
LVref
SW2
SW3
SW2
SW1
SW3
SW1
0.027k
SW4
3.373k
SW4
12.840k
12dB
12dB
3.373k
10dB
4.246k
10dB
4.246k
8dB
5.346k
8dB
5.346k
6dB
3.172k
6dB
3.172k
5dB
3.558k
5dB
3.558k
4dB
3.993k
4dB
3.993k
3dB
4.480k
3dB
4.480k
2dB
5.027k
2dB
5.027k
1dB
5.640k
1dB
5.640k
0dB
0dB
6.50k
LF1C1
LF1C2
LF1C3
LF3C1
Unit: Ω
Total resistance: 38.861 kΩ
Same for right channel
During boost, SW 1 and SW 3 are ON, during cut SW 2 and SW 4 are ON,
and when 0 dB, 0 dB SW and SW 2 and SW 3 are ON.
No. 6928-23/33
LC75411ES, 75411WS
Tone Circuit Constant Calculation Example
Bass Band Circuit
The equivalent circuit and the formula for calculating the external RC with a mean frequency of 100 Hz are shown
below.
• Bass band equivalent circuit block diagram
C1
R1
R2
C2
R3
• Calculation example
Specification Mean frequency: f0 = 100 Hz
Gain during maximum boost: G = 12 dB
Let us use R1 = 0, R2 = 38.861 kΩ, R3 = 6.5 kΩ (assuming R1 = 0 during maximum boost) , and C1 = C2 = C.
1. We obtain C from mean frequency f0 = 100 Hz, as follows.
f0=
C=
1
2π R3R2C1C2
1
1
=
≅ 0.1µF
2πf0 R3R2 2π × 100 38861×6500
2. We obtain Q as follows.
Q=
R3R2
1
×
≅ 1.223
2 R3
R3R2
No. 6928-24/33
LC75411ES, 75411WS
Treble Band Circuit
The shelving characteristics for the treble band can be obtained.
The equivalent circuit and the calculation formula during boost are shown below.
C
R1
R2
• Calculation example
Specification Setting frequency: f = 26000 Hz
Gain during maximum boost: G = 12 dB
Let us use R1 = 12.840 kΩ and R2 = 38.861 kΩ
The above constants are inserted in the following formula.
R2
G = 20 × LOG10 1 +
1
R2
C=
2πf (
R12 + (1 / ωC ) 2
10
G / 20
–1
) 2 – R12
1
=
2π × 26000
38861
3.981 – 1
≅ 2700(pF)
2
– 12840 2
No. 6928-25/33
LC75411ES, 75411WS
Fader Volume Block Equivalent Circuit Block Diagram
S1
LFIN
LFOUT
0dB
5.437k
S2
–1dB
S3
4.846k
–2dB
S4
LROUT
8.169k
–4dB
6.489k
–6dB
5.154k
–8dB
4.094k
–10dB
When FADER = "1", S2 and S3 are ON.
When FADER = "0", S1 and S4 are ON.
3.252k
–12dB
2.583k
–14dB
2.052k
–16dB
1.630k
–18dB
1.295k
–20dB
3.419k
–30dB
1.300k
–45dB
0.231k
–60dB
Unit: Ω
Total resistance: 50 kΩ
0.050k
–∞dB
LVref
When –∞ data is sent to the main volume 0.5dBSTEP, S1 and S2
become open, and S3 and S4 simultaneously become ON.
No. 6928-26/33
LC75411ES, 75411WS
Usage Cautions
(1) Data transmission at power ON
• The status of internal analog switches is unstable at power ON. Therefore, perform muting or some other
countermeasure until the data has been set.
• At power ON, initial setting data must be sent once in order to stabilize the bias of each block in a short time.
(2) Description of zero-cross switching circuit operation
The LC75411ES and 75411WS have a function to switch zero-cross comparator signal detection locations, enabling
the selection of the optimum detection location for blocks whose data is to be updated. Basically, the switching noise
can be minimized by inputting the signal immediately following the block whose data is to be updated to the zerocross comparator, so it is necessary to switch the detection location every time.
Selector
Volume
Tone
Fader
Switch
Zero-cross
comparator
LC75411ES, 75411WS Zero-Cross Detection Circuit
No. 6928-27/33
LC75411ES, 75411WS
(3) Zero-cross switching control method
The zero-cross switching control method consists of setting the zero-cross control bits to the zero-cross detection
mode (D36, D37 = 0), and specifying the detection blocks (D38, D39) before transmitting the data. These control bits
are latched immediately following data transfer, that is to say beforehand in sync with the falling edge of CE, so when
updating data of volumes, etc., it is possible to perform mode setting and zero-cross switching with one data transfer.
An example of control when updating the data of the volume block is shown below.
D36
D37
D38
D39
0
0
1
0
Zero-cross detection
mode setting
Volume block
setting
(4) Zero-cross timer setting
If the input signal becomes lower than the zero-cross comparator detection sensitivity, or if only low-frequency
signals are input, zero-cross detection continues to be impossible, and data is not latched during this time.
The zero-cross timer can set a time for forcible latch during such a status when zero-cross detection is not possible.
For example, to set 25 ms,
using T = 0.69CR and C = 0.033 µF,
we obtain
R=
25 × 10 –3
0.69 × 0.033 × 10 –6
1.1 MΩ
Normally, a value between 10 ms and 50 ms is set.
(5) Cautions related to serial data transfer
1. To ensure that the high-frequency digital signals transferred to the CL, DI, and CE pins do not spill over to the
analog signal block, either guard these signal lines with a ground pattern, or perform transmission using shielded
wires.
2. The data format of the LC75411ES and 75411WS uses 8-bit addresses and 44-bit data. When sending data using
multiples of 8 (when sending 48 bits), use the method described in Figure 1.
Method for Receiving Data Using Multiple of 8 of LC75411ES and 75411WS
X
X
X
Dummy data
X
D0
D1
D2
D3
D36
D37
D38
D39
D40
D41
D42
D43
Test mode control
Input switching control
X : don’t care
Figure 1
No. 6928-28/33
LC75411ES, 75411WS
Gain Step Characteristics
Output level — dB
LC75411WS
VDD=9V
VIN=–30dBV
Input L1
Output LFOUT
f=1kHz
Fader block
Graphic equalizer block
Input gain block
Step setting — dB
Fader block
Graphic equalizer block
Fader block
LC75411WS
VDD=9V
VIN=0
f=1kHz
Input L1
Output LFOUT
Step setting — dB
Main volume block
Graphic equalizer block
Main Volume Control Step Characteristics
Attenuation — dB
LC75411ES
VDD=9V
VIN=0
f=1kHz
Input L1
Output LFOUT
Input gain block
Attenuation — dB
Main Volume Control Step Characteristics
Main volume block
Input gain block
Step setting — dB
Fader block
Graphic equalizer block
Main volume block
Input gain block
Step setting — dB
Main volume block
Output level — dB
Gain Step Characteristics
LC75411ES
VDD=9V
VIN=–30dBV
Input L1
Output LFOUT
f=1kHz
No. 6928-29/33
Fader Volume Control Step Characteristics
Fader Volume Control Step Characteristics
LC75411ES
VDD=9V
VIN=0dBV
Input L1
Output LFOUT
f=1kHz
LC75411WS
VDD=9V
VIN=0dBV
Input L1
Output LFOUT
f=1kHz
Fader Volume Attenuation — dB
LC75411WS
VDD=9V
Input L1
Output LFOUT
80kHz LPF
Fader block
THD
METER
Main volume block
Frequency, f — dB
Input gain block
Fader block
Graphic equalizer block
Main volume block
Frequency, f — dB
Input gain block
Fader block
THD — Frequency Characteristics
Total harmonic distortion — %
LC75411ES
VDD=9V
Input L1
Output LFOUT
80kHz LPF
Graphic equalizer block
Input gain block
Fader block
THD — Frequency Characteristics
Total harmonic distortion — %
Main volume block
Step setting — dB
Graphic equalizer block
Input gain block
Main volume block
Step setting — dB
Graphic equalizer block
Fader Volume Attenuation — dB
LC75411ES, 75411WS
THD
METER
No. 6928-30/33
Fader block
block
Fader
Graphicequalizer
equalizerblock
block
Graphic
Main volume
volume block
block
Main
Input gain
gain block
block
Input
Supply voltage — V
THD
METER
Fader block
block
Fader
LC75411ES
80kHz LPF
Input L1
Output LFOUT
Graphicequalizer
equalizerblock
block
Graphic
THD — Supply Voltage Characteristics
Fader block
block
Fader
Graphicequalizer
equalizerblock
block
Graphic
Main volume
volume block
block
Main
Input level, VIN — dBV
Main volume
volume block
block
Main
THD
METER
Input gain
gain block
block
Input
Total harmonic distortion, THD — %
LC75411ES
VDD=9V
80kHz LPF
Input L1, Output LFOUT
With MV=0dB
Total harmonic distortion, THD — %
Fader block
block
Fader
Graphicequalizer
equalizerblock
block
Graphic
Main volume
volume block
block
Main
Input gain
gain block
block
Input
Total harmonic distortion, THD — %
THD — Input Level Characteristics
Input gain
gain block
block
Input
Total harmonic distortion, THD — %
LC75411ES, 75411WS
THD — Input Level Characteristics
LC75411WS
VDD=9V
80kHz LPF
Input L1, Output LFOUT
With MV=0dB
Input level, VIN — dBV
THD
METER
THD — Supply Voltage Characteristics
LC75411WS
80kHz LPF
Input L1
Output LFOUT
Supply voltage — V
THD
METER
No. 6928-31/33
LC75411ES, 75411WS
Bass Control Characteristics
Bass Control Characteristics
LC75411WS
VDD=9V
VIN=–20dBV
Input L1
Output LFOUT
Level — dB
Level — dB
LC75411ES
VDD=9V
VIN=–20dBV
Input L1
Output LFOUT
Frequency, f — Hz
Frequency, f — Hz
Treble Control Characteristics
Treble Control Characteristics
LC75411WS
VDD=9V
VIN=–20dBV
Input L1
Output LFOUT
Level — dB
Level — dB
LC75411ES
VDD=9V
VIN=–20dBV
Input L1
Output LFOUT
Frequency, f — Hz
Frequency, f — Hz
Output Level Control Characteristics
Output Level Control Characteristics
VDD=9V, VIN=0
MV=0 to –54dB
Level — dB
Level — dB
VDD=9V, VIN=0
MV=0 to –54dB
Frequency, f — Hz
Frequency, f — Hz
Loudness Control Characteristics
Loudness Control Characteristics
VDD=9V, VIN=0, Input=L1, Output=LFOUT
Loudness On, MV=0 to –54dB
Level — dB
Level — dB
VDD=9V, VIN=0, Input=L1, Output=LFOUT
Loudness On, MV=0 to –54dB
Frequency, f — Hz
Frequency, f — Hz
No. 6928-32/33
LC75411ES, 75411WS
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
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give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
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circuits and error prevention circuits for safe design, redundant design, and structural design.
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Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
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no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of June, 2001. Specifications and information herein are subject to
change without notice.
PS No. 6928-33/33