ETC IRLR3103TRBDF

PD - 91333E
IRLR/U3103
HEXFET® Power MOSFET
Logic-Level Gate Drive
l Ultra Low On-Resistance
l Surface Mount (IRLR3103)
l Straight Lead (IRLU3103)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
Description
l
D
VDSS = 30V
RDS(on) = 0.019Ω
G
ID = 55A…
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
D -P A K
T O -2 52 A A
I-P A K
T O -25 1 A A
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current ‡
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚‡
Avalanche Current‡
Repetitive Avalanche Energy‡
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
55…
39…
220
107
0.71
± 16
240
34
11
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
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Junction-to-Case
Junction-to-Ambient (PCB mount) **
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
–––
1.4
50
110
°C/W
1
11/11/98
IRLR/U3103
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min. Typ. Max. Units
Conditions
30
––– –––
V
VGS = 0V, ID = 250µA
––– 0.037 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.019
VGS = 10V, ID = 33A „
Ω
––– ––– 0.024
VGS = 4.5V, ID = 25A „
1.0
––– –––
V
VDS = VGS, ID = 250µA
23
––– –––
S
VDS = 25V, ID = 34A‡
––– ––– 25
VDS = 30V, VGS = 0V
µA
––– ––– 250
VDS = 18V, VGS = 0V, TJ = 150°C
––– ––– 100
VGS = 16V
nA
––– ––– -100
VGS = -16V
––– ––– 50
ID = 34A
––– ––– 14
nC VDS = 24V
––– ––– 28
VGS = 4.5V, See Fig. 6 and 13 „‡
–––
9.0 –––
VDD = 15V
––– 210 –––
ID = 34A
ns
–––
20 –––
RG = 3.4Ω, VGS = 4.5V
–––
54 –––
RD = 0.43Ω, See Fig. 10 „‡
Between lead,
–––
4.5
–––
nH
6mm (0.25in.)
G
from package
––– 7.5 –––
and center of die contact†
––– 1600 –––
VGS = 0V
––– 640 –––
pF
VDS = 25V
––– 320 –––
ƒ = 1.0MHz, See Fig. 5‡
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) ‡
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 55…
showing the
A
G
integral reverse
––– ––– 220
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS = 28A, VGS = 0V „
––– 81 120
ns
TJ = 25°C, IF = 34A
––– 210 310
nC di/dt = 100A/µs „†
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ VDD = 15V, starting TJ = 25°C, L = 300µH
RG = 25Ω, IAS = 34A. (See Figure 12)
ƒ ISD ≤ 34A, di/dt ≤ 140A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
„ Pulse width ≤ 300µs; duty cycle ≤ 2%
… Calculated continuous current based on maximum allowable junction
temperature; Package limitation current = 20A
† This is applied for I-PAK, LS of D-PAK is measured between lead and
center of die contact
‡ Uses IRL3103 data and test conditions
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
2
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IRLR/U3103
1000
1000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
ID , D rain-to-S ource C urrent (A )
ID , D rain-to-S ource C urrent (A )
TOP
100
10
2.5V
20µ s P U LS E W ID TH
T J = 25°C
1
0.1
1
10
100
10
2.5 V
20µ s P U LS E W ID TH
T J = 175°C
1
A
100
0.1
V D S , D rain-to-S ource V oltage (V )
2.0
R D S (on ) , D rain-to-S ource O n R esistance
(N orm alized)
I D , D ra in -to-S o urc e C urren t (A )
T J = 2 5 °C
100
T J = 1 7 5 °C
10
V DS = 15V
2 0 µ s P U L S E W ID T H
3.0
4.0
5.0
6.0
7.0
8.0
V G S , G a te -to -S o u rc e V o lta g e (V )
Fig 3. Typical Transfer Characteristics
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A
100
Fig 2. Typical Output Characteristics
1000
2.0
10
V D S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
1
1
9.0
A
I D = 56A
1.5
1.0
0.5
V G S = 10V
0.0
-60
-40 -20
0
20
40
60
80
100 120 140 160 180
T J , J unc tion T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
3
A
IRLR/U3103
2800
C iss
V GS
C is s
C rs s
C oss
=
=
=
=
15
0V ,
f = 1M H z
C gs + C gd , Cds S H O R TE D
C gd
C ds + C gd
V G S , G ate-to-S ource V oltage (V )
3200
C , C apacitanc e (pF )
2400
C oss
2000
1600
1200
C rs s
800
400
0
V D S = 24V
V D S = 15V
12
9
6
3
A
1
10
FO R TE S T C IR C U IT
S E E FIG U R E 1 3
0
100
0
V D S , D rain-to-S ource V oltage (V )
10
20
30
40
50
60
A
70
Q G , T otal G ate C harge (nC )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
O P E R A TIO N IN TH IS A R E A LIM ITE D
B Y R D S (on)
I D , D rain C urrent (A )
I S D , R everse D rain C urrent (A )
I D = 34A
100
T J = 175°C
100µ s
1m s
10
T J = 25°C
10m s
V G S = 0V
10
0.4
0.8
1.2
1.6
2.0
2.4
V S D , S ource-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10µ s
100
A
2.8
T C = 25°C
T J = 175°C
S ingle P ulse
1
1
A
10
100
V D S , D rain-to-S ource V oltage (V )
Fig 8. Maximum Safe Operating Area
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IRLR/U3103
60
VDS
LIMITED BY PACKAGE
VGS
I D , Drain Current (A)
50
RD
D.U.T.
RG
+
-VDD
40
5.0V
30
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20
Fig 10a. Switching Time Test Circuit
VDS
10
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
P DM
0.05
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLR/U3103
15V
L
VDS
D .U .T
RG
IA S
10V
tp
D R IV E R
+
V
- DD
A
0 .0 1 Ω
Fig 12a. Unclamped Inductive Test Circuit
E A S , S ingle P ulse A valanc he E nergy (m J)
600
TO P
500
B O TTO M
ID
14A
24A
34A
400
300
200
100
0
V D D = 15V
25
50
A
75
100
125
150
175
S tarting T J , Junction T em perature (°C )
V (B R )D S S
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
5.0 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRLR/U3103
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
Driver Gate Drive
D=
Period
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRLR/U3103
Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
2.38 (.094)
2.19 (.086)
6.73 (.265)
6.35 (.250)
1.14 (.045)
0.89 (.035)
-A1.27 (.050)
0.88 (.035)
5.46 (.215)
5.21 (.205)
0.58 (.023)
0.46 (.018)
4
6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235)
1.02 (.040)
1.64 (.025)
1
2
10.42 (.410)
9.40 (.370)
LE A D A S S IG N M E N T S
1 - GATE
3
0.51 (.020)
M IN.
-B1.52 (.060)
1.15 (.045)
3X
2X
1.14 (.045)
0.76 (.030)
0.89 (.035)
0.64 (.025)
0.25 (.010)
2 - D R A IN
3 - SOURCE
4 - D R A IN
0.58 (.023)
0.46 (.018)
M A M B
N O TE S :
1 D IM E N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5M , 1982.
2.28 (.090)
4.57 (.180)
2 C O N TR O LLIN G D IM E N S IO N : IN C H .
3 C O N F O R M S T O JE D E C O U TLIN E TO -252A A .
4 D IM E N S IO N S S H O W N A RE B E F O R E S O LD E R D IP ,
S O LD E R D IP M A X. +0.16 (.006).
Part Marking Information
TO-252AA (D-PARK)
E XA M P L E : TH IS IS A N IR F R 1 20
W IT H A S S E M B LY
LOT CODE 9U1P
IN TE R N A TIO N A L
R E C T IF IE R
LO G O
A
IR F R
1 20
9U
A S S E M B LY
LOT CODE
8
F IR S T P O R TIO N
OF PART NUMBER
1P
S E C O N D P O R TIO N
OF PART NUMBER
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IRLR/U3103
Package Outline
TO-251AA Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
2.38 (.094)
2.19 (.086)
-A-
0.58 (.023)
0.46 (.018)
1.27 (.050)
0.88 (.035)
5.46 (.215)
5.21 (.205)
LE A D A S S IG N M E N T S
4
1 - GATE
2 - D R A IN
6.45 (.245)
5.68 (.224)
3 - SOURCE
4 - D R A IN
6.22 (.245)
5.97 (.235)
1.52 (.060)
1.15 (.045)
1
2
3
-B-
N O TE S :
1 D IM E N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5M , 1982.
2.28 (.090)
1.91 (.075)
2 C O N T R O LLIN G D IM E N S IO N : IN C H .
3 C O N F O R M S TO J E D E C O U T LIN E T O -252A A .
9.65 (.380)
8.89 (.350)
4 D IM E N S IO N S S H O W N A R E B E F O R E S O LD E R D IP ,
S O LD E R D IP M A X. +0.16 (.006).
3X
1.14 (.045)
0.76 (.030)
2.28 (.090)
3X
1.14 (.045)
0.89 (.035)
0.89 (.035)
0.64 (.025)
0.25 (.010)
2X
M A M B
0.58 (.023)
0.46 (.018)
Part Marking Information
TO-251AA (I-PARK)
E X A M P L E : T H IS IS A N IR F U 1 2 0
W IT H A S S E M B L Y
LO T C OD E 9U 1P
IN T E R N A T IO N A L
R E C TIF IE R
LO GO
IR F U
120
9U
ASSEMBLY
LOT CODE
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F IR S T P O R T IO N
OF PART NUMBER
1P
S E C O N D P O R T IO N
OF PART NUMBER
9
IRLR/U3103
Tape & Reel Information
TO-252AA
TR
TRR
1 6.3 ( .6 41 )
1 5.7 ( .6 19 )
12 .1 ( .4 7 6 )
11 .9 ( .4 6 9 )
F E E D D IR E C T IO N
TRL
16 .3 ( .64 1 )
15 .7 ( .61 9 )
8 .1 ( .3 18 )
7 .9 ( .3 12 )
F E E D D IR E C T IO N
NOTES :
1 . C O N T R O LL IN G D IM E N S IO N : M ILL IM E T E R .
2 . A LL D IM E N S IO N S A R E S H O W N IN M ILL IM E T E R S ( IN C H E S ).
3 . O U T L IN E C O N F O R M S T O E IA -4 81 & E IA -54 1.
1 3 IN C H
16 m m
NO TES :
1. O U T L IN E C O N F O R M S T O E IA -4 81 .
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
http://www.irf.com/
Data and specifications subject to change without notice.
11/98
10
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/