AVAGO A5090

ADNS-5090
Low Power Optical Mouse Sensor
Data Sheet
Description
Features
The Avago Technologies ADNS-5090 is a low power, small
form factor optical mouse sensor. It has a low-power architecture and automatic power management modes, making it ideal for battery, power-sensitive applications – such
as cordless input devices.
x Low Power Architecture
The ADNS-5090 is capable of high-speed motion detection – up to 30ips and 8G. In addition, it has an on-chip oscillator and LED driver to minimize external components.
x ’Smart’ LED Current Switching depending on surface
brightness
The ADNS-5090 along with the ADNS-5110-001 lens,
ADNS-5200 clip, and HLMP-ED80 LED form a complete
and compact mouse tracking system. There are no moving parts and this translates to high reliability and less
maintenance for the end user. In addition, precision optical alignment is not required, facilitating high volume assembly.
The sensor is programmed via registers through a fourwire serial port. It is housed in an 8-pin staggered dual inline package (DIP).
Note:
The ADNS-5090 Low Power Optical Mouse Sensor is not designed for use with
blue LEDs. The ADNS-4000 product is available from Avago for use with Blue
LEDs.
x Small Form Factor
x Programmable Periods / Response Times and Downshift
Times from one mode to another for the Power-saving
Modes
x High Speed Motion Detection up to 30ips and 8G
x External Interrupt Output for Motion Detection
x Internal Oscillator – no clock input needed
x Selectable Resolution up to 1750cpi
x Operating Voltage: as low as 2.8V
x Four wire Serial Port Interface
x Minimal number of passive components
Applications
x Optical mice and optical trackballs
x Integrated input devices
x Battery-powered input devices
深圳德江源电子
0755-82966416
15989331311
Theory of Operation
The ADNS-5090 is based on Optical Navigation Technology, which measures changes in position by optically
acquiring sequential surface images (frames) and mathematically determining the direction and magnitude of
movement.
The ADNS-5090 contains an Image Acquisition System
(IAS), a Digital Signal Processor (DSP), and a four wire serial port.
The IAS acquires microscopic surface images via the lens
and illumination system. These images are processed by
the DSP to determine the direction and distance of motion. The DSP calculates the Dx and Dy relative displacement values.
An external microcontroller reads and translates the Dx
and Dy information from the sensor serial port into PS2,
USB, or RF signals before sending them to the host PC.
Pinout of ADNS-5090 Optical Mouse Sensor
Pin
Name
Input/
Output
1
MISO
O
Serial Data Output
(Master In/ Slave Out)
2
LED
O
LED Illumination
3
MOTION
O
Motion Interrupt Output
(Default active low)
4
NCS
I
Chip Select
(Active low input)
5
SCLK
I
6
GND
Gnd
7
VDD
Power
8
MOSI
I
Description
Serial Clock
Ground
Supply Voltage
Serial Data Input
(Master Out/ Slave In)
Figure 1. Package outline drawing (top view)
2
Figure 2. Package Outline Drawing
CAUTION: It is advised that normal static precautions be taken in handling and assembling
of this component to prevent damage and/or degradation which may be induced by ESD.
3
Overview of Optical Mouse Sensor Assembly
Avago Technologies provides an IGES file drawing describing the base plate molding features for lens and PCB alignment. The ADNS-5090 sensor is designed for mounting on
a through-hole PCB. There is an aperture stop and features
on the package that align to the lens. The ADNS-5110-001
lens provides optics for the imaging of the surface as well
as illumination of the surface at the optimum angle. Features on the lens align it to the sensor, base plate, and clip
with the LED. The ADNS-5200 clip holds the LED in relation
to the lens. The LED must be inserted into the clip and the
LED’s leads formed prior to loading on the PCB.
The HLMP-ED80 LED is recommended for illumination.
Notes:
1. Dimensions in millimeter/inches
2. View from component side of PCB
(or top view of mouse)
Figure 3. Recommended PCB Mechanical Cutouts and Spacing (Top View)
4
Important Note: Pin 1 of sensor should be located nearest to the LED
Figure 4. 2D Assembly drawing of ADNS-5090 (Top and Side View)
Sensor
Lens
2.40 A
0.094
6.87
0.271
B
Surface
Lens Reference Plane
Note:
A – Distance from object surface to lens reference plane
B – Distance from object surface to sensor reference plane
Figure 5. Distance from lens reference plane to tracking surface (Z)
5
LED
LED Clip
ADNS-5090 (Sensor)
Customer supplied PCB
ADNS-5110-001
Customer supplied base plate with
recommended alignment features
per IGES drawing
Figure 6. Exploded View of Assembly
PCB Assembly Considerations
4. Wave solder the entire assembly in a no-wash solder
process utilizing solder fixture. The solder fixture is
needed to protect the sensor during the solder process.
It also sets the correct sensor-to-PCB distance as the
lead shoulders do not normally rest on the PCB surface.
The fixture should be designed to expose the sensor
leads to solder while shielding the optical aperture
from direct solder contact.
5. Place the lens onto the base plate.
6. Remove the protective kapton tape from optical
aperture of the sensor. Care must be taken to keep
contaminants from entering the aperture. Recommend
not to place the PCB facing up during the entire mouse
assembly process. Recommend to hold the PCB first
vertically for the kapton removal process.
7. Insert PCB assembly over the lens onto the base plate
aligning post to retain PCB assembly. The sensor
aperture ring should self-align to the lens.
6
9. Install mouse top case. There MUST be a feature in
the top case to press down onto the PCB assembly to
ensure all components are interlocked to the correct
vertical height.
ADNS-5090
VDD3
GND
LED
IMAGE ARRAY
DSP
SERIAL PORT AND REGISTERS
3. Insert the LED clip assembly into PCB.
POWER AND CONTROL
2. Insert the LED into the assembly clip and bend the
leads 90 degrees.
8. The optical position reference for the PCB is set by the
base plate and lens. Note that the PCB motion due to
button presses must be minimized to maintain optical
alignment.
LED DRIVE
1. Insert the sensor and all other electrical components
into PCB.
OSCILLATOR
Figure 7. Block diagram of ADNS-5090 optical mouse
NCS
SCLK
MOSI
MISO
MOTION
VDD
P0.6
P0.5
XTALIN
RF
RECEIVER
CIRCUITRY
SHLD
GND
VDD
R
RF
TRANSMITTER
CIRCUITRY
4.7uF
Vbat
(Dual cell)
3
6
Z LED
VDD QB
GND QA
4.7uF
4.7uH
EN
20
VCC
40 pF
P3.2
P3.1
7
Note:
The ADNS-5090 Low Power Optical Mouse Sensor is not designed for use with blue LEDs. The ADNS-4000 product is available from Avago for use with Blue LEDs.
40 pF
M
L
P1.3
P1.4
R
0.1 mF
4.7uF
4.7uF
P1.2
P1.1
P1.0
GND
XTAL1 RST
12 MHz
XTAL2
P1.6
P3.5
P1.7
P1.5
P3.0
21.5k
(1%)
1M
(1%)
4.7 μF
FB 4
Vout 5
P3.4
2.8V
MCU
2
GND
TPS61070
P3.3
Vbat
SW
1
SCLK
MISO
MOTION
8 MOSI
4 NCS
3
5
1
LED
2
SURFACE
ADNS-5110
LENS
*Recommended HLMP-ED80-PQT00 Bin P
ADNS-5090
7
VDD
6
GND
10uF
2.8V
BUTTONS
Recommended Typical Application (Transmitter Side)
Figure 8a. Schematic diagram for interface between ADNS-5090 and microcontroller with HLMP-ED80-PQT00 LED (cordless application)
6 MHz
(OPTIONAL)
XTALOUT
MCU P0.7
with
USB Features
Vreg
GND
1.3 K
D–
D–
SHLD
D+
Vpp
VDD
(5 V)
D+
0.1 μF
Recommended Typical Application (Receiver Side)
HLMP
-ED80*
VDD
P0.6
P0.5
XTALIN
RF
RECEIVER
CIRCUITRY
SHLD
GND
VDD
R
RF
TRANSMITTER
CIRCUITRY
4.7uF
Vbat
(Dual cell)
3
6
Z LED
VDD QB
GND QA
4.7uF
4.7uH
EN
20
VCC
40 pF
P3.2
P3.1
8
Note:
The ADNS-5090 Low Power Optical Mouse Sensor is not designed for use with blue LEDs. The ADNS-4000 product is available from Avago for use with Blue LEDs.
40 pF
M
L
P1.3
P1.4
R
0.1 mF
4.7uF
4.7uF
P1.2
P1.1
P1.0
GND
XTAL1 RST
12 MHz
XTAL2
P1.6
P3.5
P1.7
P1.5
P3.0
21.5k
(1%)
1M
(1%)
4.7 μF
FB 4
Vout 5
P3.4
2.8V
MCU
2
GND
TPS61070
P3.3
Vbat
SW
1
Recommended Typical Application (Transmitter Side)
Figure 8b. Schematic diagram for interface between ADNS-5090 and microcontroller with HLMP-ED80-PST00 LED (cordless application)
6 MHz
(OPTIONAL)
XTALOUT
MCU P0.7
with
USB Features
Vreg
GND
1.3 K
D–
SHLD
D+
D–
Vpp
VDD
(5 V)
D+
0.1 μF
Recommended Typical Application (Receiver Side)
SCLK
MISO
BUTTONS
MOTION
8 MOSI
4 NCS
3
5
1
LED
2
SURFACE
ADNS-5110
LENS
*Recommended HLMP-ED80-PST00
Bin P, Q, R, and S
ADNS-5090
7
VDD
6
GND
10uF
2.8V
HLMP
-ED80*
33Ω
Design Considerations for Improved ESD Performance
Regulatory Requirements
For improved electrostatic discharge performance, typical
creepage and clearance distance are shown in the table
below. Assumption: base plate construction is as per the
Avago Technologies supplied IGES file and ADNS-5110001 lens. Note that the lens material is polycarbonate or
polystyrene HH30. Therefore, cyanoacrylate based adhesives or other adhesives that may damage the lens should
NOT be used.
x Passes FCC B and worldwide analogous emission limits
when assembled into a mouse with shielded cable and
following Avago Technologies recommendations.
x Passes IEC-1000-4-3 radiated susceptibility level when
assembled into a mouse with shielded cable and
following Avago Technologies recommendations.
x UL flammability level UL94 HB.
Typical Distance (mm)
ADNS-5110-001
Creepage
15.43
Clearance
7.77
Table 1. Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Units
Storage Temperature
TS
-40
85
qC
Operating Temperature
TA
-15
55
qC
260
qC
3.7
V
2
kV
All pins
VDD + 0.5
V
All I/O pins
7
mA
MISO pin
Lead Solder Temperature
Supply Voltage
VDD
-0.5
ESD (Human Body Model)
Input Voltage
VIN
Output Current
Iout
-0.5
Notes
For 7 seconds, 1.6mm below seating plane.
Table 2. Recommended Operating Condition
Parameter
Symbol
Min
Max
Units
Operating Temperature
TA
0
Typ.
40
qC
Power Supply Voltage
VDD
2.8
3.0
V
0.005
Notes
Power Supply Rise Time
TRT
100
ms
0 to VDD min
Supply Noise (Sinusoidal)
VNA
100
mVp-p
10kHz –50MHz
Serial Port Clock
Frequency
fSCLK
1
MHz
50% duty cycle
Distance from Lens Reference Plane to Tracking
Surface (Z)
Z
2.3
2.5
mm
Speed
S
0
30
ips
At default frame rate
Acceleration
a
8
G
At run mode
Load Capacitance
Cout
100
pF
MISO
9
2.4
Table 3. AC Electrical Specifications
Electrical characteristics over recommended operating conditions. Typical values at 25 °C, VDD = 2.8 V.
Parameter
Symbol
Motion Delay after
Reset
Min.
Typ.
Max.
Units
Notes
tMOT-RST
50
ms
From RESET register write to valid motion
Forced Rest Enable
tREST-EN
1
s
From Rest Mode(RM) bits set to target rest
mode
Wake from Forced
Rest
tREST-DIS
1
s
From Rest Mode(RM) bits cleared to valid
motion
Power Down
tPD
50
ms
From PD active (when bit 1 of register 0x0d is
set) to low current
Wake from Power
Down
tWAKEUP
55
ms
From PD inactive (when write 0x5a to register 0x3a) to valid motion
MISO Rise Time
tr-MISO
40
200
ns
CL = 100 pF
MISO Fall Time
tf-MISO
40
MISO Delay after
SCLK
tDLY-MISO
50
200
ns
CL = 100 pF
120
ns
From SCLK falling edge to MISO data valid,
no load conditions
MISO Hold Time
thold-MISO
500
ns
Data held until next falling SCLK edge
MOSI Hold Time
thold-MOSI
200
ns
Amount of time data is valid after SCLK rising
edge
MOSI Setup Time
tsetup-MOSI
120
ns
From data valid to SCLK rising edge
SPI Time between
Write Commands
tSWW
30
μs
From rising SCLK for last bit of the first data
byte, Commands to rising SCLK for last bit of
the second data byte
SPI Time between
Write and Read Commands
tSWR
20
μs
From rising SCLK f or last bit of the first data
byte, to rising SCLK for last bit of the second
address byte
SPI Time between
Read and Subsequent
Commands
tSRW
tSRR
250
ns
From rising SCLK for last bit of the first data
byte, to falling SCLK for the first bit of the
next address
SPI Read Address-Data
Delay
tSRAD
4
μs
From rising SCLK for last bit of the address
byte, to falling SCLK for first bit of data being
read
NCS Inactive after Motion Burst
tBEXIT
250
ns
Minimum NCS inactive time after motion
burst before next SPI usage
NCS to SCLK Active
tNCS-SCLK
120
ns
From NCS falling edge to first SCLK falling
edge
SCLK to NCS Inactive
(for Read Operation)
tSCLK-NCS
120
ns
From last SCLK rising edge to NCS rising
edge, for valid MISO data transfer
SCLK to NCS Inactive
(for Write Operation)
tSCLK-NCS
20
μs
From last SCLK rising edge to NCS rising
edge, for valid MOSI data transfer
NCS to MISO high-Z
tNCS-MISO
250
ns
From NCS rising edge to MISO high-Z state
Transient Supply
Current
IDDT
60
mA
Max supply current during a VDD ramp from
0 to VDD
10
1/fSCLK
Table 4. DC Electrical Specifications
Electrical characteristics over recommended operating conditions. Typical values at 25 °C, VDD = 2.8 V.
Parameter
Symbol
DC Supply Current in
Various Mode
Min
Typ.
Max
Units
Notes
IDD_AVG
8.23
20.41
mA
IDD_REST1
0.79
1.65
mA
Average run current, including LED current,
at max frame rate. No load on MISO
IDD_REST2
0.08
0.18
mA
IDD_REST3
0.026
0.054
mA
Power Down Current
0.5
Input Low Voltage
VIL
Input High Voltage
VIH
Input Hysteresis
VI_HYS
200
r1
Input leakage current
Ileak
Output Low Voltage
VOL
Output High Voltage
VOH
Input Capacitance
Cin
11
PA
10
Vdd-0.5
Vdd-0.7
50
V
SCLK, MOSI, NCS
V
SCLK, MOSI, NCS
mV
SCLK, MOSI, NCS
r10
PA
Vin=VDD-0.6V, SCLK, MOSI, NCS
0.7
V
Iout=1mA, MISO, MOTION
V
Iout=-1mA, MISO, MOTION
pF
MOSI, NCS, SCLK
Typical Performance Characteristics
Mean Resolution (CPI)
1200
White
Paper
Spruce
Wood
1100
1000
900
Manila
Black
Formica
White
Formica
800
700
600
500
1.6 1.7 1.8 1.9
2
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9
3
3.1 3.2 3.3 3.4
Distance from Lens Reference Plane to Tracking Surface - Z (mm)
Maximum Distance (mouse count)
Figure 9. Typical path deviation.
20
18
16
14
12
10
8
6
4
2
0
Manila
White
Paper
Black
Formica
White
Formica
Spruce
Wood
1.6 1.7 1.8 1.9
2
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4
Distance from Lens Reference Plane to Tracking Surface - Z (mm)
Figure 10. Mean resolution vs. distance from lens reference plane to surface.
1
0.9
0.8
Normalized Response
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
400
500
600
Figure 11. Relative wavelength responsivity.
12
700
Wavelength (nm)
800
900
1000
Synchronous Serial Port
Power Management Modes
The synchronous serial port is used to set and read parameters in the ADNS-5090, and to read out the motion
information. The port is a four wire serial port. The host
micro-controller always initiates communication; the
ADNS-5090 never initiates data transfers. SCLK, MOSI, and
NCS may be driven directly by a micro-controller. The port
pins may be shared with other SPI slave devices. When the
NCS pin is high, the inputs are ignored and the output is
at tri-state.
The ADNS-5090 has three power-saving modes. Each
mode has a different motion detection period with its respective response time to mouse motion. Response Time
is the time taken for the sensor to ‘wake up’ from rest mode
when motion is detected. When left idle, the sensor automatically changes or downshift from Run mode to Rest1,
to Rest2 and finally to Rest3 which consumes the least current. Do note that current consumption is the lowest at
Rest3 and highest at Rest1, however time required for sensor to respond to motion from Rest1 is the shortest and
longest from Rest3. Downshift Time is the elapsed time
(under no motion condition) from current mode to the
next mode for example, it takes 10s for the sensor that is
in Rest1 to change to Rest2. The typical response time and
downshift time for each mode is shown in the following
table. However, user can change the default time setting
for each mode via register 0x0e through 0x13.
The lines that comprise the SPI port:
SCLK: Clock input. It is always generated by the master
(the micro-controller).
MOSI: Input data. (Master Out/Slave In)
MISO: Output data. (Master In/Slave Out)
NCS: Chip select input (active low). NCS needs to be low
to activate the serial port; otherwise, MISO will be high Z,
and MOSI & SCLK will be ignored. NCS can also be used to
reset the serial port in case of an error.
Chip Select Operation
The serial port is activated after NCS goes low. If NCS is
raised during a transaction, the entire transaction is
aborted and the serial port will be reset. This is true for all
transactions. After a transaction is aborted, the normal address-to-data or transaction-to-transaction delay is still required before beginning the next transaction. To improve
communication reliability, all serial transactions should
be framed by NCS. In other words, the port should not remain enabled during periods of non-use because ESD and
EFT/B events could be interpreted as serial communication and put the chip into an unknown state. In addition,
NCS must be raised after each burst-mode transaction is
complete to terminate burst-mode. The port is not available for further use until burst-mode is terminated.
‘Smart’ LED Current Switching
ADNS-5090 is designed with ‘smart’ LED feature, an auto or
self-adjusting LED current switching between the low and
high current settings depending on the brightness of the
tracking surface. If the surface is sufficiently bright to the
sensor, lower LED current will be selected. When tracking
on a darker surface, the higher current setting will be used.
This feature is one of the power saving features in this sensor controlled by AUTO_LED_CTRL register (0x43).
13
Mode
Response Time
(Typical)
Downshift Time
(Typical)
Rest 1
10ms
<1s
Rest 2
100 ms
9s
Rest 3
500 ms
430s
Another feature in ADNS-5090 that can be used to optimize the power consumption of the optical mouse system
is the Motion Interrupt Output or MOTION pin (pin 3). It allows the host controller to be in sleep mode (or lowest operating current mode) when there is no motion detected
after some time instead of consistently be in active mode
and polling motion data from the sensor. When motion is
detected, the sensor will send the motion interrupt signal
through pin 3 to the controller to wake it up from sleep
mode to resume its motion detection routine for navigation position and direction update.
MOTION Detection Routine
Typically in the motion detection routine, MCU will poll
the sensor for valid motion data by checking on the MOTION_ST bit in MOTION_ST register. If MOTION_ST bit is
set, motion data in DELTA_X and DELTA_Y is valid and
ready to be read by the MCU.
MOTION Function
MOTION output signal (pin 3) can be used as interrupt input to the microcontroller of the mouse to trigger the controller
to read the motion data from the sensor whenever there is motion detected by the sensor. The MOTION signal can be
configured to be level or edge triggered, active high or low by setting the bits in MOTION_CTRL register.
For active high level-triggered configuration, the MOTION pin level will be driven high as long the MOTION bit in register
0x02 is set and there is motion data in DELTA_X and DELTA_Y registers ready to be read by the microcontroller. Once all
the motion data has been read, DELTA_X and DELTA_Y values become zero, MOTION bit is reset and the MOTION pin
level is driven low.
For active high edge-triggered configuration, a pulse of 230us will be sent through the MOTION pin when there is motion detected by the sensor during rest modes. The pulse can be used as interrupt input to activate the microcontroller
from its sleep mode to enter into run mode to start polling the sensor for motion data by monitoring MOTION_ST bit
(set whenever there is valid motion data) in MOTION register (0x02) and reading DELTA_X and DELTA_Y registers until
MOTION_ST bit is reset.
Write Operation
Write operation, defined as data going from the micro-controller to the ADNS-5090, is always initiated by the micro-controller and consists of two bytes. The first byte contains the address (seven bits) and has a “1” as its MSB to indicate write
sequence. The second byte contains the data. The ADNS-5090 reads MOSI on rising edges of SCLK.
NCS
1
2
3
4
5
6
7
8
9
10
11
12
13
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
14
15
16
1
2
SCLK
MOSI
1
MISO
MOSI DRIVEN BY MICRO-CONTROLLER
Figure 12. Write Operation
MOSI setup and hold time during write operation
SCLK
MOSI
thold, MOSI
tsetup, MOSI
Figure 13. MOSI setup
14
D2
D1
D0
1
A6
Read Operation
A read operation, defined as data going from the ADNS-5090 to the micro-controller, is always initiated by the microcontroller and consists of two bytes. The first byte contains the address, is sent by the micro-controller over MOSI, and
has a “0” as its MSB to indicate data direction. The second byte contains the data and is driven by the ADNS-5090 over
MISO. The sensor outputs MISO bits on falling edges of SCLK and samples MOSI bits on every rising edge of SCLK.
NCS
SCLK
CYCLE #
1
2
3
4
5
6
7
A6
A5
A4
A3
A2
A1
8
9
10
11
12
13
14
15
16
SCLK
1
MOSI
A0
D7
MISO
D6
D5
D4
D3
D2
D1
D0
tSRAD DELAY
Figure 14. Read Operation
MOSI delay and hold time during read operation
SCLK
tHOLD-MISO
tDLY-MISO
D0
MISO
Figure 15. MISO delay
NOTE: The 500 ns minimum high state of SCLK is also the minimum MISO data hold time of the ADNS-5090. Since the falling edge of SCLK is actually
the start of the next read or write command, the ADNS-5090 will hold the state of data on MISO until the falling edge of SCLK.
Required Timing between Read and Write Commands
There are minimum timing requirements between read and write commands on the serial port.
Timing between Two Write Commands
If the rising edge of the SCLK for the last data bit of the second write command occurs before the required delay (tsww),
then the first write command may not complete correctly.
tSWW
SCLK
ADDRESS
DATA
WRITE OPERATION
Figure 16. Timing between Two Write Commands
15
ADDRESS
DATA
WRITE OPERATION
Timing between Write and Read Commands
If the rising edge of SCLK for the last address bit of the read command occurs before the required delay (tSWR), the write
command may not complete correctly.
tSWR
•••
SCLK
ADDRESS
DATA
ADDRESS
•••
WRITE OPERATION
NEXT READ OPERATION
Figure 17. Timing between Write and Read Commands
Timing between Read and Subsequent Write or Read Commands
During a read operation SCLK should be delayed at least tSRAD after the last address data bit to ensure that the ADNS5090 has time to prepare the requested data. The falling edge of SCLK for the first address bit of either the read or write
command must be at least tSRR or tSRW after the last SCLK rising edge of the last data bit of the previous read operation.
tSRW & tSRR
tSRAD
•••
SCLK
ADDRESS
DATA
ADDRESS
•••
READ OPERATION
NEXT READ
or WRITE OPERATION
Figure 18. Timing between Read and Subsequent Write or Read Commands
Motion Burst Timing
tSRAD
•••
SCLK
MOTION_BURST REGISTER ADDRESS
READ FIRST BYTE
•••
FIRST READ OPERATION
Figure 19. Motion Burst Timing
16
READ SECOND BYTE
READ THIRD BYTE
Burst Mode Operation
Pin
During Reset
After Reset
Burst mode is a special serial port operation mode that
may be used to reduce the serial transaction time for a
motion read. The speed improvement is achieved by continuous data clocking to or from multiple registers without the need to specify the register address, and by not
requiring the normal delay period between data bytes.
NCS
MISO
SCLK
MOSI
XY_LED
Ignored
Low
Ignored
Ignored
High
Functional
Depends on NCS
Depends on NCS
Depends on NCS
Functional
Burst mode is initiated by reading the MOTION_BURST
register (0x63). The ADNS-5090 will respond with the contents of the DELTA_X, DELTA_Y, SQUAL, SHUT_HI, SHUT_
LO, and PIX_MAX and PIX_ACCUM registers in that order.
The burst transaction can be terminated anywhere in the
sequence after the DELTA_Y value by bringing the NCS pin
high. The default “Read First Byte” is DELTA_X content and
is specified in register 0x42 (BURST_READ_FIRST). The address that specifies the “Read First Byte” can be changed
to address 0x00 – 0x02 (PROD_ID – MOTION_ST) or 0x05
– 0x08 (SQUAL – PIX_MAX) by writing to register 0x42.
After reading the MOTION_BURST address (0x63), the microcontroller must wait tSRAD before starting to read the
continuous data bytes. All data bits can be read with no
delay between bytes by driving SCLK at the normal rate.
The data are latched into the output buffer after the last
address bit is received. After the burst transmission is
complete, the micro-controller must raise the NCS line for
at least tBEXIT to terminate burst mode. The serial port is
not available for use until it is reset with NCS, even for a
second burst transmission.
Prior to reading MOTION_BURST register (0x63), MOTION_
ST bit in MOTION_ST register (0x02) should be read. Alternatively, read MOTION_BURST register (0x63) only after
MOTION pin is triggered.
Avago Technologies highly recommends the usage of
burst mode operation in optical mouse sensor design applications.
Power Up Reset
Although ADNS-5090 does have an internal power up self
reset circuitry, it is still highly recommended to follow the
power up sequence below:
i. Apply power
ii. Drive NCS high, then low to reset the SPI port.
iii. Write 0x5a to register 0x3a.
Reset
ADNS-5090 can be reset by writing 0x5a to register 0x3a.
A full reset will thus be executed and any register settings
must be reloaded. The table below shows the state of the
various pins during reset.
State of Signal Pins after VDD is Valid
17
Power Down
The ADNS-5090 can be set to Power Down mode by writing 0x02 to register 0x0d to disable the sensor. In addition, the SPI port should not be accessed during power
down. Other ICs on the same SPI bus can be accessed, as
long as the sensor’s NCS pin is not asserted. The table below shows the state of various pins during power down.
To exit Power Down, write 0x5a to register 0x3a to reset
the sensor in order to wake it up. A full reset will thus be
executed. Wait tWAKEUP before accessing the SPI port. Any
register settings must then be reloaded.
Pin
During Power Down
MOTION
NCS
MISO
SCLK
MOSI
XY_LED
Undefined
Functional*
Undefined
Functional*
Functional*
Low current
Notes:
* NCS pin must be held to 1 (HIGH) if SPI bus is shared with other
devices. It can be in either state if the sensor is the only device in
connected to the host micro-controller.
* Reading of registers should only be performed after exiting from the
power down mode. Any read operation during power down will not
reflect the actual data of the registers.
Lift Detection Cutoff Algorithm
When the mouse is raised from the tracking surface which
is also known as lifted condition, there is a specific z-height
whereby the tracking of the sensor will cease. However
the tracking cutoff height of the ADNS-5090 sensor varies
with the different tracking surfaces. In general to have a
lower tracking cutoff height than the default settings, below is the recommended algorithm illustrated in the form
of a pseudo code.
Registers
The ADNS-5090 registers are accessible via the serial port. The registers are used to read motion data and status as well
as to set the device configuration.
Address
Register Name
Register Description
Read/Write
Default Value
0x00
PROD_ID
Product ID
R
0x29
0x01
REV_ID
Revision ID
R
0x01
0x02
MOTION_ST
Motion Status
R
0x00
0x03
DELTA_X
Delta_X
R
0x00
0x04
DELTA_Y
Delta_Y
R
0x00
0x05
SQUAL
Squal Quality
R
0x00
0x06
SHUT_HI
Shutter Open Time (Upper 8-bit)
R
0x01
0x07
SHUT_LO
Shutter Open Time (Lower 8-bit)
R
0x00
0x08
PIX_MAX
Maximum Pixel Value
R
0x00
0x09
PIX_ACCUM
Average Pixel Value
R
0x00
0x0a
PIX_MIN
Minimum Pixel Value
R
0x00
0x0b
PIX_GRAB
Pixel Grabber
R/W
0x00
0x0d
MOUSE_CTRL
Mouse Control
R/W
0x01
0x0e
RUN_DOWNSHIFT
Run to Rest1 Time
R/W
0x46
0x0f
REST1_PERIOD
Rest1 Period
R/W
0x00
0x10
REST1_DOWNSHIFT
Rest1 to Rest2 Time
R/W
0x4f
0x11
REST2_PERIOD
Rest2 Period
R/W
0x09
0x12
REST2_DOWNSHIFT
Rest2 to Rest3 Time
R/W
0x2f
0x13
REST3_PERIOD
Rest3 Period
R/W
0x31
0x21
MOUSE_CTRL_EN
Mouse Control Enable Register
W
0x00
0x35
FRAME_IDLE
Frame Idle Setting
R/W
0xf0
0x3a
RESET
Reset
W
0x00
0x3f
NOT_REV_ID
Inverted Revision ID
R
0xfe
0x40
LED_CTRL
LED Control
R/W
0x00
0x41
MOTION_CTRL
Motion Control
R/W
0x40
0x42
BURST_READ_FIRST
Burst Read Starting Register
R/W
0x03
0x43
AUTO_LED_CTRL
AUTO LED Control
R/W
0x08
0x45
REST_MODE_CONFIG
Rest Mode Configuration
R/W
0x00
0x63
MOTION_BURST
Burst Read
R
0x00
18
PROD_ID
Address: 0x00
Product ID Register
Access: Read
Reset Value: 0x29
Bit 7
Field PID7
6
5
4
3
2
1
0
PID6
PID5
PID4
PID3
PID2
PID1
PID0
Data Type:
8-Bit unsigned integer
USAGE:
This register contains a unique identification assigned to the ADNS-5090. The value in this
register does not change; it can be used to verify that the serial communications link is
functional. If using this register to verify serial communications link during rest modes, please
read following registers in this sequence: 0x00, 0x02, 0x03, 0x04, 0x00 (regardless of register
0x02’s status). If both or either one of the read 0x00 value is correct, no additional action is
required as the serial communication link is good. Only if both read 0x00 value attempts are
wrong, perform a reset operation to the sensor to restore the serial communications link.
Note: Highly recommended to use Motion pin function during rest modes for motion detection.
REV_ID
Address: 0x01
Revision ID Register
Access: Read
Reset Value: 0x01
Bit 7
Field RID7
6
5
4
3
2
1
0
RID6
RID5
RID4
RID3
RID2
RID1
RID0
Data Type:
8-Bit unsigned integer
USAGE:
This register contains the IC revision. It is subject to change when new IC versions are
released.
MOTION_ST
Address: 0x02
Motion Status Register
Access: Read/Write
Reset Value: 0x00
Bit 7
Field MOTION_ST
6
5
4
3
2
1
0
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
Data Type: Bit field.
USAGE:
Register 0x02 allows the user to determine if motion has occurred since the last time it was
read. If the MOTION_ST bit is set, then the user should read registers 0x03 (DELTA_X) and 0x04
(DELTA_Y) to get the accumulated motion data. Read this register before reading the DELTA_X
and DELTA_Y registers. Writing any data into this register clears MOTION_ST bit, DELTA_X and
DELTA_Y registers. However the written data byte will not be saved.
Bit
Field Name
7
MOTION_ST
Description
Motion detected since last report
0 = No motion (default)
1 = Motion occurred, data in DELTA_X and DELTA_Y registers ready to be
read
6-0
19
RSVD
Reserved
DELTA_X
Address: 0x03
X Displacement Register
Access: Read
Reset Value: 0x00
Bit 7
6
5
4
3
2
1
0
Field X7
X6
X5
X4
X3
X2
X1
X0
Data Type:
Eight bit 2’s complement number.
USAGE:
X-axis movement in counts since last report. Absolute value is determined by resolution.
Reading this register clears the content of this register.
MOTION
-128
-127
-2
-1
0
+1
+2
+126
+127
DELTA_X
80
81
FE
FF
00
01
02
7E
7F
NOTE: Registers 0x03 and 0x04 MUST be read consecutively.
DELTA_Y
Address: 0x04
Y Displacement Register
Access: Read
Reset Value: 0x00
Bit 7
6
5
4
3
2
1
0
Field Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Data Type: Eight bit 2’s complement number.
USAGE:
Y-axis movement in counts since last report. Absolute value is determined by resolution.
Reading this register clears the content of this register.
MOTION
-128
-127
-2
-1
0
+1
+2
+126
+127
DELTA_Y
80
81
FE
FF
00
01
02
7E
7F
NOTE: Avago RECOMMENDS that registers 0x03 and 0x04 be read consecutively.
20
SQUAL
Address: 0x05
Squal Quality Register
Access: Read
Reset Value: 0x00
Bit 7
Field SQ7
6
5
4
3
2
1
0
SQ6
SQ5
SQ4
SQ3
SQ2
SQ1
SQ0
Data Type:
Upper 8 bits of a 9-bit unsigned integer.
USAGE:
SQUAL (Surface Quality) is a measure of the number of valid features visible by the sensor in
the current frame.
The maximum SQUAL register value is 128. Since small changes in the current frame can result
in changes in SQUAL, variations in SQUAL when looking at a surface are expected. The graph
below shows 800 sequentially acquired SQUAL values, while a sensor was moved slowly over
white paper. SQUAL is nearly equal to zero, if there is no surface below the sensor. SQUAL is
typically maximized when the navigation surface is at the optimum distance from the imaging
lens (the nominal Z-height).
60
Squal value
50
40
30
20
10
1
30
59
88
117
146
175
204
233
262
291
320
349
378
407
436
465
494
523
552
581
610
639
668
697
726
755
784
0
Count
Figure 20. Squal values (white paper)
60
Avg-3sigma
Avg
Avg+3sigma
Squal count
50
40
30
20
10
0
-10
1.6
1.8
2
2.2
2.4
2.6
2.8
3
Distance from Lens Reference Plane to Tracking Surface - Z (mm)
Figure 21. Mean squal vs. Z (White Paper)
21
3.2
SHUT_HI
Address: 0x06
Shutter Open Time (Upper 8-bits) Register
Access: Read
Reset Value: 0x01
Bit 7
Field S15
SHUT_LO
6
5
4
3
2
1
0
S14
S13
S12
S11
S10
S9
S8
Address: 0x07
Shutter Open Time (Lower 8-bits) Register
Access: Read
Reset Value: 0x00
Bit 7
6
5
4
3
2
1
0
Field S7
S6
S5
S4
S3
S2
S1
S0
Sixteen bit unsigned integer.
USAGE:
Units are in clock cycles. Read SHUT_HI first, then SHUT_LO. They should be read consecutively.
The shutter is adjusted to keep the average and maximum pixel values within normal operating
ranges. The shutter value is automatically adjusted.
500
450
400
350
300
250
200
150
100
50
0
1
28
55
82
109
136
163
190
217
244
271
298
325
352
379
406
433
460
487
514
541
568
595
622
649
676
703
730
757
784
Shutter value
Data Type:
Count
Shutter value
Figure 22. Shutter (white paper).
600
550
500
450
400
350
300
250
200
150
100
50
0
Avg-3sigma
Avg
Avg+3sigma
1.6
1.8
2
2.2
2.4
2.6
2.8
3
3.2
Distance from Lens Reference Plane to Tracking Surface - Z (mm)
Figure 23. Mean shutter vs. Z (white paper).
22
PIX_MAX
Address: 0x08
Maximum Pixel Value Register
Access: Read
Reset Value: 0x00
Bit 7
Field MP7
6
5
4
3
2
1
0
MP6
MP5
MP4
MP3
MP2
MP1
MP0
Data Type:
Eight-bit number.
USAGE:
Store the highest pixel value in current frame. Minimum value = 0, maximum value = 255. The
highest pixel value may vary with different frame.
PIX_ACCUM
Address: 0x09
Average Pixel Value Register
Access: Read
Reset Value: 0x00
Bit 7
Field AP7
6
5
4
3
2
1
0
AP6
AP5
AP4
AP3
AP2
AP1
AP0
Data Type:
High 8-bits of an unsigned 16-bit integer.
USAGE:
This register stores the accumulated pixel value of the last image taken. This register can be
used to find the average pixel value, where Average Pixel = (register value AP[7:0]) * 0.71
The maximum accumulated value is 45847 but only bits [15:8] are reported, therefore the
maximum register value is 179. The minimum is 0. The PIX_ACCUM value may vary with
different frame.
PIX_MIN
Address: 0x0a
Minimum Pixel Value Register
Access: Read
Reset Value: 0x00
Bit 7
Field MP7
6
5
4
3
2
1
0
MP6
MP5
MP4
MP3
MP2
MP1
MP0
Data Type:
Eight-bit number.
USAGE:
Store the lowest pixel value in current frame. Minimum value = 0, maximum value = 127. The
minimum pixel value may vary with different frame.
23
PIX_GRAB
Address: 0x0b
Pixel Grabber Register
Access: Read/Write
Reset Value: 0x00
Bit 7
Field PG_VALID
6
5
4
3
2
1
0
PG6
PG5
PG4
PG3
PG2
PG1
PG0
Data Type:
Eight bit word.
USAGE:
The pixel grabber captures 1 pixel per frame. Bit-7 (MSB) of this register will be set to indicate
that the 7-bit pixel data (PG[6:0]) is valid for grabbing. In a 19x19 pixel array, it will take 361
read operations to grab all the pixels to form the complete image.
Bit(s)
Field Name
Description
7
PG_VALID
Pixel Grabber Valid
6:0
PG[6:0]
Pixel Data
NOTE: Any write operation into this register will reset the grabber to origin (pixel 0 position). The sensor should not be
moved before the 361 read operations are completed to ensure original data is grabbed to produce good (uncorrupted)
image.
19x19 Pixel Array Address Map – (View from top of sensor)
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
Last 360
24
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
0 First
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Top X-ray View of Mouse
Button
Left
Button
Right
Positive Y
Pin 1
LED
Positive X
MOUSE_CTRL
Address: 0x0d
Mouse Control Register
Access: Read/Write
Reset Value: 0x01
Bit 7
Field RSVD
6
5
4
3
2
1
0
RSVD
RES_EN
RES2
RES1
RES0
PD
RES_D
Data Type: Bit field
USAGE: Resolution and chip reset information can be accessed or to be edited by this register.
Bit(s)
Field Name
Description
7:6
RSVD
Reserved
5
RES_EN
Enable resolution settings set on
MOUSE_CTRL [4:2]
4:2
RES [2:0]
Resolution
000: 1000 dpi (default)
001: 250 dpi
010: 500 dpi
011: 1250 dpi
100: 1500 dpi
101: 1750 dpi
1
PD
Power Down
0
RES_D
0: 500 dpi
1: 1000 dpi (default)
NOTE:
1. Setting MOUSE_CTRL [5] bit to ‘1’ will supersede and ignore MOUSE_CTRL [0] setting.
2. Each read/write operation of this register should be followed by a write operation: write register 0x21 with 0x10.
RUN_DOWNSHIFT
Address: 0x0e
Run to Rest1 Time Register
Access: Read/Write
Reset Value: 0x46
Bit 7
Field RUD7
6
5
4
3
2
1
0
RUD6
RUD5
RUD4
RUD3
RUD2
RUD1
RUD0
Data Type:
Eight bit number
USAGE:
This register sets the Run to Rest1 mode downshift time. The time is the value of this register
multiply by 16 frames. Min value for this register must be 1.
For example at typical frame rate of 2250fps, each frame period is about 444us. Therefore the
run downshift time would be Register value (0x46) * 16 * frame period = 70 * 16 * 444us =
497.3ms
25
REST1_PERIOD
Address: 0x0f
Rest1 Period Register
Access: Read/Write
Reset Value: 0x00
Bit 7
Field R1P7
6
5
4
3
2
1
0
R1P6
R1P5
R1P4
R1P3
R1P2
R1P1
R1P0
Data Type:
Eight bit number
USAGE:
This register sets the Rest1 period. Period = (register value R1P [7:0] +1) x 7ms (typical slow
clock period). Min value for this register is 0. Max value is 0xFD.
NOTE:
Writing into this register when the sensor itself is operating in this rest mode may result in
unexpected behavior of the sensor. To avoid this from happening, below commands should
be incorporated prior and after the write command into this register.
w 22 80 -> write 0x80H into register 0x22H prior to writing into this register
w 0f XX -> writing into this register
w 22 00 -> write 0x00H into register 0x22H after writing into this register
REST1_DOWNSHIFT
Address: 0x10
Rest1 to Rest2 Downshift Time Register
Access: Read/Write
Reset Value: 0x4f
Bit 7
Field R1D7
6
5
4
3
2
1
0
R1D6
R1D5
R1D4
R1D3
R1D2
R1D1
R1D0
Data Type:
Eight bit number
USAGE:
This register sets the Rest1 to Rest2 mode downshift time. Time = (register value R1D [7:0]) x
(Rest1 period) x 16. Min value for this register is 0.
REST2_PERIOD
Address: 0x11
Rest2 Period Register
Access: Read/Write
Reset Value: 0x09
Bit 7
Field R2P7
6
5
4
3
2
1
0
R2P6
R2P5
R2P4
R2P3
R2P2
R2P1
R2P0
Data Type:
Eight bit number
USAGE:
This register sets the Rest2 period. Period = (register value R2P [7:0] +1) x 7ms (typical slow
clock period). Min value for this register is 0. Max value is 0xFD.
NOTE:
Writing into this register when the sensor itself is operating in this rest mode may result in
unexpected behavior of the sensor. To avoid this from happening, below commands should
be incorporated prior and after the write command into this register.
w 22 80 -> write 0x80H into register 0x22H prior to writing into this register
w 11 XX -> writing into this register
w 22 00 -> write 0x00H into register 0x22H after writing into this register
26
REST2_DOWNSHIFT
Address: 0x12
Rest2 to Rest3 Downshift Time Register
Access: Read/Write
Reset Value: 0x2f
Bit 7
Field R2D7
6
5
4
3
2
1
0
R2D6
R2D5
R2D4
R2D3
R2D2
R2D1
R2D0
Data Type:
Eight bit number
USAGE:
This register sets the Rest1 to Rest2 mode downshift time. Time = (register value R2D [7:0] ) x
(Rest2 period) x 128. Min value for this register is 0.
REST3_PERIOD
Address: 0x13
Rest3 Period Register
Access: Read/Write
Reset Value: 0x31
Bit 7
Field R3P7
6
5
4
3
2
1
0
R3P6
R3P5
R3P4
R3P3
R3P2
R3P1
R3P0
Data Type
Eight bit number
USAGE:
This register sets the Rest3 period. Period = (register value R3P [7:0] +1) x 7ms (typical slow
clock period). Min value for this register is 0. Max value is 0xFD.
NOTE:
Writing into this register when the sensor itself is operating in this rest mode may result in
unexpected behavior of the sensor. To avoid this from happening, below commands should
be incorporated prior and after the write command into this register.
w 22 80 -> write 0x80H into register 0x22H prior to writing into this register
w 13 XX -> writing into this register
w 22 00 -> write 0x00H into register 0x22H after writing into this register
MOUSE_CTRL_EN
Address: 0x21
Mouse Control Enable Register
Access: Write
Reset Value: 0x00
Bit
7
6
5
4
3
2
1
0
Field
MCE7
MCE6
MCE5
MCE4
MCE3
MCE2
MCE1
MCE0
Data Type:
Eight bit unsigned integer.
USAGE:
Write 0x10 to this register after accessing register 0x0d to complete read/write operations.
27
FRAME_IDLE
Address: 0x35
Frame Idle Setting Register
Access: Read/Write
Reset Value: 0xf0
Bit 7
6
5
4
3
2
1
0
Field 1
1
FR5
FR4
FR3
FR2
FR1
FR0
Data Type:
Eight bit unsigned integer.
USAGE :
This register is used to control the frame rate. The value in this register is used to add frame
idling time, which effectively reduces the frame rate..
frame_idle_time (in clock counts) = (register value) * 32
Frame period (in clock counts) = shutter_time (reg 0x06 and reg 0x07) + (3400 clocks) +
frame_idle_time
When this register is set to 0xf0, the typical frame rate is about 2250 fps @26MHz
RESET
Address: 0x3a
Reset Register
Access: Write
Reset Value: 0x00
Bit 7
Field RST7
6
5
4
3
2
1
0
RST6
RST5
RST4
RST3
RST2
RST1
RST0
Data Type:
Eight bit unsigned integer.
USAGE:
This register is used as chip reset by writing 0x5a into this register.
28
NOT_REV_ID
Address: 0x3f
Inverted Revision ID Register
Access: Read
Reset Value: 0xfe
Bit 7
Field RRID7
6
5
4
3
2
1
0
RRID6
RRID5
RRID4
RRID3
RRID2
RRID1
RRID0
Data Type:
Eight bit unsigned integer
USAGE:
This register contains the inverse of the revision ID which is located at register 0x01.
LED_CTRL
Address: 0x40
LED Control Register
Access: Read/Write
Reset Value: 0x00
Bit 7
Field RSVD
6
5
4
3
2
1
0
RSVD
RSVD
RSVD
LCOF
RSVD
LSEL1
LSEL0
Data Type:
Eight bit unsigned integer
USAGE:
This register is used to control the LED operating mode and current to optimize/minimize the
power consumption.
Bit
Field Name
Description
7:4
RSVD
Reserved
3
LCOF
0 : Normal operation (default)
1 : LED Continuous Off
2
RSVD
Reserved
1:0
LSEL[1:0]
0x0: LED Current set to 20mA (default)
0x1: LED Current set to 15mA
0x2: LED Current set to 36mA
0x3: LED Current set to 30mA
NOTE:
29
If LED is operating in AUTO current switching mode (AUTO_LED_CONTROL [0] at address
0x43 is cleared, LED current setting (LED_CONTROL [1:0]) will be ignored. Only when AUTO
current switching is disabled through setting AUTO_LED_CONTROL [0], the LED drive current
is determined by LED_CONTROL [1:0]
MOTION_CTRL
Address: 0x41
Motion Control Register
Access: Read/Write
Reset Value: 0x40
Bit 7
Field MOT_A
6
5
4
3
2
1
0
MOT_S
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
Data Type:
Eight bit unsigned integer
USAGE:
This register is used to set the feature of MOTION interrupt output. If MOT_S bit is clear, the
MOTION pin is level-sensitive. With active low (MOT_A bit is clear) level-sensitive configuration,
the MOTION pin will be driven low when there is motion detected indicating there is motion
data in DELTA_X and DELTA_Y registers. The mouse microcontroller can read MOTION_ST
register, DELTA_X register, and then DELTA_Y register sequentially. After all the motion data
has been read, DELTA_X and DELTA_Y registers will be zero, the MOTION pin will be driven
high by the sensor.
If MOT_S is set, the MOTION pin is edge sensitive. If MOT_A is also set, it means active high or
rising edge triggered. Whenever there is motion detected by the sensor, a pulse (~230us) will
be sent out through this pin. This pulse can be used to trigger or wake the controller up from
its sleep mode to read motion data from the sensor. The controller can then read MOTION_ST
register, DELTA_X register, and then DELTA_Y register sequentially. (Refer to Motion Function
for more information)
Bit
Field Name
Description
7
MOT_A
MOTION Active
0 : LOW (default)
1 : HIGH
6
MOT_S
MOTION Sensitivity
0 : Level sensitive
1 : Edge sensitive (default)
5:0
RSVD
BURST_READ_FIRST
Reserved
Address: 0x42
Burst Read Starting Address Register
Access: Read/Write
Bit 7
Field BM7
Reset Value: 0x03
6
5
4
3
2
1
0
BM6
BM5
BM4
BM3
BM2
BM1
BM0
Data Type:
Eight bit unsigned integer
USAGE:
This register provides the starting register address the sensor will read during Burst Mode. For
more information, refer to Burst Mode Operation.
Note: To change the burst mode starting address from default (DELTA_X or 0x03) pull the NCS
low, set the BURST_READ_FIRST register with the burst mode starting address, read register
0x63 for burst reads, and terminate the burst reads by pulling NCS high. This must be repeated
each time when performing burst reads with address other than default.
30
AUTO_LED_CTRL
Address: 0x43
AUTO LED Control
Access: Read/Write
Reset Value: 0x08
Bit 7
Field RSVD
6
5
4
3
2
1
0
RSVD
RSVD
RSVD
LED_HI [1]
LED_HI [0]
LED_LO
A_LED_DIS
Data Type:
Eight bit unsigned integer
USAGE:
This register enables AUTO LED current switching. This is a ‘smart’ LED feature whereby the
LED current is self adjusting between the low and high current settings (bit 3:1) according to
the brightness of the tracking surface if this feature is enabled (via clearing bit 0). The brighter
the surface, the lower the LED current will be. If A_LED_DIS (bit 0) is set, this means AUTO
LED mode is disabled, then the LED current is determined by LSEL[1:0] setting in LED_CTRL
register (0x40).
Bit
Field Name
Description
7:4
RSVD
Reserved
3:2
LED_HI [1:0]
AUTO LED High Current
0x0: Auto LED high current is 15mA
0x1: Auto LED high current is 20mA
0x2: Auto LED high current is 30mA (default)
0x3: Auto LED high current is 36mA
1
LED_LO
AUTO LED Low Current
0: Auto LED low current is 15mA (default)
1: Auto LED low current is 20mA
0
A_LED_DIS
AUTO LED Disable
0: AUTO LED enabled (default)
1: AUTO LED disabled
Note: When AUTO LED is enabled, the AUTO LED current will be switched between low and
high current setting determined by LED_LO and LED_HI [1:0]. If LED_LO current setting is
higher than the LED_HI, the current will be based on the higher setting. For example if LED_
LO is 20mA and LED_HI is 15mA, the AUTO LED current will be fixed at 20mA.
31
REST_MODE_CONFIG
Address: 0x45
Rest Mode Configuration Register
Access: Read/Write
Reset Value: 0x00
Bit 7
Field RM1
6
5
4
3
2
1
0
RM0
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
Data Type:
Eight bit unsigned integer
USAGE:
This register is used to set the operating mode of the ADNS-5090.
Bit
Field Name
Description
7:6
RM[1:0]
Sensor Operating Mode
0x00: Normal (default)
0x01: Rest 1
0x02: Rest 2
0x03: Rest 3
5:0
RSVD
Reserved
Read operation to REST_MODE_CONFIG indicates which mode the sensor is in. Write operation
into this register will force the sensor into rest modes (Rest 1, 2 or 3). Write the value 0x40 into
0x45 register to force sensor into Rest 1, 0x80 to Rest 2 or 0xC0 to Rest 3. To get out of any
forced rest mode, write 0x00 into this register to set back to normal mode.
Note: Write 0x00 to register 0x22 during start up sensor initialization to enable configuration
to this register.
MOTION_BURST
Address: 0x63
Burst Read Register
Access: Read
Reset Value: 0x00
Bit 7
Field MB7
6
5
4
3
2
1
0
MB6
MB5
MB4
MB3
MB2
MB1
MB0
Data Type:
Various.
USAGE:
This register is used to enable burst mode. Burst is initiated by a read of this register, which
will then return continuous data starting from the address stored in BURST_READ FIRST
register through register 0x09. If burst operation is not terminated at this point, the internal
address counter stops incrementing and register 0x09 value will be returned repeatedly. Burst
operation is terminated when NCS is asserted high. For more information, refer to Burst Mode
Operation.
周国庆
For product information and a complete list of distributors, please go to our web site:
数字签名人 周国庆
DN:cn=周国庆,c=CN-中国,o=亚讯科技(香港)有限公司,ou=SZBU3,email=david.
zhou@asiacom.cn
日期:2010.07.08 21:39:32 +08'00'
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Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved.
AV02-1887EN - April 5, 2010