54F/74F410 Register StackÐ16 x 4 RAM TRI-STATEÉ Output Register General Description Features The ’F410 is a register-oriented high-speed 64-bit Read/ Write Memory organized as 16-words by 4-bits. An edgetriggered 4-bit output register allows new input data to be written while previous data is held. TRI-STATE outputs are provided for maximum versatility. The ’F410 is fully compatible with all TTL families. Y Commercial Military Y Y Y Y Y Edge-triggered output register Typical access time of 35 ns TRI-STATE outputs Optimized for register stack operation 18-pin package 9410 replacement Package Number 74F410PC N18A 54F410DM (Note 1) Package Description 18-Lead (0.300× Wide) Molded Dual-In-Line J18A 18-Lead Ceramic Dual-In-Line 74F410SC M20B 20-Lead (0.300× Wide) Molded Small Outline, JEDEC 54F410LM W20A 20-Lead Cerpak Note 1: Military grade device with environmental and burn-in processing. Use suffix e DMQB, LMQB Logic Symbol Connection Diagrams Pin Assignment for DIP and SOIC TL/F/9538–3 Pin Assignment for LCC TL/F/9538 – 1 TL/F/9538 – 2 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/9538 RRD-B30M105/Printed in U. S. A. 54F/74F410 Register StackÐ16 x 4 RAM TRI-STATE Output Register August 1995 Unit Loading/Fan Out 54F/74F Pin Names A0 – A3 D 0 – D3 CS OE WE CP Q0 – Q3 Description U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL Address Inputs Data Inputs Chip Select Input (Active LOW) Output Enable Input (Active LOW) Write Enable Input (Active LOW) Clock Input (Outputs Change on LOW-to-HIGH Transition) TRI-STATE Outputs 1.0/1.0 1.0/1.0 1.0/2.0 1.0/1.0 1.0/1.0 20 mA/b0.6 mA 20 mA/b0.6 mA 20 mA/b1.2 mA 20 mA/b0.6 mA 20 mA/b0.6 mA 1.0/2.0 150/40 (33.3) 20 mA/b1.2 mA b 3 mA/24 mA (20 mA) Functional Description Read OperationÐWhenever CS is LOW and CP goes from LOW-to-HIGH, the contents of the memory location selected by the address inputs (A0 –A3) are edge-triggered into the Output Register. The (OE) input controls the output buffers. When OE is HIGH the four outputs (Q0 –Q3) are in a high impedance or OFF state; when OE is LOW, the outputs are determined by the state of the Output Register. Write OperationÐWhen the three control inputs, Write Enable (WE), Chip Select (CS), and Clock (CP), are LOW the information on the data inputs (D0 – D3) is written into the memory location selected by the address inputs (A0 – A3). If the input data changes while WE, CS, and CP are LOW, the contents of the selected memory location follow these changes, provided setup and hold time criteria are met. Block Diagram TL/F/9538 – 4 2 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b 65§ C to a 150§ C Ambient Temperature under Bias Junction Temperature under Bias Plastic b 55§ C to a 125§ C Free Air Ambient Temperature Military Commercial b 55§ C to a 125§ C 0§ C to a 70§ C Supply Voltage Military Commercial b 55§ C to a 175§ C b 55§ C to a 150§ C a 4.5V to a 5.5V a 4.5V to a 5.5V VCC Pin Potential to Ground Pin b 0.5V to a 7.0V b 0.5V to a 7.0V Input Voltage (Note 2) b 30 mA to a 5.0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0.5V to VCC Standard Output b 0.5V to a 5.5V TRI-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol 54F/74F Parameter Min VIH Input HIGH Voltage VIL Input LOW Voltage VCD Input Clamp Diode Voltage VOH Output HIGH Voltage Typ Units 2.0 54F 10% VCC 54F 10% VCC 74F 10% VCC 74F 10% VCC 74F 5% VCC VCC Conditions Max V Recognized as a HIGH Signal 0.8 V Recognized as a LOW Signal b 1.2 V 2.5 2.4 2.5 2.4 2.7 Min IIN e b18 mA V Min IOH IOH IOH IOH IOH e e e e e b 1 mA b 3 mA b 1 mA b 3 mA b 3 mA VOL Output LOW Voltage 54F 10% VCC 74F 10% VCC 0.5 0.5 V Min IOL e 20 mA IOL e 24 mA IIH Input HIGH Current 54F 74F 20.0 5.0 mA Max VIN e 2.7V IBVI Input HIGH Current Breakdown Test 54F 74F 100 7.0 mA Max VIN e 7.0V ICEX Output HIGH Leakage Current 54F 74F 250 50 mA Max VOUT e VCC VID Input Leakage Test 74F V 0.0 IID e 1.9 mA All Other Pins Grounded IOD Output Leakage Circuit Current 74F 3.75 mA 0.0 VIOD e 150 mV All Other Pins Grounded IIL Input LOW Current b 0.6 b 1.2 mA Max VIN e 0.5V (An, Dn, OE, WE) VIN e 0.5V (CS, CP) IOZH Output Leakage Current 50 mA Max VOUT e 2.7V IOZL Output Leakage Current IOS Output Short-Circuit Current IZZ Bus Drainage Test 4.75 b 60 3 b 50 mA Max VOUT e 0.5V b 150 mA Max VOUT e 0V 500 mA 0.0V VOUT e 5.25V DC Electrical Characteristics Symbol (Continued) 54F/74F Parameter Min Typ Max Units VCC Conditions ICCH Power Supply Current 47 70 mA Max VO e HIGH ICCL Power Supply Current 47 70 mA Max VO e LOW ICCZ Power Supply Current 47 70 mA Max VO e HIGH Z AC Electrical Characteristics Symbol Parameter 74F 54F 74F TA e a 25§ C VCC e a 5.0V CL e 50 pF TA, VCC e Mil CL e 50 pF TA, VCC e Com CL e 50 pF Min Max Min Max Min Max tPLH tPHL Propagation Delay CP to Q 3.0 3.5 8.5 9.0 2.5 3.0 11.0 12.0 2.5 3.0 9.5 10.0 tPZH tPZL Enable Time OE to Q 3.0 3.5 8.0 9.0 2.5 3.0 10.5 13.0 2.5 3.0 9.0 10.0 tPHZ tPLZ Disable Time OE to Q 2.5 2.5 6.5 7.0 2.0 2.0 8.5 9.5 2.0 2.0 7.5 8.0 Units ns ns AC Operating Requirements Symbol Parameter 74F 54F 74F TA e a 25§ C VCC e a 5.0V TA, VCC e Mil TA, VCC e Com Min Min Min Max Max Units Max READ MODE ts(H) ts(L) Setup Time, HIGH or LOW An to CP 15.0 15.0 23 23 17.0 17.0 th(H) th(L) Hold Time, HIGH or LOW An to CP 0 0 0 0 0 0 ts(H) ts(L) Setup Time, HIGH or LOW An to WE 0 0 0 0 0 0 th(H) th(L) Hold Time, HIGH or LOW An to WE 0 0 0 0 0 0 ts(H) ts(L) Setup Time, HIGH or LOW Dn to WE 5.0 5.0 8.5 8.5 6.0 6.0 th(H) th(L) Hold Time, HIGH or LOW Dn to WE 0 0 2.5 2.5 0 0 tw WE Pulse Width Required to Write 7.5 9.5 8.5 ns tw CS Pulse Width Required to Write 7.5 9.5 8.5 ns tw CP Pulse Width Required to Write 7.5 9.5 8.5 ns ns WRITE MODE Note: Military temperature range for this device is b40§ C to a 85§ C. 4 ns ns Ordering Information The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 74F 410 S Temperature Range Family 74F e Commercial 54F e Military C X Special Variations X e Devices shipped in 13× reels QB e Military grade device with environmental and burn-in processing Device Type Package Code P e Plastic DIP S e Small Outline (SOIC) D e Ceramic DIP L e Package Leadless Chip Carrier Temperature Range C e Commercial (0§ C to a 70§ C) M e Military (b55§ C to a 125§ C) 5 Physical Dimensions inches (millimeters) 18-Lead Ceramic Dual-In-Line Package (D) NS Package Number J18A 20-Lead (0.300× Wide) Molded Small Outline Package, JEDEC (S) NS Package Number M20B 6 Physical Dimensions inches (millimeters) (Continued) 18-Lead (0.300× Wide) Molded Dual-In-Line Package (P) NS Package Number N18A 7 54F/74F410 Register StackÐ16 x 4 RAM TRI-STATE Output Register Physical Dimensions inches (millimeters) (Continued) 20-Lead Cerpack NS Package Number W20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Europe Fax: (a49) 0-180-530 85 86 Email: cnjwge @ tevm2.nsc.com Deutsch Tel: (a49) 0-180-530 85 85 English Tel: (a49) 0-180-532 78 32 Fran3ais Tel: (a49) 0-180-532 93 58 Italiano Tel: (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductor Japan Ltd. Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.