ETC TD1720

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DATASHEET
Single Buck Voltage Mode PWM Controller
TD1720
汪工 TEL:13828719410 QQ:1929794238
General Description Features The TD1720 is a voltage mode, fixed 300kHz switching frequency, synchronous buck converter. The TD1720 allows wide input voltage that is either a single 5~12V or two supply voltage(s) for various applications. A power‐on‐reset (POR) circuit monitors the VCC supply voltage to prevent wrong logic controls. A builtin soft‐start circuit prevents the output voltages from overshoot as well as limits the input current. An internal 0.8V temperature‐compensated reference voltage with high accuracy is designed to meet the requirement of low output voltage applications. The TD1720 provides excellent output voltage regulations against load current variation. The controller’s over‐current protection monitors the output current by using the voltage drop across the RDS(ON) of low‐side MOSFET, eliminating the need for a current sensing resistor that features high efficiency and low cost. In addition, the TD1720 also integrates excellent protection functions: The over‐voltage protection (OVP) , under‐ voltage protection (UVP). OVP circuit which monitors the FB voltage to prevent the PWM output from overvoltage,and UVP circuit which monitors the FB voltage to prevent the PWM output from under‐voltage or short‐circuit.The TD1720 is available in SOP‐8P and TDFN3x3‐10 packages. z
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Wide 5V to 12V Supply Voltage Power‐On‐Reset Monitoring on VCC Excellent Output Voltage Regulations 0.8V Internal Reference ±1% Over‐Temperature Range Integrated Soft‐Start Voltage Mode PWM Operation with External Compensation Up to 90% Duty Ratio for Fast Transient Response Constant Switching Frequency 300kHz ±10% Drive Dual Low Cost N‐MOSFETs with Adaptive Dead‐Time Control 50% Under‐Voltage Protection 125% Over‐Voltage Protection Adjustable Over‐Current Protection Threshold Using the RDS(ON) of Low‐Side MOSFET Shutdown Control by COMP Power Good Monitoring (TDFN‐10 3mmx3mm Package Only) SOP‐8P and TDFN3x3‐10 Packages Lead Free and Green Devices Available (RoHS Compliant)
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DATASHEET
Single Buck Voltage Mode PWM Controller
TD1720
Pin Assignments PIN
NO.
SOP‐8P
TDFN3x3‐10
NAME
1
1
BOOT
2
3
2
4
UGATE
GND
4
5
LGATE
5
6
7
6
7
8
FUNCTION
This pin provides the bootstrap voltage to the high‐side gate driver for
driving the N‐channel MOSFET. An external capacitor from PHASE to
BOOT, an internal diode, generates the bootstrap voltage for the high‐side
d
(
)
High‐side Gate Driver Output. This pin is the gate driver for high‐side
Signal and Power ground. Connecting this pin to system ground.
Low‐side Gate Driver Output and Over‐Current Setting Input. This pin is the
gate driver for low‐side MOSFET. It also used to set the maximum inductor
current. Refer to the section in “Function Description” for detail.
VCC
Power Supply Input. Connect a nominal 5V to 12V power supply voltage to
this pin. A power‐on‐reset function monitors the input voltage at this pin. It is recommended that a decoupling
capacitor (1 to 10 F) is connected to GND for noise decoupling.
FB
Feedback Input of Converter. The converter senses feedback voltage via FB
and regulates the FB voltage at 0.8V. Connecting FB with a resistor‐divider
from the output sets the output voltage of the converter.
COMP
This is a multiplexed pin. During soft‐start and normal converter operation,
this pin represents the output of the error amplifier. It is used to
compensate the regulation control loop in combination with the FB pin. Pulling COMP low (VDISABLE = 0.4V max.) will shut down the controller. When
the pull‐down device is released, the COMP pin will start to rise. When the
COMP pin rises above the VDISABLE trip point, the TD1720 will begin a new
initialization and soft‐start cycle.
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DATASHEET
Single Buck Voltage Mode PWM Controller
TD1720
8
3
PHASE
This pin is the return path for the high‐side gate driver. Connecting this pin
to the high‐side MOSFET source and connect a capacitor to BOOT for the
bootstrap voltage. This pin is also used to monitor the voltage drop
across the low‐side MOSFET for over‐current protection.
9(Exposed Pad)
11(Exposed Pad)
GND
Thermal Pad. Connect this pad to the system ground plan for good
thermal conductivity.
‐
9
POK
POK is an open drain output used to indicate the status of the output
voltage. Connect the POK pin to 5 to 12V through a pull‐high resistor.
‐
10
NC
No Connect
Ordering Information TD1720 □
□ Circuit Type Packing:
Blank:Tube
R:Type and Reel
Package
M:SOP8-PP
Q:TDFN December, 20, 2011 Techcode Semiconductor Limited www.tongchuangwei.com
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DATASHEET
Single Buck Voltage Mode PWM Controller
TD1720
Functional Block Diagram Functional Block Diagram of TD1720 December, 20, 2011 Techcode Semiconductor Limited www.tongchuangwei.com
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TD1720
Single Buck Voltage Mode PWM Controller
Absolute Maximum Ratings Parameter
Symbol
VVCC
VBOOT
VUGATE
VLGATE
VPHASE
TJ
TSTG
Rating
VCC Supply Voltage (VCC to GND)
BOOT Supply Voltage (BOOT to PHASE)
BOOT Supply Voltage (BOOT to GND)
UGATE Voltage (UGATE to PHASE)
LGATE Voltage (LGATE to GND)
PHASE Voltage (PHASE to GND)
FB and COMP to GND
POK to GND
Maximum Junction Temperature
Storage Temperature
Maximum Lead Soldering Temperature, 10 Seconds
> 20ns
< 20ns
> 20ns
< 20ns
> 20ns
< 20ns
Unit
‐0.3 ~ 16
‐0.3 ~ 16
‐0.3 ~ 30
‐0.3 ~ VBOOT+0.3
‐5 ~ VBOOT+5
‐0.3 ~ VVCC+0.3
‐5 ~ VVCC+5
‐0.3 ~ 16
‐5 ~ 21
‐0.3 ~ 7
‐0.3~VCC+0.3
150
‐65 ~ 150
260
TSDR
Note: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
V
V
V
V
V
V
V
V
V
V
V
°C
°C
°C
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom- mended operating
conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions Symbol
VIN
VVCC
VOUT
IOUT
TA
TJ
Parameter
VIN Supply Voltage
VCC Supply Voltage
Converter Output Voltage
Converter Output Current
Ambient Temperature
Junction Temperature
Range
3.3 ~ 13.2
4.5 ~ 13.2
0.8 ~ 5.5
0 ~ 20
‐40 ~ 85
‐40 ~ 125
Unit
V
V
V
A
°C
°C
Note : Refer to the application circuit for further information.
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TD1720
Single Buck Voltage Mode PWM Controller
Thermal Characteristics Symbol
Parameter
Thermal Resistance -Junction to Ambient
Typical Value
Unit
60
°C/W
(Note 2)
JA
SOP-8P
JA the component mounted on a high effective thermal conductivity test board in free air.
Note :is measured with
Electrical Characteristics Refer to the typical application circuit. These specifications apply over VVCC = 12V, TA = -40°C to 85°C, unless otherwise noted. Typical
values are at TA = 25°C.
Symbol Parameter Test Conditions INPUT SUPPLY VOLTAGE AND CURRENT IVCC VCC Supply Current (Shutdown UGATE and
Mode) COMP=GND LGATE
TD1720
Min.
Typ. open; - VCC Supply Current UGATE and LGATE open
POWER-ON-RESET(POR) Rising VCC POR Threshold 3.8
VCC POR Hysteresis 0.3
OSCILLATOR FOSC Oscillator Frequency 270
VOSC (Note 4)
(1.2V~2.7V typical)
DMAX Maximum Duty Cycle REFERENCE VREF Reference Voltage TA = -40 ~ 85°C
0.792
Converter Line/Load Regulation VCC=4.5~13.2V, IOUT = 0 ~ -0.2
ERROR AMPLIFIER - gm Transconductance (Note ) RL = 10k , CL = 10pF - Open-Loop Bandwidth (Note ) FB Input Leakage Current COMP High Voltage COMP Low Voltage Maximum COMP Source Current VFB = 0.8V
RL = OPEN
RL = OPEN
VCOMP = 2V
Maximum COMP Sink Current
VCOMP = 2V
- -
Max. Unit
- 700 uA 2 3 mA
4.1 0.5 4.4 0.6 V
V
300 1.5 - 330 - 90 kHz
V
%
0.8 - 0.808
0.2 V
%
667 - A/V 20 - MHz - 3 1.5 200 0.1 - - - uA
200
-
V
uA December, 20, 2011 Techcode Semiconductor Limited www.tongchuangwei.com
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TD1720
Single Buck Voltage Mode PWM Controller
Electrical Characteristics(Cont.) Refer to the typical application circuit. These specifications apply over VVCC = 12V, TA = -40°C to 85°C, unless otherwise noted. Typical
values are at TA = 25°C.
Symbol Parameter
Test Conditions
GATE DRIVERS
High‐Side Gate Driver SourceVBOOT‐GND= 12V, VUGATE‐PHASE = 6V
High‐Side Gate Driver Sink Current VBOOT‐GND= 12VUGATE‐PHASE = 6V
Low‐Side Gate Driver SourceVVCC = 12V, VLGATE‐GND = 6V
Low‐Side Gate Driver Sink Current VVCC = 12V, VLGATE‐GND = 6V
TD
Dead‐Time (Note 4)
PROTECTIONS
VFB_UV
FB Under‐Voltage Protection TripPercentage of VREF
Under‐Voltage Debounce Interval
Under‐Voltage Protection Enable The same as soft ‐start interval
Delay
VFB_OV
FB Over‐Voltage Protection TripVFB rising
FB Over‐Voltage Protection
Over‐Voltage Debounce Interval
VOCP_MAX Built‐in Maximum OCP Voltage
IOCSET
OCSET Current Source
SOFT‐START
VDISABLE
Shutdown Threshold of VCOMP
TSS
Internal Soft‐Start Interval (Note 4)
POWER OK INDICATOR (POK) (ONLY FOR TDFN3X3‐10 PACKAGE)
IPOK
POK Leakage Current
VPOK=5V
VFB is from low to target value (POK Goes High)
VPOK
POK Threshold
VFB Falling, POK Goes Low
VFB Rising, POK Goes Low
POK Delay Time
TD1720
Min.
Typ.
Max.
‐
‐
‐
‐
‐
1.0
1.1
1.5
1.8
30
‐
‐
‐
‐
‐
40
‐
45
2
50
‐
%
s
1
1.5
2
ms
115
‐
‐
350
9
125
5
2
‐
10
135
‐
‐
‐
11
%
%
s
mV
uA
‐
1
‐
1.5
0.4
2
V
ms
‐
0.1
1
uA
85
90
95
%
45
120
1
50
125
3
55
130
5
%
%
ms
Unit
A
A
ns
Note 4: Guaranteed by design, not production tested.
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Single Buck Voltage Mode PWM Controller
DATASHEET
TD1720
Typical Operating Characteristics December, 20, 2011 Techcode Semiconductor Limited www.tongchuangwei.com
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Single Buck Voltage Mode PWM Controller
DATASHEET
TD1720
Typical Operating Characteristics(Cont.) December, 20, 2011 Techcode Semiconductor Limited www.tongchuangwei.com
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Single Buck Voltage Mode PWM Controller
DATASHEET
TD1720
Typical Operating Characteristics(Cont.) December, 20, 2011 Techcode Semiconductor Limited www.tongchuangwei.com
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Single Buck Voltage Mode PWM Controller
TD1720
Typical Application Circuit TD1720 12V Application Circuit TD1720 5V Application Circuit December, 20, 2011 Techcode Semiconductor Limited www.tongchuangwei.com
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DATASHEET
TD1720
Single Buck Voltage Mode PWM Controller
Function Description Power‐On‐Reset (POR) A resistor (ROCSET), connected from the LGATE/OCSET to GND,
The Power-On-Reset (POR) function of TD1720 continually
programs the over-current trip level. Before the IC initiates a
monitors the input supply voltage (VCC) and ensures that the IC
soft-start process, an internal current source, IOCSET (10μA typical),
has sufficient supply voltage and can work well. The POR function
flowing through the ROCSET develops a voltage (VROCSET) across the
initiates a soft-start process while the VCC voltage just exceeds
ROCSET. The device holds VROCSET and stops the current source IOCSET
the POR threshold; the POR function also inhibits the operations
during normal operation. When the voltage across the low-side
of the IC while the VCC voltage falls below the POR threshold.
MOSFET exceeds the VROCSET, the TD1720 turns off the highside
Soft‐Start and low-side MOSFET,and the device will enters hiccup mode
The TD1720 builds in a soft-start function about 1.5ms (Typ.)
until the over-current phenomenon is released.
interval, which controls the output voltage rising as well as limiting
The TD1720 has an internal OCP voltage, VOCP_MAX, and the value
the current surge at the start-up. During soft-start, an internal ramp
is 0.35V (minimum). When the ROCSET x IOCSET exceed 0.35V or the
voltage connected to the one of the positive inputs of the error
ROCSET is floating or not connected, the VROCSET will be the default
amplifier replaces the reference voltage (0.8V typical) until the
value 0.35V. The over current threshold would be 0.35V across
ramp voltage reaches the reference voltage. The soft-start circuit
low-side MOSFET. The threshold of the valley inductor
interval is shown as figure 1. The UVP function enable delay is
current-limit is therefore given by:
from t2 to t3.
For the over-current is never occurred in the normal operating load
range, the variation of all parameters in the above equation should
be considered:
- The RDS(ON) of low-side MOSFET is varied by temperature and
gate to source voltage. Users should determine the maximum
RDS(ON) by using the manufacturer’s datasheet.
Over‐Current Protection of the PWM Converter - The minimum IOCSET (9μA) and minimum ROCSET should be used in
the above equation.
The over-current function protects the switching converter against
- Note that the ILIMIT is the current flow through the lowside
over-current or short-circuit conditions. The controller senses the
MOSFET; ILIMIT must be greater than valley inductor current which
inductor current by detecting the drainto-source voltage which is
is output current minus the half of inductor ripple current.
the product of the inductor’s current and the on-resistance of the
low-side MOSFET during it’s on-state. This method enhances the
converter’s efficiency and reduces cost by eliminating a current
sensing resistor required.
Where ΔI = output inductor ripple current
- The overshoot and transient peak current also should be
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Single Buck Voltage Mode PWM Controller
TD1720
Function Description(Cont.) Under‐Voltage Protection Adaptive Shoot‐Through Protection of the PWM Converter The under-voltage function monitors the voltage on FB (VFB) by
The gate drivers incorporate an adaptive shoot-through protection
Under-Voltage (UV) comparator to protect the PWM converter
to prevent high-side and low-side MOSFETs from conducting
against short-circuit conditions. When the VFB falls below the falling
simultaneously and shorting the input supply. This is accomplished
UVP threshold (50% VREF), a fault signal is internally generated
by ensuring the falling gate has turned off one MOSFET before the
and the device turns off highside and low-side MOSFETs. The
other is allowed to rise.
device will enters hiccup mode until the under-voltage
During turn-off the low-side MOSFET, the LGATE voltage is
phenomenon is released.
monitored until it is below 1.5V threshold, at which time the
Over‐Voltage Protection (OVP) of the PWM Converter UGATE is released to rise after a constant delay. During turn-off of
The over-voltage protection monitors the FB voltage to prevent the
the high-side MOSFET, the UGATE-to-PHASE voltage is also
output from over-voltage condition. When the output voltage rises
monitored until it is below 1.5V threshold, at which time the LGATE
above 125% of the nominal output voltage, the TD1720 turns off
is released to rise after a constant delay.
the high-side MOSFET and turns on the low-side MOSFET until
Power OK Indicator the output voltage falls below the falling OVP threshold.
The TD1720 features an open-drain POK output pin to indicate
Shutdown and Enable one of the IC's working statuses including soft-start, under-voltage
The TD1720 can be shut down or enabled by pulling low the
fault, over-current fault. In normal operation, when the output
voltage on COMP. The COMP is a dual-function pin. During
voltage rises 90% of its target value, the POK goes high. When the
normal operation, this pin represents the output of the error
output voltage outruns 50% or 125% of the target voltage, POK
amplifier. It is used to compensate the regulation control loop in
signal will be pulled low immediately.
combination with the FB pin. Pulling the COMP low (VDISABLE = 0.4V
maximum) places the controller into shutdown mode which
UGATE and LGATE are pulled to PHASE and GND respectively.
When the pull-down device is released, the COMP voltage will
start to rise. When the COMP voltage rises above the VDISABLE
threshold, the TD1720 will begin a new initialization and soft-start
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DATASHEET
TD1720
Single Buck Voltage Mode PWM Controller
Application Information Output Voltage Selection where Fs is the switching frequency of the regulator.
The output voltage can be programmed with a resistive divider.
Use 1% or better resistors for the resistive divider is
A tradeoff exists between the inductor’s ripple current and the
recommended. The FB pin is the inverter input of the error
regulator load transient response time. A smaller inductor will give
amplifier, and the reference voltage is 0.8V. The output voltage is
the regulator a faster load transient response at the expense of
determined by:
higher ripple current and vice versa. The maximum ripple current
occurs at the maximum input voltage. A good starting point is to
choose the ripple current to be approximately 30% of the
Where R1 is the resistor connected from VOUT to FB and R2 is the
maximum output current.
resistor connected from FB to the GND.
Once the inductance value has been chosen, selecting an inductor
Output Capacitor Selection is capable of carrying the required peak current without going into
The selection of COUT is determined by the required effective series
saturation. In some types of inductors, especially core that is make
resistance (ESR) and voltage rating rather than the actual
of ferrite, the ripple current will increase abruptly when it saturates.
capacitance requirement. Therefore, selecting high performance
This will result in a larger output ripple voltage.
low ESR capacitors is intended for switching regulator
Compensation applications. In some applications.multiple capacitors have to be
The output LC filter of a step down converter introduces a double
paralleled to achieve the desired ESR value. If tantalum capacitors
pole, which contributes with -40dB/decade gain slope and 180
are used, make sure they are surge tested by the manufactures. If
degrees phase shift in the control loop. A compensation network
in doubt,consult the capacitors manufacturer.
between COMP pin and ground should be added. The simplest
Input Capacitor Selection loop compensation network is shown in Figure 5.The output LC
The input capacitor is chosen based on the voltage rating and the
filter consists of the output inductor and output capacitors. The
RMS current rating. For reliable operation,select the capacitor
transfer function of the LC filter is given by:
voltage rating to be at least 1.3 times higher than the maximum
input voltage. The maximum RMS current rating requirement is
approximately IOUT/2 where IOUT is the load current. During power
up, the input capacitors have to handle large amount of surge
The poles and zero of this transfer function are:
current.If tantalum capacitors are used, make sure they are surge
tested by the manufactures. If in doubt, consult the capacitors
manufacturer.For high frequency decoupling, a ceramic capacitor
between 0.1μF to 1μF can connect between VCC and ground pin.
Inductor Selection The inductance of the inductor is determined by the output voltage
The FLC is the double poles of the LC filter, and FESR is the zero
requirement. The larger the inductance, the lower the inductor’s
introduced by the ESR of the output capacitor.
current ripple. This will translate into lower output ripple voltage.
The ripple current and ripple voltage can be approximated by:
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Single Buck Voltage Mode PWM Controller
TD1720
Application Information(Cont.) The compensation circuit is shown in Figure 5. R2 and C2
introduce a zero and C1 introduces a pole to reduce the switching
noise. The transfer function of error amplifier is given by:
Figure 2. The Output LC Filter
The pole and zero of the compensation network are:
Figure 3. The LC Filter Gain & Frequency
The PWM modulator is shown in Figure 4. The input is the output
of the error amplifier and the output is the PHASE node. The
transfer function of the PWM modulator is given by:
Figure 5. Compensation Network
The closed loop gain of the converter can be written as:
Figure 6 shows the converter gain and the following guidelines will
help to design the compensation network.
1.Select the desired zero crossover frequency FO:
(1/5 ~ 1/10) x FSW >FO>FZ
Use the following equation to calculate R2:
Figure 4. The PWM Modulator
Where:gm = 667μA/V December, 20, 2011 Techcode Semiconductor Limited www.tongchuangwei.com
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Single Buck Voltage Mode PWM Controller
TD1720
Application Information(Cont.) 2. Place the zero FZ before the LC filter double poles FLC:
where IOUT is the load current
FZ = 0.75 x FLC
TC is the temperature dependency of RDS(ON)
Calculate the C2 by the equation:
FSW is the switching frequency
tsw is the switching interval
D is the duty cycle
3. Set the pole at the half the switching frequency:
Note that both MOSFETs have conduction losses while the upper
FP = 0.5xFSW
MOSFET includes an additional transition loss. The switching
Calculate the C1 by the equation:
internal, tsw, is the function of the reverse transfer capacitance
CRSS. Figure 7 illustrates the switching waveform internal of the
MOSFET.
The (1+TC) term factors in the temperature dependency of the
RDS(ON) and can be extracted from the “RDS(ON) vs Temperature”
curve of the power MOSFET.
Figure 6. Converter Gain & Frequency
MOSFET Selection The selection of the N-channel power MOSFETs is determined by
the RDS(ON), reverse transfer capacitance (CRSS), and maximum
output current requirement.The losses in the MOSFETs have two
components: conduction loss and transition loss. For the upper
Figure 7. Switching Waveform Across MOSFET
and lower MOSFET, the losses are approximately given by the
Layout Consideration following equations:
In any high switching frequency converter, a correct layout is
PUPPER = IOUT2 (1+ TC)(RDS(ON))D + (0.5)(Iout)(VIN)(tsw)FSW
important to ensure proper operation of the regulator. With power
PLOWER = IOUT2 (1+ TC)(RDS(ON))(1-D)
devices switching at 300kHz,the resulting current transient will
cause voltage spike across the interconnecting impedance and
parasitic circuit elements. As an example, consider the turn-off
transition of the PWM MOSFET. Before turn-off, the MOSFET is
carrying the full load current. During turn-off, current stops flowing
in the MOSFET and is free-wheeling by the lower MOSFET and
parasitic diode. Any parasitic inductance of the circuit generates a
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Single Buck Voltage Mode PWM Controller
TD1720
Application Information(Cont) large voltage spike during the switching interval. In general, using
- The input capacitor should be near the drain of the upper
short and wide printed circuit traces should minimize
MOSFET; the output capacitor should be near the loads. The input
interconnecting imped ances and the magnitude of voltage spike.
capacitor GND should be close to the output capacitor GND and
And signal and power grounds are to be kept separate till
the lower MOSFET GND.
combined using ground plane construction or single point
- The drain of the MOSFETs (VIN and PHASE nodes) should be a
grounding. Figure 8. illustrates the layout, with bold lines indicating
large plane for heat sinking.
high current paths; these traces must be short and wide.
- The ROCSET resistance should be placed near the IC as close as
Components along the bold lines should be placed lose together.
possible.
Below is a checklist for your layout:
- Keep the switching nodes (UGATE, LGATE, and PHASE) away
from sensitive small signal nodes since these nodes are fast
moving signals. Therefore, keep traces to these nodes as short as
possible.
- The traces from the gate drivers to the MOSFETs (UG and LG)
should be short and wide.
- Place the source of the high-side MOSFET and the drain of the
low-side MOSFET as close as possible. Minimizing the impedance
with wide layout plane between the two pads reduces the voltage
bounce of the node.
Decoupling capacitor, compensation component, the resistor
dividers, and boot capacitors should be close their pins. (For
example, place the decoupling ceramic capacitor near the drain of
Figure 8. Layout Guidelines
the high-side MOSFET as close as possible. The bulk capacitors
are also placed near the drain).
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Single Buck Voltage Mode PWM Controller
DATASHEET
TD1720
Package Information SOP8-PP Package Outline Dimensions
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DATASHEET
TD1720
Single Buck Voltage Mode PWM Controller
Package Information TDFN3x3-10
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Single Buck Voltage Mode PWM Controller
TD1720
Design Notes
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