ETC CM108

SS
Best USB Audio I/O Controller for
Headset and Multi-Media Devices
CM108 High Integrated
USB Audio I/O Controller
DataSheet 1.5
C-MEDIA ELECTRONICS INC.
TEL: 886-2-8773-1100 FAX: 886-2-8773-2211
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan 106, R.O.C.
For detailed product information, please contact sales@cmedia.com.tw
TU
UT
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
NOTICES
THIS DOCUMENT IS PROVIDED “AS IS” WITH NO WARRANTIES WHAT SO EVER,
INCLUDING ANY WARRANTY OF MERCHANT ABILITY, NONINFRINGEMENT, FITNESS FOR
ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY
PROPOSAL, DOCUMENT OR SAMPLE.
ALL RIGHTS RESERVED. NO PART OF THIS DOCUMENT MAY BE REPRODUCED OR
TRANSMITTED IN ANY FORM OR BY ANY MEANS, ELECTRONIC OR MECHANICAL,
INCLUDING INFORMATION STORAGE AND RETRIEVAL SYSTEMS, WITHOUT
PERMISSION IN WRITING FROM C-MEDIA ELECTRONICS, INC.
COPYRIGHT
U
Copyright (c) 2003-2004 C-Media Electronics Inc.
All rights reserved. All content included on this document, such as text, graphics, logos, button
icons, images, audio clips, digital downloads, data compilations, and software, is either the
exclusive property of C-Media Electronics Inc., its affiliates (collectively, "C-Media"), its content
suppliers, or its licensors and protected by Republic of China and international copyright laws.
TRADEMARKS
U
C-Media, the C-Media Logo, Xear 3D, Xear 3D Logo, Speaker Shifter, Smart Jack, and Smart
Audio Jack are trademarks of C-Media Electronics Inc. in Republic of China and/or other
countries. All other brand and product names listed are trademarks or registered trademarks of
their respective holders and are hereby recognized as such.
*C-Media reserves the right to modify the specifications without further notice*
Date: Nov/01/2004
Version:
-1-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
TABLE OF CONTENTS
1. DESCRIPTION AND OVERVIEW
2. FEATURES
3. PIN DESCRIPTIONS
3.1 PIN ASSIGNMENT BY PIN NUMBER
3.2 PIN-OUT DIAGRAM
3.3 PIN SIGNAL DESCRIPTIONS
4. I²S INTERFACE
5. BLOCK DIAGRAM
6. ORDERING INFORMATION
7. FUNCTION DESCRIPTIONS
7.1 USB INTERFACE
7.1.1
DEVICE DESCRIPTOR
7.1.2
CONFIGURATION DESCRIPTOR
7.1.3
CONTENT FORMAT FOR 94C46
7.1.4
USB AUDIO TOPOLOGY DIAGRAM
7.2 JUMPER PINS AND MODE SETTING
7.2.1
MODE PIN AND MSEL PIN
7.2.2
MODE PIN AND PWRSEL PIN
7.2.3
VSEL PIN
7.3 HID FEATURE
7.4 INTERNAL REGISTERS
Date: Nov/01/2004
Version:
-2-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
8. ELECTRICAL CHARACTERISTICS
8.1 ABSOLUTE MAXIMUM RATING
8.2 OPERATION CONDITIONS
8.3 ELECTRICAL PARAMETERS
8.4 AUDIO PERFORMANCE
9. FREQUENCY RESPONSE GRAPHS
9.1 DIGITAL PLAYBACK FOR LINE OUTPUT FREQUENCY (10K OHM LOADING)
9.1.1
FREQUENCY RESPONSE 48KS/SEC
9.1.2
FREQUENCY RESPONSE 44.1KS/SEC
9.2 DIGITAL PLAYBACK FOR LINE OUTPUT FREQUENCY (32 OHM LOADING)
9.2.1
FREQUENCY RESPONSE 48KS/SEC
9.2.2
FREQUENCY RESPONSE 44.1KS/SEC
9.3 DIGITAL RECORDING FOR LINE OUTPUT FREQUENCY
9.3.1
FREQUENCY RESPONSE 48KS/SEC
9.3.2
FREQUENCY RESPONSE 44.1KS/SEC
10. REFERENCE APPLICATION CIRCUIT
Date: Nov/01/2004
Version:
-3-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
1. DESCRIPTION AND OVERVIEW
CM108 is a highly integrated single chip USB audio solution. All essential analog modules
are embedded in CM108, including dual DAC and earphone driver, ADC, microphone booster,
PLL, regulator, and USB transceiver. It is very suitable for USB headset, USB earphone or
USB audio interface box application. Many features are programmable with jumper pins or
external EEPROM. In addition, audio adjustment can be easily controlled via specific HID
compliant volume control pins. For value added application, external codec or audio DSP can
be connected to CM108 via I2S pin for further processing. 4 GPIO pins can be accessed with
customer application software for additional value added application.
2. FEATURES
Compliant with USB 2.0 Full Speed Operation
Compliant with USB Audio Device Class Specification v1.0
Supports USB Suspend / Resume Mode and Remote Wakeup with Volume Control
Pins
Single 12MHz Crystal Input with On-chip PLL and Embedded USB Transceiver
Jumper Pin for Speaker Mode (Playback Only) or Headset Mode (Playback +
Recording)
For Headset Mode, USB Audio Function Topology has 2 Input Terminals, 2 Output
Terminals, 1 Mixer Unit, 1 Selector Unit, and 3 Feature Units
Jumper Pin for Mixer Unit Enable / Disable under Headset Mode
For Speaker Mode, USB Audio Function Topology has 1 Input Terminal, 1 Output
Terminal, and 1 Feature Unit
Support One Control Endpoint, One Isochronous Out Endpoint, One Isochronous In
Endpoint, and One Interrupt In Endpoint
Date: Nov/01/2004
Version:
-4-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
Alternate Zero Bandwidth Setting for Releasing Playback Bandwidth on USB Bus when
this Device is Inactive
Supports AES/EBU, IEC60958, S/PDIF Consumer Formats for Stereo PCM Data at
S/PDIF Output
Volume Up, Volume Down, and Playback Mute Pins support USB HID device class for
Host Control Synchronization
Record Mute Pin with LED Indicator for Record Mute Status
External EEPROM Interface for Vendor Specific USB VID, PID, and Serial Number
EEPROM Write Function via Vendor Specific request for Mass Production
Convenience
Customized Embedded VID, PID, and Product String by Customer Request
4 GPIO Pins with Read/Write via HID Interface
Jumper Pin to Set the Output Voltage Swing (3.5V or 2.5V)
Jumper Pin to Set the Power Mode (100mA or 500mA, Bus Power or Self Power)
Isochronous Transfer uses Adaptive Mode with Internal PLL for Synchronization
48K / 44.1KHz Sampling Rate for Both Playback and Recording
Soft Mute Function
Embedded High Performance 16-Bit Audio DAC with Earphone Phone Amplifier
Host Side Data Loss Noise Reduction Function
Embedded 16-Bit ADC Input with Microphone Boost
Embedded Power-On-Reset Block
Embedded 5V to 3.3V Regulator for Single External 5V Operation
Compatible with Win98 SE / Win ME / Win 2000 / Win XP and Mac OS9 / OS X without
Additional Driver
48 Pin LQFP Package
Date: Nov/01/2004
Version:
-5-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
3. PIN DESCRIPTIONS
3.1 PIN ASSIGNMENT BY PIN NUMBER
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
Signal Name
SPDIFO
DW
DR
SK
CS
MUTER
PWRSEL
XI
XO
MODE
GPIO2
LEDO
Pin #
13
14
15
16
17
18
19
20
21
22
23
24
Signal Name
Pin #
GPIO3
DVSS1
GPIO4
SDIN
ADSCLS
MUTEP
ADLRCK
ADMCLK
LEDR
ADSEL
TEST
AO
25
26
27
28
29
30
31
32
33
34
35
36
Signal Name
AO
AI
AI
P
AO
AO
AO
AO
AVSS2
AVDD2
DVDD
DVSS2
Pin #
37
38
39
40
41
42
43
44
45
46
47
48
Signal Name
REGV
MSEL
VOLUP
PDSW
USBDP
USBDM
GPIO1
SDOUT
RAMCLK
DALRCK
DASCLS
VOLDN
MSEL
REGV
VOLUP
PDSW
USBDP
GPIO1
USBDM
SDOUT
DAMCLK
DASCLK
DALRCK
VOLDN
3.2 PIN-OUT DIAGRAM
37
SPDIFO
DVSS2
1
DW
DVDD
DR
AVDD2
SK
AVSS2
CS
LOR
MUTER
LOBS
CM108
PWRSEL
LOL
XI
AVDD1
XO
VSEL
CM108
MODE
GPIO2
LEDO
MICIN
VREF
25
VBIAS
AVSS1
TEST
ADSEL
LEDR
ADMCLK
ADLRCK
MUTEP
SDIN
ADSCLK
GPIO4
DVSS1
GPIO3
13
Pin Assignments (Top View)
Date: Nov/01/2004
Version:
-6-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
3.3 PIN SIGNAL DESCRIPTIONS
Pin #
Symbol
Type
1
SPDIFO
DO, 8mA, SR
2
DW
DIO, 8mA,
PD, 5VT
3
DR
DO, 4mA, SR
EEPROM Interface Data write to EEPROM
4
SK
DO, 4mA, SR
EEPROM Interface Clock
5
CS
DO, 4mA, SR
EEPROM Interface Chip Select
6
MUTER
DI, ST, PU
Description
SPDIF Output
EEPROM Interface Data read from EEPROM
Mute Recording (Edge Trigger with de-Bouncing)
Chip Power Select Pin, worked with MODE Pin
Speaker Mode H:Self Power with 100mA
7
PWRSEL
DI, ST
L:Bus Power with 500mA
Headset Mode H:Bus Power with 100mA
L:Bus Power with 500mA
( H: Pull Up to 3.3V; L: Pull Down to Ground )
8
XI
DI
Input Pin for 12MHz Oscillator
9
XO
DO
Output Pin for 12MHz Oscillator
Operating mode select
10
MODE
DI, ST
H:Speaker Mode - Playback Only
L:Headset Mode - Playback & Recording
( H: Pull Up to 3.3V; L: Pull Down to Ground )
11
GPIO2
DIO, 8mA,
PD, 5VT
12
LEDO
DO, SR, 8mA
13
GPIO3
DIO, 8mA,
PD, 5VT
14
DVSS1
P
15
GPIO4
DIO, 8mA,
PD, 5VT
GPIO Pin
LED for Operation;
Output H for Power On; Toggling for Data Transmit
GPIO Pin
Digital Ground
GPIO Pin
Date: Nov/01/2004
Version:
-7-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
16
SDIN
DIO, 8mA,
PD, 5VT
17
ADSCLK
DIO, 4mA, SR
18
MUTEP
DI, ST, PU
19
ADLRCK
DO, 4mA, SR
20
ADMCLK
DIO, 4mA, SR
21
LEDR
DO, SR, 8mA
ADC I2S Data Input
ADC I2S Serial Clock
Mute Playback (Edge Trigger with de-Bouncing)
ADC I2S Left / Right Clock
11.2896MHz Output for 44.1KHz Sampled Data and
12.288MHz Output for 48KHz Sampled Data
LED for Mute Recording Indicator;
Output H when Recording is Muted
ADC Input Source Select Pin
22
ADSEL
DI, ST, PD
H: Use external (via I2S) ADC
L: Use internal ADC
( H: Pull Up to 3.3V; L: Pull Down to Ground )
Test Mode Select Pin;
23
TEST
DI, ST, PD
H: Test Mode
L: Normal Operation
( H: Pull Up to 3.3V; L: Pull Down to Ground )
24
AVSS1
P
25
VBIAS
AO
26
VREF
AO
27
MICIN
AI
Analog Ground
Microphone Bias Voltage Supply (4.5V), with a small Driving
Capability
Connecting to External Decoupling Capacitor for Embedded
Bandgap Circuit; 2.25V Output
Microphone Input
Line Out Voltage Swing Select
28
VSEL
AI
H: Line out Vpp = 3.5 Volts
L: Line out Vpp = 2.5 Volts
( H: Pull Up to 5V; L: Pull Down to Ground )
29
AVDD1
P
5V Analog Power for Analog Circuit
30
LOL
AO
Line Out Left Channel
31
LOBS
AO
DC 2.25V Output for Line Out Bias
Date: Nov/01/2004
Version:
-8-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
Line Out Right Channel
32
LOR
AO
33
AVSS2
P
Analog Ground
34
AVDD2
P
5V Power Supply for Analog Circuit
35
DVDD
P
5V Power Supply for Internal Regulator
36
DVSS2
P
Digital Ground
37
REGV
AO
3.3V Reference Output for Internal 5V
3.3V Regulator
Mixer Enable Select, worked with MODE pin
H: With Mixer / AA-Path Enable (With Default Mute)
38
MSEL
DI, ST
L: Without Mixer / AA-Path Disable
( H: Pull Up to 3.3V, L: Pull Down to Ground )
USB Descriptors will also be changed accordingly
39
VOLUP
DI, ST, PU
Volume Up (Edge Trigger with de-Bouncing)
Power Down Switch Control Signal (for PMOS Polarity)
40
PDSW
DO, 4mA , OD
0: Normal Operation,
1: Power Down Mode (Suspend Mode)
41
USBDP
AIO
USB Data D+
42
USBDM
AIO
USB Data D-
43
GPIO1
DIO, 8mA,
PD, 5VT
44
SDOUT
DO, 4mA, SR
45
DAMCLK
DO, 4mA, SR
46
DALRCK
DO, 4mA, SR
DAC I2S Left/Right Clock
47
DASCLK
DO, 4mA, SR
DAC I2S Serial Clock
48
VOLDN
DI, ST, PU
GPIO Pin
DAC I2S Data Output
11.2896 MHz Output for 44.1KHz Sampled Data and
12.288 MHz Output for 48KHz Sampled Data
Volume Down (Edge Trigger with de-Bouncing)
Note : DI / DO / DIO – Digital Input / Output / Bi-Directional Pad
U
U
AI / AO / AIO – Analog Input / Output / Bi-Directional Pad
SR – Slew Rate Control
ST – Schmitt Trigger
PD / PU – Pull Down / Pull Up
5VT – 5 Volt Tolerant (3.3V Pad)
OD – Open Drain
Date: Nov/01/2004
Version:
-9-
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
4. I²S INTERFACE
CM108 provide I 2 S interface for both playback and recording. External ADC, DAC, or DSP
can be added to provide additional function in the USB audio system. CM108 sends out the
master clock (fixed at x256), LRCK (fixed at x64), and data clock. Therefore external ADC,
DAC, or DSP should be set at slave mode for I 2 S interface. Left channel of I 2 S bus is used for
CM108 mono recording. Both I 2 S buses use 5V tolerant pad so they can be easily interfacing
with 5V or 3.3V devices. Playback data is simultaneously sent to both DAC and I 2 S bus.
Recording source (from ADC or from I 2 S bus) can be selected by ADSEL jumper pin.
P
P
P
P
P
P
P
P
P
P
P
P
Right Channel
Left Channel
LRCK
SCLK
SDATA
MSB
-1
-2
+2
+1
LSB
Date: Nov/01/2004
MSB
-1
-2
+2
+1
LSB
Version:
- 10 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
5. BLOCK DIAGRAM
VOLUP
VOLDN
MUTER LEDO
MUTEP LEDR GPIO
PWRSEL
MODE
PDSW MSEL
REGV
power on
reset
USB control
3.3V
-
USBDP
USBDM
reset
interface logics
5 -> 3.3
regulator
CS
SK
DW
DR
SPDIFO
VREF
16 bit
DAC
USB
interface
EEPROM
interface
LOL
0 ~ -45dB
38 steps
ISO out
processing
16 bit
DAC
LOR
0 ~ -45dB
38 steps
USB
TRX
SRAM
+12 ~ -33 dB
32 steps
ISO in
processing
MICIN
16 bit ADC
+22.5 ~ 0 dB
16 steps
12 MHz
LOBS
+
PLL1
48 MHz
clock
gen
+20dB boost enable
VREF
(2.25V)
VREF
VBIAS
IIS I/F
bandgap
4.5V
Block Diagram Of CM108
Date: Nov/01/2004
Version:
- 11 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
6. ORDERING INFORMATION
Model
Number
Package
Operating Ambient
Temperature
Supply Range
CM108
48-Pin LQFP
7mm×7mm×1.4mm (Plastic)
0 o C to +70 o C
DVdd = 5V, AVdd = 5V
Outline Dimensions *Dimensions shown in inches and (mm)
48-Lead Thin Plastic Quad Flatpack (LQFP)
Ordering Information Of CM108
Date: Nov/01/2004
Version:
- 12 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
7. FUNCTION DESCRIPTIONS
7.1 USB Interface
CM108 integrates USB transceiver, PLL, and regulator. So only a few passive
components are necessary for the USB interface connection. Default USB descriptors are
embedded in CM108; therefore no additional design effort is needed for USB operation. PID
will be changed with the MODE pin setting, so different setting will have different PID. For
customized product, customer can attach a 93C46 EEPROM to override the embedded VID,
PID and provide addition serial number for each set. CM108 will automatically detect the
93C46 existence and performs the overwrite function during power up.
7.1.1 Device Descriptor
Offset
Field
Size
0
bLength
1
1
bDescriptorType
1
Value
Description
(Hex)
12
Total 18 Bytes
01
Device Descriptor
2
bcdUSB
2
0110
4
bDeviceClass
1
00
5
bDeviceSubClass
1
00
6
bDeviceProtocol
1
00
7
bMaxPacketSize0
1
40
8
idVendor
2
0d8c
10
idProduct
2
12
bcdDevice
2
USB 1.1 compliant.
Endpoint zero Size = 64 bytes
Vendor ID
0008 ~ Product ID
000F Programmable by MSEL and MODE pin
0100 Device compliant to the Audio Device
Class specification version 1.00
14
iManufacturer
1
01
Index of string descriptor describing
manufacturer
15
iProduct
1
02
Index of string descriptor describing
product
16
iSerialNumber
1
03
Index of string descriptor describing the
device’s serial number
17
bNumConfigurations
1
01
Configurations number = 1
Note: VID, PID, and serial number can be overridden by external EEPROM content
Date: Nov/01/2004
Version:
- 13 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
7.1.2 Configuration Descriptor
Offset
Field
Size
0
bLength
1
1
bDescriptorType
1
2
wTotalLength
2
4
bNumInterfaces
1
5
bConfigurationValue
1
6
iConfiguration
1
7
bmAttributes
1
8
bMaxPower
2
Value
Description
(Hex)
09
Total 9 Bytes
02
Configuration Descriptor
Total length of data returned for this
configuration.
Programmable by MSEL and MODE pin
04 or 03 Number of interfaces supported by this
Configuration, Changed by MODE pin.
EP0: Control Interface
EP1: ISO-OUT Interface
EP2: ISO-IN Interface (Optional)
EP3: INT-IN (HID) Interface
01
00
A0 or E0 Programmable by PWRSEL
32 or FA Maximum power consumption of the
USB. Programmable by MODE and
PWRSEL Pin
7.1.3 Content Format for EEPROM (93C46)
670X
where X = bit 4, 3, 2, 1
bit 2 serial num ber enable control 1: enable 0: disable
bit 1 product string enable control 1: enable 0: disable
1W = 2B ytes
id code 2 bytes
V ID 2 bytes
address = 0
P ID 2 bytes
serial num ber
6 bytes
unused
Date: Nov/01/2004
Version:
- 14 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
7.1.4 USB Audio Topology Diagram
USB Out
IT
Speaker out
ID = 0 1
OT
ID = 0 6
F e a tu re U n it
M ix e r U n it
ID = 0 F
(v o lu m e ) (m u te )
F e a tu re U n it
ID = 0 9
(v o lu m e ) (m u te )
ID = 0 D
e n a b le o r d is a b le b y
M S E L p in
U S B IN
OT
M ic ro p h o n e In
ID = 0 7
IT
s e le c to r U n it
ID = 0 2
F e a tu re U n it
ID = 0 8
(v o lu m e ) (m u te )
ID = 0 A
Date: Nov/01/2004
Version:
- 15 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
7.2 Jumper Pins and Mode Setting:
Jumper pins can set the configuration of CM108. These jumper pin settings affect both
USB descriptors and USB audio topology.
7.2.1 MODE Pin and MSEL Pin
If MODE pin is pulled high (Speaker Mode), a playback only function is activated and
there is no recording function declared to the host. At this setting, MSEL pin is ignored and
only one input terminal, one output terminal and one feature unit is declared in USB audio
topology.
If MODE pin is pulled low (Headset Mode), a full duplex playback and recording function is
reported to the host. MSEL pin setting activates one mixer unit and one feature unit.
When MSEL = 1, Mixer is enable (AA-Path enable), but with default mute setting;
When MSEL = 0, Mixer is disable (AA-Path disable).
The above USB audio topology (7.1.4) is an example of headset mode with Mixer enable.
7.2.2 MODE Pin and PWRSEL Pin
PWRSEL pin affects the power configuration of CM108; together with MODE pin totally
4 combinations are programmable.
Combinations
3.3V
PWRSEL
GND
MODE
3.3V
GND
Speaker Mode:
Headset Mode:
Playback Only
Playback + Recording
(Self Power with 100mA) (Bus Power with 100mA)
Speaker Mode:
Headset Mode:
Playback Only
Playback + Recording
(Bus Power with 500mA) (Bus Power with 500mA)
USB Audio Topology Diagram
7.2.3 VSEL Pin
VSEL jumper pin sets the output voltage swing. When VSEL is connected to 5V, output
voltage swing is 3.5Vpp; when VSEL is connected to ground, output voltage is 2.5Vpp.
Date: Nov/01/2004
Version:
- 16 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
7.3 HID Feature
HID feature is provided by CM108 so user setting to Volume Up, Volume Down, and
Playback Mute button pin is reported to the host to synchronize host side setting. In addition,
all CM108 internal registers can be accessed via HID function call.
7.2.3 What’s HID
USB protocols can configure devices at startup or when they are plugged in at run time.
These devices are broken into various device classes. Each device class defines the
common behavior and protocols for devices that serve similar functions. The HID (Human
Interface Device) class is one of the device classes.
The HID class consists primarily of devices that are used by humans to control the operation
of computer systems. Typical examples of HID class devices include:
- Keyboards and pointing devices, for example: mouse, trackballs, and joysticks.
- Front-panel controls, for example: knobs, switches, buttons, and sliders.
- Controls that might be found on devices such as VCR remote controls, games or
simulation devices, for example: data gloves, throttles, and steering wheels.
- Devices that may not require human interaction but provide data in a similar format to
HID class devices, for example: bar-code readers, thermometers, or voltmeters.
7.2.4 HID Descriptor
HID Interface Descriptor
Offset
Field
Size
0
bLength
1
1
bDescriptorType
1
2
bInterfaceNumber
1
3
bAlternateSetting
1
Value (Hex)
09
04
03
00
4
bNumEndpoints
1
01
5
6
7
bInterfaceClass
bInterfaceSubClass
bInterfaceProtocol
1
1
1
03
00
00
8
iInterface
1
00
Date: Nov/01/2004
Description
Size of this descriptor: 9 byte
INTERFACE descriptor type
Number of Interface: 3
alternate 0
Number of endpoints used by this
Interface: 1
HID Interface Class
No Subclass
Must be set to 0
Index of a string descriptor that
describes this interface.
Version:
- 17 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
HID Descriptor
Offset
Field
0
bLength
1
bDescriptorType
2
bcdHID
4
bCountryCode
5
bNumDescriptors
6
bDescriptorType
7
Size
1
1
2
1
1
1
Value (Hex)
09
21
0100
00
01
22
2
0030
wDescriptorLength
Description
Total 9 Bytes
HID Descriptor Type
HID class version 1.00
Report Descriptor
Numeric expression that is the total size
of the optional descriptor: 48 Bytes
Interrupt IN Endpoint Descriptor
Offset
Field
Size
Value (Hex)
Description
0
bLength
1
07
Total 7 Bytes
1
bDescriptorType
1
05
ENDPOINT Descriptor Type
IN Endpoint
2
bEndpointAddress
1
83
Endpoint number = 3
3
bmAttributes
1
03
Interrupt endpoint type
4
wMaxPacketSize
2
0004
Maximum packet size: 4 bytes
6
bInterval
1
20
32ms
7.2.5 Windows Software Architecture for HID
Applications
C-Media SDK
Winmm.dll
User32.exe or User.exe
Keyboard Class Driver
Direct Input
HID.dll
Joy Stick Class Driver
Reports
(device specification)
Audio Driver
Mouse Class Driver
HID Class Driver(HIDCLASS.SYS)
Gameport MiniDriver(HIDGAME.SYS)
USB
Gameport
USB HUB Driver(USBHUB.SYS)
USB Class Driver(USBD.SYS)
PCI Enumerator
Note: Please contact with our sales for the C-Media SDK example if needed.
Date: Nov/01/2004
Version:
- 18 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
7.4 Internal Registers
All internal registers of CM108 can be accessed via generic HID functional calls without
the need to develop kernel mode driver. Totally 4 bytes of data can be read or write from HID.
Input report is for read and output report is for write. Internal registers of CM108 are used to
control GPIO, S/PDIF output, and EEPROM data access.
HID_IR0 (HID input report byte 0)
Offset : 0x00
Bits
Read/Write
Description
Default
7-6
R
00: HID_IR1 is used as GPI
10: Values written to HID_IR0-3 are also
mapped to EEPROM_DATA0-1,
EEPROM_CTRL
Others: Reserved
0x0
5-4
R
Reserved
0x0
3
R
0: No activity on Record-Mute button
1: Record-Mute button pressed then released
0x0
2
R
0: No activity on Playback-Mute button
1: Playback-Mute button pressed then
released
0x0
1
R
0: Volume-Down button released
1: Volume-Down button pressed
0x0
0
R
0: Volume-Up button released
1: Volume-Up button pressed
0x0
HID_IR1 (HID input report byte 1)
Offset : 0x01
Bits
Read/Write
7-0
R
Description
When HID_IR0[7:6] == 2’b00:
HID_IR1[3:0] is the input from GPIO4 ~
GPIO1 in input mode
When HID_OR0[7] == 1’b1:
Mapped from EEPROM_DATA0
Date: Nov/01/2004
Default
0x00
Version:
- 19 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
HID_IR2 (HID input report byte 2)
Offset : 0x02
Bits
Read/Write
7-0
R
Description
When HID_OR0[7] == 1’b1:
Mapped from EEPROM_DATA1
Default
0x00
HID_IR3 (HID input report byte 3)
Offset : 0x03
Bits
Read/Write
7-0
R
Description
When HID_OR0[7] == 1’b1:
Mapped from EEPROM_CTRL
Default
0x00
HID_OR0 (HID output report byte 0)
Offset : 0x04
Bits
Read/Write
Description
Default
7-6
R/W
0: HID_OR1-2 are used for GPO;
HID_OR0, 3 are used for SPDIF
1: Reserved
2: Values written to HID_OR0-3 are also
mapped to EEPROM_DATA0-1,
EEPROM_CTRL (See Note)
3: Reserved
0x0
5
R/W
Reserved
0x0
4
R/W
When HID_OR0[7] == 1’b0:
Valid bit in SPDIF frame
When HID_OR0[7] == 1’b1:
Reserved
0x0
3-0
R/W
When HID_OR0[7] == 1’b0:
First nibble of SPDIF status channel
When HID_OR0[7] == 1’b1:
Reserved
0x0
Note 1: When EEPROM access is done, HID interrupt will occur. USB host can get the result
from interrupt pipe (endpoint 3).
Note 2: HID_OR0 is used for SPDIF when SPDIF_CONFIG[5] == 1’b0
Date: Nov/01/2004
Version:
- 20 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
HID_OR1 (HID output report byte 1)
Offset : 0x05
Bits
Read/Write
7-0
R/W
Description
When HID_OR0[7:6] == 2’b00:
HID_OR1[3:0] is the output to GPIO4 ~
GPIO1 in output mode
0: GPO drives L
1: GPO drives H
When HID_OR0[7:6] == 2’b01:
Reserved
When HID_OR0[7:6] == 2’b1x:
Mapped to EEPROM__DATA0
Default
0x00
HID_OR2 (HID output report byte 2)
Offset : 0x06
Bits
Read/Write
7-0
R/W
Description
When HID_OR0[7:6] == 2’b00:
HID_OR2[3:0] is the mode setting for
GPIO4 ~ GPIO1
0: Set GPIO to input mode
1: Set GPIO to output mode
When HID_OR0[7:6] == 2’b01:
Reserved
When HID_OR0[7:6] == 2’b1x:
Mapped to EEPROM_DATA1
Default
0x00
HID_OR3 (HID output report byte 3)
Offset : 0x07
Bits
Read/Write
7-0
R/W
Description
When HID_OR0[7] == 1’b0:
Category byte of SPDIF status channel
When HID_OR0[7] == 1’b1:
Mapped to EEPROM_CTRL
Default
0x00
Note: HID_OR3 is used for SPDIF when SPDIF_CONFIG[5] == 1’b0
Date: Nov/01/2004
Version:
- 21 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
8. ELECTRICAL CHARACTERISTICS
8.1 Absolute Maximum Rating
Symbol
Dvmin
Dvmax
Avmin
Avmax
Dvinout
Avinout
T stg
ESD (HBM)
ESD (MM)
B
B
Parameter
Min Digital Supply Voltage
Max Digital Supply Voltage
Min Analog Supply Voltage
Max Analog Supply Voltage
Voltage on any Digital Input or Output Pin
Voltage on any Analog Input or Output Pin
Storage Temperature Range
ESD Human Body Mode
ESD Machine Mode
Value
– 0.3
+6
– 0.3
+6
–0.3 to +5.5
–0.3 to +5.5
-40 to +125
3500
200
Unit
V
V
V
V
V
V
0
C
V
V
P
P
8.2 Operation Conditions
Analog Supply Voltage
Digital Supply Voltage
Total Power Consumption
Suspend Mode Power
Consumption
Operating ambient
temperature
Operation conditions
Min
Typ
4.5
5.0
4.5
5.0
-
Max
5.5
5.5
70
Unit
V
V
mA
uA
-
-
300
0
-
70
Min
Typ
Max
Unit
20
20
0.5
16
-74.29
93.6
98.2
93.8
1.25
-
20K
20K
4.0
Bits
dB
dB
dB
dB
Hz
Hz
Vrms
V
o
P
C
P
8.3 Electrical Parameters
DAC (10K Ohm Loading)
Resolution
THD + N (-3dBr)
SNR
Silent SNR
Dynamic range
Frequency response 48KHz
Frequency Response 44.1KHz
Output Voltage (rms)
Output Voltage Swing
Date: Nov/01/2004
Version:
- 22 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
DAC (32 Ohm Loading)
Resolution
THD + N (-3dBr)
SNR
Silent SNR
Dynamic Range
Frequency Response 48KHz
Frequency Response 44.1KHz
Output Voltage (rms)
Output Voltage Swing
ADC
Resolution
THD + N (-3dBr)
SNR
Dynamic Range
Frequency Response 48KHz
Frequency Response 44.1KHz
Input Range
Amplification
Volume Control Level
Volume Control Step
Microphone Input
Boost Gain
Gain Adjustment Range
Gain Adjustment Steps
Mixer Gain Adjustment
Mixer Gain Adjustment Steps
20
20
0.5
16
-71.1
93.7
98.2
93.8
1.25
-
20K
20K
4.0
Vrms
V
20
20
0
16
-76.1
83.1
81.6
-
19.2K
17.6K
2.88
bit
dB
dB
dB
Hz
Hz
Vpp
-45
-
38
0
-
dB
Steps
0
-33.0
-
+20
16
32
22.5
12.0
-
dB
dB
Steps
dB
Steps
Date: Nov/01/2004
Bits
dB
dB
dB
dB
Hz
Version:
- 23 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
9. FREQUENCY RESPONSE GRAPHS
9.1 Digital Playback for Line Output Frequency (10K Ohm Loading)
9.1.1 Frequency Response 48Ks/Sec (10K Ohm Loading)
C-Media
Digital Playback (PC-D-A) for Line Output Frequency Response
07/15/03 19:03:14
+1
+0
d
B
r
A
-1
-2
-3
-4
-5
-6
30
50
100
200
500
1k
2k
5k
10k
Hz
Color
Line Style
Thick
Data
Axis
Green
Yellow
Solid
Solid
2
2
Fasttest.Ch.1 Ampl!Normalize
Fasttest.Ch.2 Ampl!Normalize
Left
Left
9.1.2 Frequency Response 44.1Ks/Sec (10K Ohm Loading)
C-Media
Digital Playback (PC-D-A) for Line Output Frequency Response 07/15/03 19:05:40
+1
+0
d
B
r
-1
A
-4
-2
-3
-5
-6
20
50
100
200
500
1k
2k
5k
10k
Hz
Color
Line Style
Thick
Data
Axis
Green
Yellow
Solid
Solid
2
2
Fasttest.Ch.1 Ampl!Normalize
Fasttest.Ch.2 Ampl!Normalize
Left
Left
Date: Nov/01/2004
Version:
- 24 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
9.2 Digital Playback for Line Output Frequency (32 Ohm Loading)
9.2.1 Frequency Response 48Ks/Sec (32 Ohm Loading)
C-Media
Digital Playback (PC-D-A) for Line Output Frequency Response
+1
+0
d
B
r
1
-1
-2
-3
-4
-5
-6
20
50
100
200
500
1k
2k
5k
10k
Hz
Color
Line Style
Thick
Data
Axis
Cyan
Yellow
Solid
Solid
2
2
Fasttest.Ch.1 Ampl!Normalize
Fasttest.Ch.2 Ampl!Normalize
Left
Left
9.2.2 Frequency Response 44.1Ks/Sec (32 Ohm Loading)
C-Media
Digital Playback (PC-D-A) for Line Output Frequency Response
+1
+0
-1
d
B
-2
-3
-4
-5
-6
20
50
100
200
500
1k
2k
5k
10k
Hz
Color
Line Style
Thick
Data
Axis
Green
Yellow
Solid
Solid
2
2
Fasttest.Ch.1 Ampl!Normalize
Fasttest.Ch.2 Ampl!Normalize
Left
Left
Date: Nov/01/2004
Version:
- 25 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
9.3 Digital Recording for Line Output Frequency
9.3.1 Frequency Response 48Ks/Sec
C-Media
Digital Recording (A-D-PC) for Line Input Frequency Response 07/21/03 14:27:29
+1
+0
d
B
r
A
-1
-2
-3
-4
-5
-6
30
50
100
200
500
1k
2k
5k
10k
Hz
Sweep
Trace
Color
Line Style
Thick
Data
Axis
1
1
1
2
Cyan
Yellow
Solid
Solid
2
2
Fasttest.Ch.1 Ampl!Normalize
Fasttest.Ch.2 Ampl!Normalize
Left
Left
Comment
9.3.2 Frequency Response 44.1Ks/Sec
C-Media
Digital Recording (A-D-PC) for Line Input Frequency Response 07/21/03 15:16:55
+1
+0
d
B
r
-1
A
-4
-2
-3
-5
-6
20
50
100
200
500
1k
2k
5k
10k
Hz
Sweep
Trace
Color
Line Style
Thick
Data
Axis
1
1
1
2
Cyan
Yellow
Solid
Solid
2
2
Fasttest.Ch.1 Ampl!Normalize
Fasttest.Ch.2 Ampl!Normalize
Left
Left
Date: Nov/01/2004
Comment
Version:
- 26 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
10. REFERENCE APPLICATION CIRCUIT
Date: Nov/01/2004
Version:
- 27 -
1.5
CM108
Integration Dual DAC, Earphone Driver, ADC,
Microphone Booster, PLL, Regulator, and USB Transceiver
REFERENCE
♦
Universal Serial Bus Specification, Version 2.0
♦
Universal Serial Bus Device Class Definition for Audio Devices, Version 1.0.
♦
Universal Serial Bus Device Class Definition for Human Interface Devices, Version 1.11
-End of Specifications-
C-MEDIA ELECTRONICS INC.
6F., 100, Sec. 4, Civil Boulevard, Taipei, Taiwan 106 R.O.C.
TEL:886-2-8773-1100
FAX:886-2-8773-2211
E-mail: sales@cmedia.com.tw
TU
UT
URL: http://www.cmedia.com.tw
TU
Date: Nov/01/2004
UT
Version:
- 28 -
1.5