ETC NVP2020

NVP2020
Data Sheet
CCD Image Signal Processor
Information contained here is subject to change without notice.
Make sure to check and use an updated version of the Data Sheet.
www.nextchip.com
2007.03.12
REV 0.0
N V P 2020
CCD Image Signal Processor
CCD Image Signal Processor
NVP2020 outputs CVBS or S-Video after receiving CFA patterns from the color-interlaced CCD, which are
processed through an internal encoder and DAC. Equipped with built-in AE/AWB algorithms, timing generation
module and OSD, NVP2020 can be operated without MICOM. NVP2020 can support high resolution output of
520 TV lines and has enhanced BLC function and motion detection function in 64 areas.
Ordering Information
Features
-. Input : NTSC/PAL, 510H/760H CCD format
-. Output : NTSC/PAL Analog S-Video or CVBS
-. 3-line color processing
Device
Package Temperature Range
NVP2020
64-LQFP
0
~ 70
-. Programmable GAMMA processing
-. H/V Aperture
-. Video adjustment (brightness, contrast, saturation and hue)
Applications
-. High quality color processing
-. Door Phone Camera
-. Horizontal MIRROR
-. On Screen Display (OSD )
-. Video Phone Camera
-. CCD Camera
-. Rear-view Monitoring Camera
CONFIDENTIAL
-. Blemish Compensation 32 points(Auto/Manual)
-. Color rolling suppress.
-. Breathing suppress.
-. Support Horizontal Resolution 520TV Lines
-. Privacy Mask 4 Zone
-. Motion detection (64 area)
-. On-chip AE/AWB
-. On-chip CCD timing generator
Related Products
-. CCD
: SONY, SHARP , PANASONIC CCD
(510H/760H)
-. AFE
: AD9806,AD9943 (Analog Device)
-. V-Driver : NVD2014 (NEXTCHIP)
SWITRON
-. On-chip NTSC/PAL video encoder
-. On-chip DAC(S-video or CVBS)
-. I2C interface for EEPROM (MICOM less camera)
-. Serial interface for AFE
-. 3.3V operation
Functional Block Diagram
Data sheet
03.12.2007 (REV 0.0)
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CCD Image Signal Processor
[[ Table of Contents ]]
1.
Pin Information ..........................................................................................................................................
4
1.1 Pin Assignments ...........................................................................................................................4
1.2 Pin Description ..............................................................................................................................5
2. Register Description ...................................................................................................................................... 7
2.1 Register Map...................................................................................................................................7
2.1 Register Description ......................................................................................................................15
3. Electrical characteristics ............................................................................................................................... 38
3.1 Absolute Maximum Ratings ..........................................................................................................38
3.2 Recommended Operating Condition ............................................................................................38
3.3 DC Characteristics ........................................................................................................................38
4. System Application ........................................................................................................................................39
4.1 Circuit Guide ..................................................................................................................................39
CONFIDENTIAL
4.2 Package Information ......................................................................................................................42
5. Revision History ...........................................................................................................................................43
6. Contact Information ........................................................................................................................................43
SWITRON
Data sheet
03.12.2007 (REV 0.0)
3/43
N V P 2020
1.
CCD Image Signal Processor
Pin Information
1.1 Pin Assignments
CONFIDENTIAL
SWITRON
Data sheet
03.12.2007 (REV 0.0)
4/43
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CCD Image Signal Processor
1.2 Pin Description
PIN
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
SYMBOL
I/O
DESCRIPTION
VSS
VDD5
H2
H1
XRG
VSS
VDD3
VDD3
VSS
VDDi
XSUB
V2
V1
XSG1
V3
XSG2
V4
AFE_SCL
AFE_SDA
AFE_SLD
EXP_IO_1
EXP_IO_2
EXP_IO_3
VDD3
XTALI
XTALO
VSS
VSS
EXP_IO_4
I2C_SCL
I2C_SDA
TST0
VSS
EXP_I_1
EXP_I_2
EXP_I_3
RSTB
VDDi
VDD3
DAC1
AVDD3
VSSA
DAC2
AVDD3
G
P
O
O
O
G
P
P
G
P
O
O
O
O
O
O
O
O
I/O
O
I/O
I/O
I/O
P
I
O
G
G
I/O
I/O
I/O
I
G
I
I
I
I
P
P
O
P
G
O
P
Digital Ground (for SHP, SHD)
5V Digital Power (for XRG, H1, H2 pulse)
CCD Horizontal Driving pulse 2
CCD Horizontal Driving pulse 1
CCD Reset gate pulse
Digital Ground (for XRG, H1, H2 pulse)
3.3V Digital Power
3.3V Digital Power
Digital Ground
1.8V Internal Core Power(Connect to VSS via external capacitor)
CCD shutter speed control pulse
CCD vertical driving pulse phase-2
CCD vertical driving pulse phase-1
CCD Read out pulse 1
CCD vertical driving pulse phase-3
CCD Read out pulse 2
CCD vertical driving pulse phase-4
3-wire Serial interface clock output (for AFE control)
3-wire Serial data input/output (for AFE control)
3-wire Serial Enable output (for AFE control)
External input/output control Pin
External input/output control Pin
External input/output control Pin
3.3V Digital Power
X-tal input(NTSC:28.6363MHz : PAL:28.375MHz)
X-tal output
Digital Ground
Digital Ground
External input/output control Pin
I2C Serial Clock (EEPROM/MICOM interface)
I2C Serial Data (EEPROM/MICOM interface)
Chip Test pin
Digital Ground
External input control Pin
External input control Pin
External input control Pin
System Reset (active low)
1.8V Internal Core Power(Connect to VSS via external capacitor)
3.3V Digital Power
DAC Output (LUMA/CHROMA/CVBS/IRIS/GND signal Output)
3.3V DAC Analog Power
DAC Analog Ground
DAC Output (LUMA/CHROMA/CVBS/IRIS/GND signal Output)
3.3V DAC Analog Power
CONFIDENTIAL
Data sheet
03.12.2007 (REV 0.0)
SWITRON
5/43
N V P 2020
PIN
NO.
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
CCD Image Signal Processor
SYMBOL
I/O
DESCRIPTION
VSSA
COMP
IREF
VREF
VSSUB
CFAIN[9]
CFAIN[8]
CFAIN[7]
CFAIN[6]
CFAIN[5]
CFAIN[4]
CFAIN[3]
CFAIN[2]
CFAIN[1]
CFAIN[0]
VSS
ADCLK
VDD3
SHP
SHD
G
G
I
I
I
I
I
I
I
I
I
I
G
O
P
O
O
DAC Analog Ground
DAC comparator reference
DAC current reference
DAC Voltage reference
DAC Analog Ground
CCD CFA pattern input 9
CCD CFA pattern input 8
CCD CFA pattern input 7
CCD CFA pattern input 6
CCD CFA pattern input 5
CCD CFA pattern input 4
CCD CFA pattern input 3
CCD CFA pattern input 2
CCD CFA pattern input 1
CCD CFA pattern input 0
Digital Ground
ADC sampling clock
3.3V Digital Power (for SHP, SHD)
CDS sample & hold pulse for pre-charge
CDS sample & hold pulse for data
CONFIDENTIAL
SWITRON
Data sheet
03.12.2007 (REV 0.0)
6/43
N V P 2020
CCD Image Signal Processor
2. Register Information
2.1 Register Map
BANK 0
ADDR
ISP
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
EEPROM
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
RESISTER
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
DEF.
0xAA
0x55
0xAA
0x55
H1_P
H2_P
SHP_P
SHD_P
RG_P
ADCLK_P
XSUB_P
PBLK_P
CLPOB_P CLPDM_P
NTSC
HIGH
CCD_TYPE[1:0]
1'b0
SEL_27M
H1_HW
H2_HW
H1_DELAY[5:0]
H2_DELAY[5:0]
SHP_DELAY[5:0]
SHD_DELAY[5:0]
RG_DELAY[5:0]
ADCLK_DELAY[5:0]
H1_WIDTH[2:0]
H2_WIDTH[2:0]
SHD_WIDTH[2:0]
SHP_WIDTH[2:0]
SHP_HW
SHD_HW
RG_HW
RG_WIDTH[2:0]
AFE_00[15:8]
AFE_00[07:0]
AFE_01[15:8]
AFE_01[07:0]
AFE_02[15:8]
AFE_02[07:0]
AFE_03[15:8]
AFE_03[07:0]
AFE_04[15:8]
AFE_04[07:0]
PGA_LENGTH[2:0]
PGA_DUMMY[1:0]
PGA_LOC[2:0]
CLAMP
AFE_PCON
PGA_ADDR[5:0]
CLAMP_REG[4:0]
DAY_IR_P
CLAMP_LEVEL[1:0]
H_OFFSET
SHPD_TYPE
HP_DLL_EN
BPF_SEL[1:0]
H_SIZE[3:0]
Y_GAIN
H_EDGE_OFF
Y_CLIP[6:0]
OSD_DIS_ON
DAY_EX[1:0]
REL_TH
MIRROR_POS[3:0]
Y_GAMMA0
Y_GAMMA1
Y_GAMMA2
Y_GAMMA3
Y_GAMMA4
Y_GAMMA5
Y_GAMMA6
Y_GAMMA7
HAP_SLICE1[3:0]
HAP_SLICE2[3:0]
VAP_SLICE[3:0]
VAP_GAIN[3:0]
SEL_UP[3:0]
SEL_RIGHT[3:0]
PEAK_GAIN[2:0]
HAP_GAIN1[4:0]
1'b0
1'b0
1'b0
HAP_GAIN2[4:0]
BF_DLY[3:0]
PEAK_SLICE[3:0]
SUE_AGC_LEVEL
SUC_AGC_GAIN[3:0]
SUE_AGC_GAIN[3:0]
SUC_AGC_LEVEL
SUC_HL_HLEVEL[3:0]
SUC_HL_LLEVEL[3:0]
SUC_HL_GAIN[3:0]
SUC_EDGE_GAIN[3:0]
C_GAMMA0
CONFIDENTIAL
Data sheet
03.12.2007 (REV 0.0)
SWITRON
0x00
0x00
0x00
0x00
0x00
0x80
0x00
0x00
0x00
0x00
0x20
0x82
0x00
0x40
0x00
0xC0
0x00
0x00
0x00
0x04
0x70
0x43
0x40
0x80
0x4C
0xB1
0x90
0x01
0x10
0x25
0x41
0x68
0x9E
0xE7
0xFF
0x45
0x45
0x00
0x0A
0x09
0x63
0x22
0x28
0x30
0x90
0x31
0x01
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CCD Image Signal Processor
BANK 0
ADDR
ISP
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
0x60
0x61
0x62
0x63
0x64
0x65
0x66
EEPROM
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
0x60
0x61
0x62
0x63
0x64
0x65
0x66
0x67
0x68
0x69
0x6A
RESISTER
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
C_GAMMA1
C_GAMMA2
C_GAMMA3
C_GAMMA4
C_GAMMA5
C_GAMMA6
C_GAMMA7
GAIN_RS1
GAIN_RS2
GAIN_BS1
GAIN_BS2
CCY_GAIN
CCR_GAIN
CCB_GAIN
CFIR_SEL
CCRB_ID
S1_ID
TEST_PATTERN[1:0]
YFIR_SEL[1:0]
CLP_RS1[5:0]
CLP_RS2[5:0]
CLP_BS1[5:0]
CLP_BS2[5:0]
IR_GAIN_MENU_ON
CCORR
CCORG
CCORB
CCOGR
CCOGG
CCOGB
CCOBR
CCOBG
CCOBB
RWB
GWB
BWB
RBLK
GBLK
BBLK
CR_GAIN
CB_GAIN
HUE1
HUE2
HUE3
HUE4
HUE5
HUE6
UV_GAIN1
UV_GAIN2
UV_GAIN3
UV_GAIN4
UV_GAIN5
UV_GAIN6
CONFIDENTIAL
SWITRON
BLC
BLC_AREA_VIEW
MOTION_AGC[3:0]
BLC_GAIN[5:0]
MOTION_HIGH[3:0]
AE_LEVEL
BLC_LEVEL
MOTION_THL
DAY_EXT_IN_P
Data sheet
03.12.2007 (REV 0.0)
OSD_MDP[2:0]
IRIS_LG_ON
IRIS_DAC_PORT
DAC_SL_MSEL
MAX1_AGC
MAX2_AGC
ESS_ZONE[3:0]
AED_ZONE[3:0]
MENU_LENS_DM
DEF.
0x10
0x25
0x41
0x68
0x9E
0xE7
0xFF
0x80
0x80
0x80
0x80
0x80
0x80
0x80
0x3F
0xBF
0xFF
0x3F
0xA0
0x2E
0x4E
0x6C
0x87
0xAC
0xC6
0x52
0xC4
0x5A
0x4A
0x51
0x00
0x00
0x00
0x80
0x80
0x00
0x00
0x00
0x00
0x00
0x00
0x80
0x80
0x80
0x80
0x80
0x80
0x95
0x40
0x54
0x40
0x0F
0x48
0xD0
0x00
0x75
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CCD Image Signal Processor
BANK 0
ADDR
ISP
0x67
0x68
0x69
0x6A
0x6B
0x6C
0x6D
0x6E
0x6F
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x78
0x79
0x7A
0x7B
0x7C
0x7D
0x7E
0x7F
0x80
0x81
0x82
0x83
0x84
0x85
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
0x8E
0x8F
0x90
0x91
0x92
0x93
0x94
0x95
0x96
0x97
0x98
0x99
0x9A
0x9B
0x9C
0x9D
0x9E
EEPROM
0x6B
0x6C
0x6D
0x6E
0x6F
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x78
0x79
0x7A
0x7B
0x7C
0x7D
0x7E
0x7F
0x80
0x81
0x82
0x83
0x84
0x85
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
0x8E
0x8F
0x90
0x91
0x92
0x93
0x94
0x95
0x96
0x97
0x98
0x99
0x9A
0x9B
0x9C
0x9D
0x9E
0x9F
0xA0
0xA1
0xA2
RESISTER
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
ESS_SDLY[3:0]
AGC_SDLY[3:0]
AE_DG_REG[9:8]
AGC_REG[9:8]
AE_SPD[3:0]
AE_DG_REG[7:0]
AGC_REG[7:0]
MOTION_TEST
AE_MODE[1:0]
SSM[2:0]
IRIS_LENS[1:0]
BTN_REPT_ON
OSD_TRANS[1:0]
ME_ESS[12:8]
ME_ESS[7:0]
R_MAX
B_MAX
R_MIN
B_MIN
AWB_HIGH
AWB_MODE[1:0]
AWB_DIP[1:0]
PZ_STATE[3:0]
AWB_LOW
R_CLP[3:0]
B_CLP[3:0]
INTVAL_H[3:0]
INTVAL_L[3:0]
AWB_SPD[3:0]
STA_ZONE[3:0]
STA_IN_LMT[3:0]
STA_OUT_LMT[3:0]
1'b0
AWB_R0
AWB_R1
AWB_R2
AWB_R3
AWB_B0
AWB_B1
AWB_B2
AWB_B3
AWB_R_OFFSET
AWB_B_OFFSET
DAY_NIGHT_START
DAY_NIGHT_END
DAY_ON[1:0]
DAY_DLY[5:0]
SEL_EXPO_04[3:0]
SEL_EXPO_03[3:0]
SEL_EXPO_06[3:0]
SEL_EXPO_05[3:0]
1'b0
MBK_ON
MENU_BKSEL[1:0]
SC_OFFSET[4:0]
MENU_BTN3 DAY_EXT_IN_REG
1'b0
DEF_M_SEL[4:0]
HXV_OFFSET
PRE_Y_GAIN
EDGE_S[3:0]
EDGE_E[3:0]
DAY_BURST_ON
MOTION_EN
M_VIEW_ON
PZ_ON
PZ_COLOR[3:0]
PZ_SH0
PZ_SV0
PZ_EH0
PZ_EV0
PZ_SH1
PZ_SV1
PZ_EH1
PZ_EV1
PZ_SH2
PZ_SV2
PZ_EH2
PZ_EV2
PZ_SH3
PZ_SV3
PZ_EH3
CONFIDENTIAL
Data sheet
03.12.2007 (REV 0.0)
SWITRON
DEF.
0x00
0x4F
0x00
0x00
0x42
0xE0
0x15
0x8D
0x43
0x64
0xCB
0xF0
0x40
0x07
0xFF
0x44
0xF4
0x11
0x00
0x40
0x04
0x6D
0x42
0x40
0x00
0xEE
0x3C
0x10
0x08
0xC3
0x97
0x41
0x00
0x00
0x00
0x00
0x04
0x00
0x80
0x02
0x58
0x18
0x10
0x30
0x30
0x50
0x10
0x68
0x30
0x18
0x40
0x30
0x60
0x50
0x40
0x68
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CCD Image Signal Processor
BANK 0
ADDR
ISP
0x9F
0xA0
0xA1
0xA2
0xA3
0xA4
0xA5
0xA6
0xA7
0xA8
0xA9
0xAA
0xAB
0xAC
0xAD
0xAE
0xAF
0xB0
0xB1
0xB2
0xB3
0xB4
0XB5
0xB6
0xB7
0xB8
0xB9
0xBA
0xBB
0xBC
0xBD
0xBE
0xBF
0xC0
0xC1
0xC2
0xC3
0xC4
0XC5
0xC6
0xC7
0xC8
0xC9
0xCA
0xCB
0xCC
0xCD
0xCE
0xCF
0xD0
0xD1
0xD2
0xD3
0xD4
0xD5
0xD6
EEPROM
0xA3
0xA4
0xA5
0xA6
0xA7
0xA8
0xA9
0xAA
0xAB
0xAC
0xAD
0xAE
0xAF
0xB0
0xB1
0xB2
0xB3
0xB4
0xB5
0xB6
0xB7
0xB8
0xB9
0xBA
0xBB
0xBC
0xBD
0xBE
0xBF
0xC0
0xC1
0xC2
0xC3
0xC4
0xC5
0xC6
0xC7
0xC8
0xC9
0xCA
0xCB
0xCC
0xCD
0xCE
0xCF
0xD0
0xD1
0xD2
0xD3
0xD4
0xD5
0xD6
0xD7
0xD8
0xD9
0xDA
RESISTER
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
PZ_EV3
POWER_FRE [1:0]
IRIS_P
MOTION_TH_AREA[3:0]
SEL_ENTER[3:0]
MIRROR M_CURSOR_ON
BTN_DLY[3:0]
U_BURST[9:8]
V_BURST[9:8]
IRIS_DC[1:0]
DAC1_OUT[3:0]
MOTION_THF[3:0]
HVAP_GAIN[4:0]
SEL_IRIS_LENS[3:0]
SEL_DOWN[3:0]
M_CURSOR[5:0]
AWB_M_R
AWB_M_B
IRIS_LEVEL
IRIS_GAIN
BTN_MENU_DLY[3:0]
Y_OFFSET
SYNC_REG[5:0]
BLACK_REG[5:0]
U_BURST[7:0]
V_BURST[7:0]
IRIS_BLC_OFFSET[4:0]
DAC_P
DAC2_OUT[3:0]
MOTION_TH
SLPF_SEL
AE_OUT_LMT[2:0]
MOTION_AREA[63:56]
MOTION_AREA[55:48]
MOTION_AREA[47:40]
MOTION_AREA[39:32]
MOTION_AREA[31:24]
MOTION_AREA[23:16]
MOTION_AREA[15:8]
MOTION_AREA[7:0]
BLC_AREA_SEL[63:56]
BLC_AREA_SEL[55:48]
BLC_AREA_SEL[47:40]
BLC_AREA_SEL[39:32]
BLC_AREA_SEL[31:24]
BLC_AREA_SEL[23:16]
BLC_AREA_SEL[15:8]
BLC_AREA_SEL[7:0]
SEL_MIRROR[3:0]
SEL_AGC[3:0]
SEL_AE0[3:0]
SEL_SSM0[3:0]
SEL_SSM2[3:0]
IRIS_GMIN[3:0]
IR_GAIN[7:0]
OSD_DATA[8]
OSD_POS[9:8]
OSD_CSEL[1:0]
OSD_POS[7:0]
OSD_DATA[7:0]
DEFT_STPOS[4:0]
OSD_COLOR_00[3:0]
OSD_COLOR_02[3:0]
GAMMA_SEL[4:0]
ID_REG00[5:0]
ID_REG01[5:0]
ID_REG02[5:0]
ID_REG03[5:0]
ID_REG04[5:0]
ID_REG05[5:0]
ID_REG06[5:0]
CONFIDENTIAL
SWITRON
SEL_DAY_EXT[3:0]
SEL_BLC[3:0]
SEL_AE1[3:0]
SEL_SSM1[3:0]
SEL_LEFT[3:0]
IRIS_GMAX[3:0]
OSD_BLINK
OSD_SAVE
1'b0
OSD_ON
OSD_LPF_ON
OSD_CLEAR
OSD_COLOR_01[3:0]
OSD_COLOR_03[3:0]
MENU_LANG[2:0]
ID_REG12[1:0]
ID_REG12[3:2]
ID_REG12[5:4]
ID_REG13[1:0]
ID_REG13[3:2]
ID_REG13[5:4]
ID_REG14[1:0]
Data sheet
03.12.2007 (REV 0.0)
DEF.
0x60
0x50
0x00
0x00
0x00
0x40
0x40
0x40
0x80
0x05
0x00
0xCE
0x15
0x9F
0x00
0x09
0x00
0x22
0x08
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x40
0x00
0x00
0x40
0xD3
0x30
0x08
0x00
0x00
0x00
0x00
0x00
0x00
0x00
10/43
N V P 2020
CCD Image Signal Processor
BANK 0
ADDR
ISP
0xD7
0xD8
0xD9
0xDA
0xDB
0xDC
0xDD
0xDE
0xDF
0xE0
0xE1
0xE2
0xE3
0xE4
0xE5
0xE6
0xE7
0xE8
0xE9
0xEA
0xEB
0xEC
0xED
0xEE
0xEF
0xF0
0xF1
0xF2
0xF3
0xF4
0xF5
0xF6
0xF7
0xF8
0xF9
0xFA
EEPROM
0xDB
0xDC
0xDD
0xDE
0xDF
0xE0
0xE1
0xE2
0xE3
0xE4
0xE5
0xE6
0xE7
0xE8
0xE9
0xEA
0xEB
0xEC
0xED
0xEE
0xEF
0xF0
0xF1
0xF2
0xF3
0xF4
0xF5
0xF6
0xF7
0xF8
0xF9
0xFA
0xFB
0xFC
0xFD
0xFE
RESISTER
[7]
[6]
[5]
[4]
[3]
ID_REG14[3:2]
ID_REG14[5:4]
ID_POS_Y[1:0]
ID_POS_Y[3:2]
ID_POS_X[1:0]
MAX_AGC_SEL
DAY_MOTOR_P
MENU_ICON_OFF
1'b0
NEGATIVE_IMG
HPF_SEL
OSD_OLEN
AWB_AE_DETECT
AWB_TR_CLIP
AWB_METHOD3
MENU_LOGO_OFF
[1]
[0]
ID_REG07[5:0]
ID_REG08[5:0]
ID_REG09[5:0]
ID_REG10[5:0]
ID_REG11[5:0]
BLINK_TIME[1:0]
DAY_PULSE_SEL[1:0]
MENU_OFF_TIME[1:0]
BLK_TH[1:0]
BLK_GAIN[1:0]
HAP_CLIP1[1:0]
VAP_CLIP[1:0]
AWB_METHOD1[1:0]
AWB_METHOD2[1:0]
AE_GMAX[1:0]
OSD_ID_ON
1'b0
[2]
ID_POS_Y[4]
HAP_SUP_SEL
MENU_BKT[1:0]
AFE_DAC2_ON DEF_FA_ON
BTN_P
DEF_FA_VALUE[2:0]
OSD_MOLEN
Y_CLIP_TH[1:0]
MENU_IRIS_GAIN_P
MOTION_DELAY[1:0]
CLPOB_SIZE[3:0]
1'b0
ID_POS_X[4:2]
POS_LEN[4:0]
POS_SHT[4:0]
POS_BLC[4:0]
POS_AGC[4:0]
POS_WBL[4:0]
POS_FNC[4:0]
POS_ADJ[4:0]
POS_LGG[4:0]
POS_CID[4:0]
POS_MIR[4:0]
POS_DAY[4:0]
POS_MOT[4:0]
POS_PRI[4:0]
POS_GAM[4:0]
POS_DEF[4:0]
CLPOB_POS[3:0]
CONFIDENTIAL
AFE_DAC1_ON IRIS_AFE_DC
INIT_SCR
MENU_SH0[7:0]
MENU_EH0[7:0]
MENU_SV0[7:0]
ADC_SET
bank_reg
MENU_EV0[7:0]
MENU_SH1[7:0]
MENU_EH1[7:0]
MENU_SV1[7:0]
MENU_EV1[7:0]
SLAVE_ADDR[3:0]
SWITRON
MENU_BKC1[3:0]
test1
SD_H1[1:0]
SL_H1
SD_RG[1:0]
SL_RG
Data sheet
03.12.2007 (REV 0.0)
SD_H2[1:0]
MENU_BKC0[3:0]
DAC1_SL
DAC2_SL
1'b0
SL_H2
HAP_SUPPRESS[4:0]
1'b0
1'b0
DEF.
0x00
0x00
0x00
0x00
0x00
0xD9
0x81
0x62
0x03
0x04
0xE5
0x66
0x87
0xF2
0x4C
0x2D
0x4E
0x0F
0x70
0x11
0x93
0x88
0x14
0x6C
0x0F
0x05
0x00
0x20
0x14
0x6C
0x21
0x6A
0x07
0x18
0x00
0x00
11/43
N V P 2020
CCD Image Signal Processor
BANK 1
ADDR
ISP
0x01
0x02
0x03
0x04
0x05
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
EEPROM
0x01
0x02
0x03
0x04
0x05
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
RESISTER
[7]
[6]
[5]
[4]
[3]
DEFECT_FCNT[3:0]
[2]
[1]
[0]
DIFF_CNT[3:0]
COMPEN_START
DSER_START
DEFECT_AUTO DEFECT_MANUAL RELE_EN
DIFF_DFT[3:0]
NEW_EN
REL_FCNT[3:0]
OFFSET_NEW[3:0]
DEF_V_00[9:8]
DEF_V_01[9:8]
DEF_V_02[9:8]
DEF_V_03[9:8]
DEF_H_00[7:0]
DEF_V_00[7:0]
DEF_H_00[9:8]
DEF_D_00[5:0]
DEF_H_01[7:0]
DEF_V_01[7:0]
DEF_H_01[9:8]
DEF_D_01[5:0]
DEF_H_02[7:0]
DEF_V_02[7:0]
DEF_H_02[9:8]
DEF_D_02[5:0]
DEF_H_03[7:0]
DEF_V_03[7:0]
DEF_H_03[9:8]
DEF_D_03[5:0]
DEF_V_04[9:8]
DEF_V_05[9:8]
DEF_V_06[9:8]
DEF_V_07[9:8]
DEF_H_04[7:0]
DEF_V_04[7:0]
DEF_H_04[9:8]
DEF_D_04[5:0]
DEF_H_05[7:0]
DEF_V_05[7:0]
DEF_H_05[9:8]
DEF_D_05[5:0]
DEF_H_06[7:0]
DEF_V_06[7:0]
DEF_H_06[9:8]
DEF_D_06[5:0]
DEF_H_07[7:0]
DEF_V_07[7:0]
DEF_H_07[9:8]
DEF_D_07[5:0]
DEF_V_08[9:8]
DEF_V_09[9:8]
DEF_V_10[9:8]
DEF_V_11[9:8]
DEF_H_08[7:0]
DEF_V_08[7:0]
DEF_H_08[9:8]
DEF_D_08[5:0]
DEF_H_09[7:0]
DEF_V_09[7:0]
DEF_H_09[9:8]
DEF_D_09[5:0]
DEF_H_10[7:0]
DEF_V_10[7:0]
DEF_H_10[9:8]
DEF_D_10[5:0]
DEF_H_11[7:0]
DEF_V_11[7:0]
DEF_H_11[9:8]
DEF_D_11[5:0]
DEF_V_12[9:8]
DEF_V_13[9:8]
DEF_V_14[9:8]
DEF_V_15[9:8]
DEF_H_12[7:0]
DEF_V_12[7:0]
DEF_H_12[9:8]
DEF_D_12[5:0]
DEF_H_13[7:0]
DEF_V_13[7:0]
DEF_H_13[9:8]
DEF_D_13[5:0]
DEF_H_14[7:0]
DEF_V_14[7:0]
DEF_H_14[9:8]
DEF_D_14[5:0]
DEF_H_15[7:0]
DEF_V_15[7:0]
CONFIDENTIAL
Data sheet
03.12.2007 (REV 0.0)
SWITRON
DEF.
0x02
0x0A
0x26
0x20
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
12/43
N V P 2020
CCD Image Signal Processor
BANK 1
ADDR
ISP
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
0x60
0x61
0x62
0x63
0x64
0x65
0x66
0x67
0x68
0x69
0x6A
0x6B
0x6C
0x6D
0x6E
0x6F
0x70
0x71
0x72
EEPROM
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
0x60
0x61
0x62
0x63
0x64
0x65
0x66
0x67
0x68
0x69
0x6A
0x6B
0x6C
0x6D
0x6E
0x6F
0x70
0x71
0x72
RESISTER
[7]
[6]
[5]
[4]
[3]
[2]
[1]
DEF_H_15[9:8]
DEF_V_16[9:8]
[0]
DEF_D_15[5:0]
DEF_V_17[9:8]
DEF_V_18[9:8]
DEF_V_19[9:8]
DEF_H_16[7:0]
DEF_V_16[7:0]
DEF_H_16[9:8]
DEF_D_16[5:0]
DEF_H_17[7:0]
DEF_V_17[7:0]
DEF_H_17[9:8]
DEF_D_17[5:0]
DEF_H_18[7:0]
DEF_V_18[7:0]
DEF_H_18[9:8]
DEF_D_18[5:0]
DEF_H_19[7:0]
DEF_V_19[7:0]
DEF_H_19[9:8]
DEF_D_19[5:0]
DEF_V_20[9:8]
DEF_V_21[9:8]
DEF_V_22[9:8]
DEF_V_23[9:8]
DEF_H_20[7:0]
DEF_V_20[7:0]
DEF_H_20[9:8]
DEF_D_20[5:0]
DEF_H_21[7:0]
DEF_V_21[7:0]
DEF_H_21[9:8]
DEF_D_21[5:0]
DEF_H_22[7:0]
DEF_V_22[7:0]
DEF_H_22[9:8]
DEF_D_22[5:0]
DEF_H_23[7:0]
DEF_V_23[7:0]
DEF_H_23[9:8]
DEF_D_23[5:0]
DEF_V_24[9:8]
DEF_V_25[9:8]
DEF_V_26[9:8]
DEF_V_27[9:8]
DEF_H_24[7:0]
DEF_V_24[7:0]
DEF_H_24[9:8]
DEF_D_24[5:0]
DEF_H_25[7:0]
DEF_V_25[7:0]
DEF_H_25[9:8]
DEF_D_25[5:0]
DEF_H_26[7:0]
DEF_V_26[7:0]
DEF_H_26[9:8]
DEF_D_26[5:0]
DEF_H_27[7:0]
DEF_V_27[7:0]
DEF_H_27[9:8]
DEF_D_27[5:0]
DEF_V_28[9:8]
DEF_V_29[9:8]
DEF_V_30[9:8]
DEF_V_31[9:8]
DEF_H_28[7:0]
DEF_V_28[7:0]
DEF_H_28[9:8]
DEF_D_28[5:0]
DEF_H_29[7:0]
DEF_V_29[7:0]
DEF_H_29[9:8]
DEF_D_29[5:0]
DEF_H_30[7:0]
DEF_V_30[7:0]
DEF_H_30[9:8]
DEF_D_30[5:0]
DEF_H_31[7:0]
DEF_V_31[7:0]
DEF_H_31[9:8]
DEF_D_31[5:0]
AED_SPD
V_OFFSET[2:0]
OSD_ROMRAM_POS[3:0]
SEL_IRISL[3:0]
SEL_IRISR[3:0]
1'b0
1'b0
1'b0
1'b0
SEL_MOTION[3:0]
CONFIDENTIAL
Data sheet
03.12.2007 (REV 0.0)
SWITRON
DEF.
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x35
0x00
0x00
13/43
N V P 2020
CCD Image Signal Processor
Read only register
BANK 0x81
ADDR
ISP
RESISTER
[7]
0x81
0x82
0x83
0x84
0x85
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
[6]
[5]
[4]
[3]
[2]
[1]
ACC_BLC_MSB
ACC_BLC_LSB
ACC_NBLC_MSB
ACC_NBLC_LSB
AE_ES_MSB
AE_ES_LSB
AGC
AE_DIGT_GAIN
AE_ACC
AWB_R
AWB_B
AWB_TARGET_R
AWB_TARGET_B
[0]
DEF.
-
CONFIDENTIAL
SWITRON
Data sheet
03.12.2007 (REV 0.0)
14/43
N V P 2020
CCD Image Signal Processor
2.2 Register Explanation
ADDR
0x00
0x01
0x02
0x03
0x04
0x05
bit
NAME
[7]
H1_P
[6]
H2_P
[5:0]
H1_DELAY
[7]
SHP_P
[6]
SHD_P
[5:0]
H2_DELAY
[7]
RG_P
[6]
ADCLK_P
[5:0]
SHP_DELAY
[7]
XSUB_P
ㆍ
ㆍ
ㆍ
ㆍ
ㆍ
ㆍ
ㆍ
BANK 0
DESCRIPTION
H1 pulse phase change
0 : Normal 1: change
H2 pulse phase change
0 : Normal 1: change
H1 pulse delay adjustment
range : 0 ~ 63ns
SHP pulse phase change
ㆍ 0 : Normal 1: change
ㆍ SHD pulse phase change
ㆍ 0 : Normal 1: change
ㆍ H2 pulse delay adjustment
status default
R/W 0x00
R/W 0x00
ㆍ range : 0 ~ 63ns
ㆍ RG pulse phase change
ㆍ 0 : Normal 1: change
ㆍ ADCLK pulse phase change
ㆍ 0 : Normal 1: change
ㆍ SHP pulse delay adjustment
R/W 0x00
CONFIDENTIAL
[6]
PBLK_P
[5:0]
SHD_DELAY
[7]
CLPOB_P
[6]
CLPDM_P
[5:0]
RG_DELAY
[7]
NTSC
[6]
HIGH
[5:0] ADCLK_DELAY
[7:6]
CCD_TYPE
0x06 [5:3]
H1_WIDTH
[2:0]
H2_WIDTH
Data sheet
03.12.2007 (REV 0.0)
ㆍ range : 0 ~ 63ns
ㆍ XSUB pulse phase change
ㆍ 0 : Normal 1: change
ㆍ PBLK pulse phase change
ㆍ 0 : Normal 1: change
ㆍ SHD pulse delay adjustment
R/W 0x00
SWITRON
ㆍ range : 0 ~ 63ns
ㆍ CLPOB pulse phase change
ㆍ 0 : Normal 1: change
ㆍ CLPDM pulse phase change
ㆍ 0 : Normal 1: change
ㆍ XRG pulse delay adjustment
R/W 0x00
ㆍ range : 0 ~ 63ns
ㆍ NTSC
ㆍ 0 : PAL 1: NTSC
ㆍ CCD resolution selection
ㆍ 0 : NORMAL(270K)
1 : HI8(410K)
ㆍ ADCLK pulse delay adjustment
R/W 0x80
ㆍ range : 0 ~ 63ns
ㆍ CCD type selection
ㆍ 0: SONY
1 : SHARP
2: PANASONIC
ㆍ H1 pulse width adjustment.
ㆍ range : 0 ~ 7ns
ㆍ H2 pulse width adjustment.
R/W 0x00
ㆍ range : 0 ~ 7ns
15/43
N V P 2020
ADDR
0x07
CCD Image Signal Processor
BANK 0
DESCRIPTION
bit
NAME
[7]
Fix
[6]
SEL_27M
[5:3]
SHD_WIDTH
ㆍ SHD pulse width adjustment (0 ~ 7ns)
[2:0]
SHP_WIDTH
ㆍ SHP pulse width adjustment (0 ~ 7ns)
[7]
H1_HW
ㆍ Select H1 pulse width (0: High band 1: Low band )
[6]
H2_HW
ㆍ Select H2 pulse width (0: High band 1: Low band )
[5]
SHP_HW
ㆍ Select SHP pulse width ( 0: High band 1: Low band )
[4]
SHD_HW
ㆍ Select SHD pulse width ( 0: High band 1: Low band )
[3]
RG_HW
ㆍ Select RG pulse width ( 0: High band 1: Low band )
0x08
[2:0]
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
RG_WIDTH
AFE_00[15:8]
AFE_00[07:0]
AFE_01[15:8]
AFE_01[07:0]
AFE_02[15:8]
AFE_02[07:0]
AFE_03[15:8]
AFE_03[07:0]
AFE_04[15:8]
AFE_04[07:0]
status default
ㆍ Fix at 1'b0.
ㆍ System clock selection
ㆍ 0 : CCD(NTSC :28.6363MHz or PAL :28.375MHz)
1 : 27MHz
R/W 0x00
R/W 0x00
ㆍ RG pulse width adjustment (0 ~ 7ns)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ㆍ 1st AFE internal setting register
ㆍ 2nd AFE internal setting register
CONFIDENTIAL
ㆍ 3rd AFE internal setting register
ㆍ 4th AFE internal setting register
ㆍ 5th AFE internal setting register
SWITRON
0x00
0x20
0x82
0x00
0x40
0x00
0xC0
0x00
0x00
0x00
[2:0] PGA_LENGTH ㆍ Select PGA length.
0x13 [1:0]
0x14
PGA_DUMMY
[2:0]
PGA_LOC
[7]
CLAMP
ㆍ Fill 1 or 2 bits if PGA is not 10 bits.
ㆍ Change address order of PGA.
ㆍ Auto Clamp On/Off
ㆍ 0 : OFF
1 : ON
R/W 0x70
[6]
AFE_PCON
ㆍ Change the bit order of PGA.
[5:0]
PGA_ADDR
ㆍ Assign PGA address to each address.
R/W
PGA_LOC=0
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
PGA_LOC=1
AD0
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
PGA_LOC=2
AD0 AD1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
PGA_LOC=3
AD0 AD1 AD2
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
PGA_LOC=4
AD0 AD1 AD2 AD3
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
PGA_LOC=5
AD0 AD1 AD2 AD3 AD4
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
AD5
PGA_LOC=6
AD0 AD1 AD2 AD3 AD4 AD5
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
* AD0 = PGA_ADDR[0],
AD3 = PGA_ADDR[3],
Data sheet
03.12.2007 (REV 0.0)
R/W 0x04
AD1 = PGA_ADDR[1],
AD4 = PGA_ADDR[4],
AD0 AD1 AD2 AD3 AD4 AD5
AD1 AD2 AD3 AD4 AD5
AD2 AD3 AD4 AD5
AD3 AD4 AD5
AD4 AD5
AD2 = PGA_ADDR[2]
AD5 = PGA_ADDR[5]
16/43
N V P 2020
ADDR
0x15
bit
CCD Image Signal Processor
BANK 0
DESCRIPTION
NAME
[7:3]
CLAMP_REG
[2]
DAY_IR_P
status default
ㆍ Manual clamp value
ㆍ Apply clamp with CLAMP_REG value if Auto Clamp is off.
ㆍ Day&Night output pulse phase change
ㆍ 0 : Normal
R/W 0x43
1 : Change
[1:0] CLAMP_LEVEL ㆍ Set the weight of clamp value if Auto clamp is on.
0x16 [7:0]
H_OFFSET
[7:6]
BPF_SEL
[5]
SHPD_TYPE
0x17 [4:1]
[0]
0x18 [7:0]
[7]
0x19
[6:0]
[7]
0x1A [6:5]
H_SIZE
HP_DLL_EN
Y_GAIN
H_EDGE_OFF
ㆍ Modify horizontal timing. (default : 0x00)
R/W 0x40
ㆍ range : -128 ~ 127
ㆍ Band pass filter selection
ㆍ Set the relation between SHP, SHD pulse and H1 pulse
R/W 0x80
ㆍ Encoder horizontal active size control
ㆍ Pulse delay method selection
ㆍ 0 : DELAY CELL
1 : ANALOG DLL
ㆍ Second Y gain
R/W 0x4C
ㆍ Range : x0 ~ x2
ㆍ Remove Edge on right and left side of the screen.
CONFIDENTIAL
Y_CLIP
OSD_DIS_ON
DAY_EX
ㆍ 0 : Edge On
1: Edge Off
R/W 0xB1
ㆍ Assign maximal Y value for output
ㆍ Turn on/off the OSD and Motion ICON Display, which indicates
changes in the major functions
ㆍ Select criteria for the control of day & night in the Day&Night function
ㆍ 0 : Internal (Only AGC)
SWITRON
1 : External CDS input
R/W 0x90
2 : External CDS input + AGC
[4]
REL_TH
ㆍ Set the weight of the defect release value
[3:0] MIRROR_POS ㆍ Horizontal position setting at time of mirror screen
0x1B [7:0]
Y_GAMMA0
ㆍ 1st Y GAMMA value
nd
R/W 0x01
0x1C [7:0]
Y_GAMMA1
ㆍ 2
0x1D [7:0]
Y_GAMMA2
ㆍ 3rd Y GAMMA vlue
R/W 0x25
0x1E [7:0]
Y_GAMMA3
ㆍ 4th Y GAMMA vlue
R/W 0x41
Y GAMMA vaue
R/W 0x10
0x1F [7:0]
Y_GAMMA4
ㆍ 5
th
Y GAMMA vlue
R/W 0x68
0x20 [7:0]
Y_GAMMA5
ㆍ 6
th
Y GAMMA vlue
R/W 0x9E
ㆍ 7
th
Y GAMMA vlue
R/W 0xE7
ㆍ 8
th
Y GAMMA vlue
R/W 0xFF
0x21 [7:0]
0x22 [7:0]
Y_GAMMA6
Y_GAMMA7
O U TP U T
GAM M A7
GAM M A6
GAM M A5
GAM M A4
GAM M A3
GAM M A2
GAMM A1
GAMM A0
IN P U T
Data sheet
03.12.2007 (REV 0.0)
17/43
N V P 2020
ADDR
0x23
0x24
0x25
bit
CCD Image Signal Processor
HAP_SLICE1
[3:0]
HAP_SLICE2
ㆍ High-frequency bandwidth horizontal aperture slice
[7:4]
VAP_SLICE
ㆍ Vertical aperture slice
[3:0]
VAP_GAIN
[7:4]
SEL_UP
[3:0]
SEL_RIGHT
[7:5]
PEAK_GAIN
[4:0]
HAP_GAIN1
[7:5]
Fix
[4:0]
HAP_GAIN2
0x27
[7:4]
[3:0]
BF_DLY
0x29 [7:0] SUE_AGC_LEVEL
0x2A
ㆍ Standard of the size of the edge that could become an aperture
ㆍ Vertical aperture gain
ㆍ Select the input pin for UP button signal
ㆍ Select the input pin for RIGHT button signal
0x2D
ㆍ Range : x0 ~ x4
ㆍ Low-frequency bandwidth horizontal aperture gain
R/W 0x0A
ㆍ Fix at 1'b0.
ㆍ High-frequency bandwidth horizontal aperture gain
R/W 0x09
ㆍ Range : x0 ~ x4
ㆍ Adjust BURST position
ㆍ Peaking slice.
ㆍ Set AGC level for the start of edge suppress in low illumination
ㆍ If AGC value is above the value set, edge suppress will be applied.
[3:0] SUE_AGC_GAIN ㆍ Set ratio for edge suppress in low illumination.
SWITRON
[7:4] SUC_HL_HLEVEL ㆍ Set Y level for the start of highlight color suppress (bright range)
[3:0] SUC_HL_LLEVEL ㆍ Set Y level for the start of highlight color suppress (dark range)
[7:4] SUC_HL_GAIN ㆍ Set ratio for highlight color suppress.
[3:0] SUC_EDGE_GAIN ㆍ Set ratio for the suppression of color component at edge.
C_GAMMA0
R/W 0x00
ㆍ Range : x0 ~ x4
[7:4] SUC_AGC_GAIN ㆍ Set ratio for color suppress in low illumination.
0x2E [7:0]
R/W 0x45
ㆍ Peaking filter gain
0x2B [7:0] SUC_AGC_LEVEL ㆍ Set AGC level for the start of color suppress in low illumination
0x2C
R/W 0x45
ㆍ Range : x0 ~ x2
CONFIDENTIAL
PEAK_SLICE
status default
ㆍ Low-frequency bandwidth horizontal aperture slice
[7:4]
0x26
0x28
BANK 0
DESCRIPTION
NAME
ㆍ 1
st
C GAMMA value
R/W 0x63
R/W 0x22
R/W 0x28
R/W 0x30
R/W 0x90
R/W 0x31
R/W 0x01
0x2F [7:0]
C_GAMMA1
ㆍ 2
nd
C GAMMA value
R/W 0x10
0x30 [7:0]
C_GAMMA2
ㆍ 3
rd
C GAMMA value
R/W 0x25
0x31 [7:0]
C_GAMMA3
ㆍ 4
th
C GAMMA value
R/W 0x41
th
0x32 [7:0]
C_GAMMA4
ㆍ 5
C GAMMA value
R/W 0x68
0x33 [7:0]
C_GAMMA5
ㆍ 6th C GAMMA value
R/W 0x9E
0x34 [7:0]
0x35 [7:0]
C_GAMMA6
C_GAMMA7
Data sheet
03.12.2007 (REV 0.0)
ㆍ 7
th
C GAMMA value
R/W 0xE7
ㆍ 8
th
C GAMMA value
R/W 0xFF
18/43
N V P 2020
ADDR
bit
CCD Image Signal Processor
NAME
0x36 [7:0]
GAIN_RS1
0x37 [7:0]
GAIN_RS2
0x38 [7:0]
GAIN_BS1
0x39 [7:0]
GAIN_BS2
0x3A [7:0]
CCY_GAIN
0x3B [7:0]
CCR_GAIN
0x3C [7:0]
CCB_GAIN
[7]
0x3D
[6]
[5:0]
[7]
0x3E
0x3F
0x40
IR_GAIN_MENU_ON
BANK 0
DESCRIPTION
ㆍ CCR = s2*GAIN_RS2-s1*GAIN_RS1
ㆍ Range : x0 ~ x2
ㆍ CCR = s2*GAIN_RS2-s1*GAIN_RS1
ㆍ Range : x0 ~ x2
ㆍ CCB = s1*GAIN_BS1-s2*GAIN_BS2
ㆍ Range : x0 ~ x2
ㆍ CCB = s1*GAIN_BS1-s2*GAIN_BS2
ㆍ Range : x0 ~ x2
ㆍ CCY gain
ㆍ CCR gain
ㆍ CCB gain
ㆍ 0 : OFF
1 : ON
ㆍ Clip of GAIN_RS1*s1
CCRB_ID
ㆍ Switch CCR and CCB lines at time of color calculation.
[7:6] TEST_PATTERN
ㆍ Switch S1 and S2.
SWITRON
ㆍ 0 ~ 2 : Internal test Pattern
ㆍ Clip of GAIN_BS1*s1
[7:6]
YFIR_SEL
ㆍ LPF selection on LUMA path
[5:0]
CLP_BS2
ㆍ Clip of GAIN_BS2*s2
0x42 [7:0]
CCORG
0x43 [7:0]
CCORB
0x44 [7:0]
CCOGR
0x45 [7:0]
CCOGG
0x46 [7:0]
CCOGB
Data sheet
03.12.2007 (REV 0.0)
R/W 0xBF
ㆍ Internal test pattern selection
CLP_BS1
CCORR
R/W 0x3F
ㆍ CLIP of GAIN_RS2*s2
[5:0]
0x41 [7:0]
R/W 0x80
ㆍ Select on/off of IR GAIN menu in the OSD menu
CLP_RS1
S1_ID
R/W 0x80
R/W 0x80
ㆍ Range : x0 ~ x4
CONFIDENTIAL
CLP_RS2
R/W 0x80
R/W 0x80
ㆍ Range : x0 ~ x4
ㆍ LPF selection on CHROMA path
[6]
R/W 0x80
R/W 0x80
ㆍ Range : x0 ~ x2
CFIR_SEL
[5:0]
status default
3 : CCD Input.
ㆍ R' = CCR*CCORR+CCY*CCORG+CCB*CCORB
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ R' = CCR*CCORR+CCY*CCORG+CCB*CCORB
ㆍ Gain range : -x0.5 ~ x0.5 (2's complement)
ㆍ R' = CCR*CCORR+CCY*CCORG+CCB*CCORB
ㆍ Gain range : -x0.5 ~ x0.5 (2's complement)
ㆍ G' = CCY*CCOGG-(CCR*CCOGR+CCB*CCOGB)
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ G' = CCY*CCOGG-(CCR*CCOGR+CCB*CCOGB)
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ G' = CCY*CCOGG-(CCR*CCOGR+CCB*CCOGB)
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
R/W 0xFF
R/W 0x3F
R/W 0xA0
R/W 0x2E
R/W 0x4E
R/W 0x6C
R/W 0x87
R/W 0xAC
19/43
N V P 2020
ADDR
bit
CCD Image Signal Processor
NAME
0x47 [7:0]
CCOBR
0x48 [7:0]
CCOBG
0x49 [7:0]
CCOBB
0x4A [7:0]
RWB
0x4B [7:0]
GWB
0x4C [7:0]
BWB
0x4D [7:0]
RBLK
0x4E [7:0]
GBLK
0x4F [7:0]
0x50 [7:0]
BANK 0
DESCRIPTION
ㆍ B' = CCR*CCOBR+CCY*CCOBG+CCB*CCOBB
ㆍ Gain range : -x0.5 ~ -x0.5 (2's complement)
ㆍ B' = CCR*CCOBR+CCY*CCOBG+CCB*CCOBB
ㆍ Gain range : -x0.5 ~ -x0.5 (2's complement)
ㆍ B' = CCR*CCOBR+CCY*CCOBG+CCB*CCOBB
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ RED gain
ㆍ Gain range : x0(0x00) ~ x4(0xFF)
ㆍ GREEN gain
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ BLUE gain
ㆍ Gain range : x0(0x00) ~ x4(0xFF)
ㆍ RED offset
ㆍ Gain range : -128 ~ 127 (2's complement)
ㆍ GREEN offset
ㆍ Gain range : -128 ~ 127 (2's complement)
CONFIDENTIAL
BBLK
CR_GAIN
0x51 [7:0]
CB_GAIN
0x52 [7:0]
HUE1
0x53 [7:0]
HUE2
0x54 [7:0]
HUE3
0x55 [7:0]
HUE4
0x56 [7:0]
HUE5
0x57 [7:0]
HUE6
0x58 [7:0]
UV_GAIN1
0x59 [7:0]
UV_GAIN2
Data sheet
03.12.2007 (REV 0.0)
ㆍ BLUE offset
ㆍ Gain range : -128 ~ 127 (2's complement)
ㆍ CR GAIN
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ CB GAIN
SWITRON
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ 1st area HUE control
ㆍ Data range : -45° ~ 45° (2's complement)
ㆍ 2
nd
area HUE control
ㆍ Data range : -45° ~ 45° (2's complement)
ㆍ 3
rd
area HUE control
ㆍ Data range : -45° ~ 45° (2's complement)
ㆍ 4
th
area HUE control
ㆍ Data range : -45° ~ 45° (2's complement)
ㆍ 5
th
area HUE control
ㆍ Data range : -45° ~ 45° (2's complement)
ㆍ 6
th
area HUE control
ㆍ Data range : -45° ~ 45° (2's complement)
ㆍ 1
st
area UV gain
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ 2nd area UV gain
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
status default
R/W 0xC6
R/W 0x52
R/W 0xC4
R/W 0x5A
R/W 0x4A
R/W 0x51
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x80
R/W 0x80
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x80
R/W 0x80
20/43
N V P 2020
ADDR
bit
CCD Image Signal Processor
BANK 0
DESCRIPTION
NAME
0x5A [7:0]
UV_GAIN3
0x5B [7:0]
UV_GAIN4
0x5C [7:0]
UV_GAIN5
0x5D [7:0]
UV_GAIN6
ㆍ 3rd area UV gain
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ 4th area UV gain
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ 5th area UV gain
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
ㆍ 6th area UV gain
ㆍ Gain range : x0(0x00) ~ x2(0xFF)
status default
R/W 0x80
R/W 0x80
R/W 0x80
R/W 0x80
E
Area 2
Area 1
Area 3
Area 6
Area 4
Area 5
CONFIDENTIAL
0x5E
[7]
BLC
[6]
BLC_AREA_VIEW
[5:0]
BLC_GAIN
ㆍ BLC(Back Light Compensation) On/Off
ㆍ 0 : OFF
1 : ON
ㆍ BLC AREA VIEW On/Off
SWITRON
ㆍ 0 : OFF
R/W 0x95
1 : ON
ㆍ Adjust ratio of screen brightness in the BLC area
ㆍ Apply different motion threshold values for low illumination and
[7:4] MOTION_AGC
0x5F
[3:0] MOTION_HIGH
0x60 [7:0]
0x61 [7:0]
0x62 [7:0]
0x63
ㆍ Set the criteria of low illumination for motion detection.
ㆍ Motion detection is not to be performed when the screen is as
bright as it is set in the MOTION_HIGH or brighter
ㆍ Standard value for Auto Exposure when BLC is OFF
R/W 0x54
BLC_LEVEL
ㆍ Standard value for Auto Exposure when BLC is ON
R/W 0x40
MOTION_THL ㆍ Low luminous motion threshold value
DAY_EXT_IN_P
[6:4]
OSD_MDP
[3]
IRIS_LG_ON
R/W 0x0F
ㆍ Day&Night external input pulse phase change
ㆍ 0 : Normal
1 : Change
ㆍ Motion Icon display position
ㆍ Select the iris level
ㆍ 0 : IRIS_LEVEL
1 : IRIS_LEVEL*gain
IRIS_DAC_PORT ㆍ Set DAC sleep mode register assign
ㆍ DAC sleep mode selection
[1]
R/W 0x40
AE_LEVEL
[7]
[2]
general conditions so that motion can be detected.
R/W 0x48
DAC_SL_MSEL ㆍ 0 : DAC1_SL_REG
1 : DAC sleep when the LENS of the menu is set at manual
ㆍ Set the submenu of LENS in the menu.
[0]
MENU_LENS_DM ㆍ 0 : DC / Video / Manual
ㆍ 1 : DC / Manual
Data sheet
03.12.2007 (REV 0.0)
21/43
N V P 2020
CCD Image Signal Processor
BANK 0
DESCRIPTION
ADDR bit
0x64 [7:0]
NAME
MAX1_AGC
ㆍ MAX AGC1
R/W 0xD0
0x65 [7:0]
MAX2_AGC
ㆍ MAX AGC2
R/W 0x00
[7:4]
ESS_ZONE
ㆍ Electronic shutter stable zone
[3:0]
AED_ZONE
ㆍ Digital gain stable zone
[7:4]
ESS_SDLY
[3:0]
AGC_SDLY
ㆍ Delay time from when the AGC is operated until the electronic shutter works
ㆍ Delay time from when the electronic shutter is operated until the AGC
0x66
0x67
status default
R/W 0x75
R/W 0x00
functions
[7:6] AE_DG_REG[9:8] ㆍ Manual digital gain MSB[9:8]
0x68
[5:4] AGC_REG[9:8] ㆍ Manual AGC MSB[9:0]
[3:0]
AE_SPD
R/W 0x4F
ㆍ AE speed control
ㆍ 0 : slow ~ 7 : fast
0x69 [7:0] AE_DG_REG[7:0] ㆍ Manual digital gain LSB[7:0]
R/W 0x00
0x6A [7:0] AGC_REG[7:0] ㆍ Manual AGC LSB[7:0]
R/W 0x00
[7:6]
AE_MODE
ㆍ AE Mode selection
ㆍ 0 : Fixed(SSM)
1 : Auto
2 : Manual(256 steps)
3 : Manual
ㆍ Output predefined values of the electronic shutter.
[5:3]
CONFIDENTIAL
SSM
0x6B
[2]
MOTION_TEST
[1:0]
IRIS_LENS
[7]
0x6C [6:5]
[4:0]
SSM
0
1
2
3
4
5
6
7
NTSC
1/60
1/100
1/250
1/500
1/2,000
1/5,000
1/10,000
1/100,000
SWITRON
PAL
1/50
1/120
1/250
1/500
1/2,000
1/5,000
1/10,000
1/100,000
R/W 0x42
ㆍ Motion area view On/Off
ㆍ 0 : OFF
1 : ON
ㆍ IRIS output type selection
ㆍ 0 : VIDEO
1 : DC
else : Manual
BTN_REPT_ON ㆍ Select whether the button remained pressed is recognized as successive entry
OSD_TRANS
ㆍ OSD transparency setting.
R/W 0xE0
ME_ESS[12:8] ㆍ Manual ess value[12:8] (It functions only when the AE_MODE value is 3)
ㆍ Manual ess value[7:0]
R/W 0x15
R_MAX
ㆍ Set Maximal RED value in color temperature
R/W 0x8D
B_MAX
ㆍ Set Maximal BLUE value in color temperature
R/W 0x43
R_MIN
ㆍ Set Minimal RED value in color temperature
R/W 0x64
0x71 [7:0]
B_MIN
ㆍ Set Minimal BLUE value in color temperature
R/W 0xCB
0x72 [7:0]
AWB_HIGH
ㆍ Maximal Y value for the operation of AWB
R/W 0xF0
[7:6]
AWB_MODE
[5:4]
AWB_DIP
ㆍ Select four color temperature predefined.
[3:0]
PZ_STATE
ㆍ Four Privacy Zone On/Off
0x74 [7:0]
AWB_LOW
ㆍ Minimal Y value required for the operation of AWB
0x6D [7:0]
ME_ESS[7:0]
0x6E [7:0]
0x6F [7:0]
0x70 [7:0]
0x73
0x75
ㆍ AWB / ATW / DIP mode selection
ㆍ 0 : AWB
1 : ATW
2: DIP
3 : MANUAL
[7:4]
R_CLP
ㆍ CLIP maximal RED value in AWB tracking area.
[3:0]
B_CLP
ㆍ CLIP maximal BLUE value in AWB tracking area.
Data sheet
03.12.2007 (REV 0.0)
R/W 0x40
R/W 0x07
R/W 0xFF
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CCD Image Signal Processor
ADDR
BANK 0
DESCRIPTION
ㆍ Set the size of upper section in the AWB tracking area.
ㆍ Set the size of lower section in the AWB tracking area.
ㆍ AWB tracking speed
bit
[7:4]
0x76
[3:0]
NAME
INTVAL_H
INTVAL_L
[7:4]
AWB_SPD
[3:0]
STA_ZONE
ㆍ Set the size of stabilization zone at time of AWB tracking.
ㆍ If the time in the STA_ZONE is higher than the value set
[7:4]
STA_IN_LMT
when the AWB Tracking pointer is inside the STA_ZONE, no more
0x77
0x78
[3:0] STA_OUT_LMT
ㆍ 0x00(slow) ~ 0x0F(fast)
status default
R/W 0x44
R/W 0xF4
AWB Tracking is to done.
ㆍ Tracking is to done when white continues to exist in the area
R/W 0x11
outside the STA_ZONE for a period longer than what is set.
0x7A [7:0]
AWB_R0
ㆍ DIP_MODE == 0, AWB RED gain
R/W 0x40
0x7B [7:0]
AWB_R1
ㆍ DIP_MODE == 1, AWB RED gain
R/W 0x04
0x7C [7:0]
AWB_R2
ㆍ DIP_MODE == 2, AWB RED gain
R/W 0x6D
0x7D [7:0]
AWB_R3
ㆍ DIP_MODE == 3, AWB RED gain
R/W 0x42
0x7E [7:0]
AWB_B0
ㆍ DIP_MODE == 0, AWB BLUE gain
R/W 0x40
0x7F [7:0]
AWB_B1
ㆍ DIP_MODE == 1, AWB BLUE gain
R/W 0x00
ㆍ DIP_MODE == 2, AWB BLUE gain
R/W 0xEE
ㆍ DIP_MODE == 3, AWB BLUE gain
R/W 0x3C
CONFIDENTIAL
0x80 [7:0]
AWB_B2
0x81 [7:0]
AWB_B3
0x82 [7:0] AWB_R_OFFSET
0x83 [7:0] AWB_B_OFFSET
0x84 [7:0]
DAY_NIGHT_START
ㆍ AWB RED offset
ㆍ Data range : -128 ~ 127 (2's complements)
ㆍ AWB BLUE offset
0x87
0x88
R/W 0x08
ㆍ Data range : -128 ~ 127 (2's complements)
SWITRON
ㆍ Set the brightness level where the DAY & NIGHT function starts to operate
0x85 [7:0] DAY_NIGHT_END ㆍ
ㆍ
[7:6]
DAY_ON
ㆍ
0x86
ㆍ
[5:0]
DAY_DLY
ㆍ
R/W 0x10
Set the brightness level where the DAY & NIGHT function stops operating
R/W 0xC3
R/W 0x97
Set Day&Night function
0 : B/W, 1: Color 2 : Auto
Delay time when the Day&Night function starts or stops
R/W 0x41
0 sec ~ 15 sec
[7:4] SEL_EXPO_02 ㆍ Assign an output pulse to the pin number 22
[3:0] SEL_EXPO_01 ㆍ Assign an output pulse to the pin number 21
[7:4] SEL_EXPO_04 ㆍ Assign an output pulse to the pin number 29
[3:0] SEL_EXPO_03 ㆍ Assign an output pulse to the pin number 23
R/W 0x00
R/W 0x00
※ output pulse
0 : none.
5 : IRIS_LENS[0]
[7]
1 : day motor
2 : day IR
3 : power pulse
4 : motion detection
6 : eeprom wr
7 : pblk
8 : clpdm
9 : clpob
MBK_ON
0x8A [6:5] MENU_BKSEL
[4:0]
SC_OFFSET
Data sheet
03.12.2007 (REV 0.0)
ㆍ OSD menu box On/Off
ㆍ OSD menu box selection
ㆍ 0: OFF
1 : Upper box
2: Lower box
3: Both
R/W 0x00
ㆍ Scaler offset(only 27MHz)
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ADDR
CCD Image Signal Processor
bit
[7:3]
NAME
DEF_M_SEL
[2]
MENU_BTN3
0x8B
BANK 0
DESCRIPTION
ㆍ Manual defect point selection
status default
ㆍ OSD menu button mode selection
ㆍ 0 : 5 Button mode
1 : 3 Button mode
R/W 0x04
[1] DAY_EXT_IN_REG ㆍ Day&Night external enable signal
[0]
Fix
0x8C [7:0]
HXV_OFFSET
0x8D [7:0]
PRE_Y_GAiN
0x8E
ㆍ Fix at 1'b0.
ㆍ Modify the pulse timing (at 27MHz)
ㆍ Range : -128 ~ 127
ㆍ First Y gain
R/W 0x80
ㆍ Range : x0 ~ x2
[7:4]
EDGE_S
ㆍ Remove noise generated on the left side of video
[3:0]
EDGE_E
ㆍ Remove noise generated on the right side of video
[7]
PZ_ON
[6]
MOTION_EN
[5]
M_VIEW_ON
0x8F
[4]
[3:0]
R/W 0x00
R/W 0x02
ㆍ Privacy Zone On /Off
ㆍ 0 : Privacy Zone Off 1 : Privacy Zone On
ㆍ Motion detection On/Off
ㆍ 0 : Off
1 : On
ㆍ Motion view On/Off (Display the motion area on the screen.)
R/W 0x58
CONFIDENTIAL
ㆍ 0 : Motion view Off
1 : Motion view On
DAY_BURST_ON ㆍ BURST signal On/Off(Day&Night)
PZ_COLOR
ㆍ Privacy Zone color setting
0x90 [7:0]
PZ_SH0
ㆍ Privacy Zone0 horizontal start position
R/W 0x18
0x91 [7:0]
PZ_SV0
ㆍ Privacy Zone0 vertical start position
R/W 0x10
0x92 [7:0]
PZ_EH0
ㆍ Privacy Zone0 horizontal end position
R/W 0x30
0x93 [7:0]
PZ_EV0
ㆍ Privacy Zone0 vertical end position
R/W 0x30
0x94 [7:0]
PZ_SH1
ㆍ Privacy Zone1 horizontal start position
R/W 0x50
0x95 [7:0]
PZ_SV1
ㆍ Privacy Zone1 vertical start position
R/W 0x10
0x96 [7:0]
PZ_EH1
ㆍ Privacy Zone1 horizontal end position
R/W 0x68
0x97 [7:0]
PZ_EV1
ㆍ Privacy Zone1 vertical snd position
R/W 0x30
0x98 [7:0]
PZ_SH2
ㆍ Privacy Zone2 horizontal start position
R/W 0x18
SWITRON
0x99 [7:0]
PZ_SV2
ㆍ Privacy Zone2 vertical start position
R/W 0x40
0x9A [7:0]
PZ_EH2
ㆍ Privacy Zone2 horizontal end position
R/W 0x30
0x9B [7:0]
PZ_EV2
ㆍ Privacy Zone2 vertical end position
R/W 0x60
0x9C [7:0]
PZ_SH3
ㆍ Privacy Zone3 horizontal start position
R/W 0x50
0x9D [7:0]
PZ_SV3
ㆍ Privacy Zone3 vertical start position
R/W 0x40
0x9E [7:0]
PZ_EH3
ㆍ Privacy Zone3 horizontal end position
R/W 0x68
ㆍ Privacy Zone3 vertical end position
R/W 0x60
0x9F [7:0]
0xA0
PZ_EV3
[7:6]
POWER_FRE
[5]
IRIS_P
[4:0]
HVAP_GAIN
[7:4]
MOTION_TH_AREA
ㆍ Adjust the frequency of the power pulse.
ㆍ IRIS output phase change
ㆍ 0 : Normal.
1 : Change.
ㆍ Sharpness gain
R/W 0x50
ㆍ Generate motion detection pulse when the number of areas where
0xA1
motions occur (out of 64 areas) is greater than what is set at
MOTION_TH_AREA.
R/W 0x00
[3:0] SEL_IRIS_LENS ㆍ Select the input pin for the IRIS_LENS signal
Data sheet
03.12.2007 (REV 0.0)
24/43
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ADDR
0xA2
0xA3
CCD Image Signal Processor
bit
[7:4]
NAME
SEL_ENTER
BANK 0
DESCRIPTION
ㆍ Select the input pin for the ENTER button input signal
[3:0]
SEL_DOWN
ㆍ Select the input pin for the DOWN button input signal
[7]
MIRROR
[6] M_CURSOR_ON
[5:0]
M_CURSOR
status default
R/W 0x00
ㆍ MIRROR On/Off
ㆍ Set the cursor On/Off indicating one of the 64 areas at time of
setting the MOTION AREA
ㆍ Set the cursor location indicating one of the 64 areas at time of
R/W 0x00
setting the MOTION AREA
AWB_M_R
ㆍ AWB manual adjust RED gain
R/W 0x40
0xA5 [7:0]
AWB_M_B
ㆍ AWB manual adjust BLUE gain
R/W 0x40
0xA6 [7:0]
IRIS_LEVEL
ㆍ IRIS output level
R/W 0x40
0xA7 [7:0]
IRIS_GAIN
ㆍ IRIS output gain
R/W 0x80
[7:4]
BTN_DLY
ㆍ Button input delay
0xA4 [7:0]
0xA8
0xA9 [7:0]
0xAA
0xAB
R/W 0x05
[3:0] BTN_MENU_DLY ㆍ Button input delay with OS MENU on
[7:6]
[5:0]
Y_OFFSET
ㆍ Adjust the Y offset
R/W 0x00
ㆍ Range : -128 ~ +127(2's complement)
U_BURST[9:8] ㆍ U_BURST[9:8] value.
CONFIDENTIAL
SYNC_REG
ㆍ Adjust the SYNC level of the video signal
[7:6]
V_BURST[9:8] ㆍ V_BURST[9:8] value.
[5:0]
BLACK_REG
ㆍ Adjust the BLACK level of the video signal
R/W 0xCE
R/W 0x15
0xAC [7:0]
U_BURST[7:0] ㆍ Set the U_BURST value.
R/W 0x9F
0xAD [7:0]
V_BURST[7:0] ㆍ Set the V_BURST value.
R/W 0x00
[7:6]
0xAE [5:1]
IRIS_DC
IRIS_BLC_OFFSET
ㆍ IRIS output selection
SWITRON
ㆍ 0 : VIDEO
1 : DC
ㆍ DAC clock
DAC_P
[7:4]
DAC1_OUT
ㆍ DAC 1 output selection
[3:0]
DAC2_OUT
※ DAC output mode
ㆍ DAC 2 output selection
ㆍ 0 :
Normal
1: Change
0 : CVBS 1 : LUMA
2 : CHROMA
3 : IRIS
4 : IRIS volume
0xB0 [7:0] MOTION_TH ㆍ High luminous motion threshold value
0xB1
[7:4]
MOTION_THF
[3]
SLPF_SEL
[2:0]
AE_OUT_LMT
Data sheet
03.12.2007 (REV 0.0)
R/W 0x09
phase change
[0]
0xAF
else : MANUAL
ㆍ Set the offset value at time of MANUAL IRIS output
R/W 0x00
5 : HIGH
6 : LOW
R/W 0x22
ㆍ Generate motion detection pulse when consecutive motions are
detected as much as set at MOTION_THF or above.
ㆍ Encoder sync low pass filter On/Off
ㆍ 0 : Off
1 : On
ㆍ Start to operate AE after a certain time set at AE_OUT_LMT has
R/W 0x08
passed once the brightness of input screen changes
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CCD Image Signal Processor
BANK 0
DESCRIPTION
ADDR bit
0xB2 [7:0]
NAME
MOTION_AREA[63:56]
R/W 0xFF
0xB3 [7:0]
MOTION_AREA[55:48]
R/W 0xFF
0xB4 [7:0]
MOTION_AREA[47:40]
R/W 0xFF
0xB5 [7:0]
MOTION_AREA[39:32]
0xB6 [7:0]
MOTION_AREA[31:24]
0xB7 [7:0]
MOTION_AREA[23:16]
R/W 0xFF
0xB8 [7:0]
MOTION_AREA[15:8]
R/W 0xFF
0xB9 [7:0]
ㆍ Set the MOTION area
status default
R/W 0xFF
R/W 0xFF
MOTION_AREA[7:0]
R/W 0xFF
0xBA [7:0] BLC_AREA[63:56]
R/W 0xFF
0xBB [7:0] BLC_AREA[55:48]
R/W 0xFF
0xBC [7:0] BLC_AREA[47:40]
R/W 0xFF
0xBD [7:0] BLC_AREA[39:32]
0xBE [7:0] BLC_AREA[31:24]
ㆍ Set the BLC area
R/W 0xFF
R/W 0xFF
0xBF [7:0] BLC_AREA[23:16]
R/W 0xFF
0xC0 [7:0]
BLC_AREA[15:8]
R/W 0xFF
0xC1 [7:0]
BLC_AREA[7:0]
R/W 0xFF
CONFIDENTIAL
SWITRON
Data sheet
03.12.2007 (REV 0.0)
26/43
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ADDR
0xC2
0xC3
0xC4
0xC5
0xC6
CCD Image Signal Processor
BANK 0
bit
NAME
DESCRIPTION
[7:4] SEL_DAY_EXT ㆍ Select the input pin for the Day&Night external signal
[3:0]
SEL_MIRROR
ㆍ Select the input pin for the MIRROR control signal
[7:4]
SEL_BLC
ㆍ Select the input pin for the BLC control signal
[3:0]
SEL_AGC
ㆍ Select the input pin for the AGC control signal
[7:4]
SEL_AE1
ㆍ Select the input pin for the AE_MODE[1] signal
[3:0]
SEL_AE0
ㆍ Select the input pin for the AE_MODE[0] signal
[7:4]
SEL_SSM1
ㆍ Select the input pin for the SSM[1] signal
[3:0]
SEL_SSM0
ㆍ Select the input pin for the SSM[0] signal
[7:4]
SEL_LEFT
ㆍ Select the input pin for the LEFT button signal
ㆍ Select the input pin for the SSM[2] signal
[3:0]
SEL_SSM2
※ selection input pin
0x0 : none
0x1 : #34
0x2 : #35
0x3 : #36
0x4 :not use
0xC9
IR_GAIN[7:0]
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
ㆍ Set the INFRARED gain value
ㆍ OSD blink function On/Off
R/W 0x00
R/W 0x00
CONFIDENTIAL
[7]
OSD_BLINK
[6]
OSD_SAVE
[5]
Fix
[4]
R/W 0x00
0x5 :not use 0x6 :not use 0x7 :not use
0x8 :not use 0x9 : #21 0xA : #22
0xB : #23
0xC : #29
[7:4]
IRIS_GMAX
ㆍ Set the maximal value of IRIS_GAIN
0xC7
[3:0]
IRIS_GMIN
ㆍ Set the minimal value of IRIS_GAIN
0xC8 [7:0]
status default
ㆍ 0 : OFF
1 : ON
ㆍ Save OSD. It is saved when the values are changed as follows:
0->1, 1->0
R/W 0x40
ㆍ Fix at 1'b0.
OSD_DATA[8] ㆍ Characters displayed OSD
SWITRON
[3:2] OSD_POS[9:8] ㆍ Position of the characters to be displayed OSD
[1:0]
OSD_CSEL
ㆍ Set the OSD font color
0xCA [7:0] OSD_POS[7:0] ㆍ Position of characters to be displayed OSD
R/W 0x00
0xCB [7:0] OSD_DATA[7:0] ㆍ
ㆍ
[7]
OSD_ON
ㆍ
ㆍ
[6] OSD_LPF_ON
ㆍ
0xCC
[5]
OSD_CLEAR ㆍ
R/W 0x00
[4:0]
0xCD
0xCE
0xCF
0xD0
0xD1
DEFT_STPOS
Characters displayed OSD
OSD On/Off
0 : Off
OSD filter On/Off
1 : On
0 : Off
1 : On
Clear the OSD indication on the screen
R/W 0x40
ㆍ CCD defect register with address (0~31) smaller than a
predetermined value is not replaced with the newly issued defect
[7:4] OSD_COLOR_01 ㆍ OSD font color1 (Set the color for the items chosen in the OSD menu)
[3:0] OSD_COLOR_00 ㆍ OSD font color2 (Set the basic font color in OSD menu)
[7:4] OSD_COLOR_03 ㆍ OSD font color3 (Set the OSD menu title & LOGO color)
[3:0] OSD_COLOR_02 ㆍ OSD font color4 (Set the CAMERA ID color)
R/W 0xD3
R/W 0x30
[7:5]
MENU_LANG
ㆍ OSD menu language selection
R/W 0x08
[4:0]
GAMMA_SEL
ㆍ Select predefined GAMMA value (*OSD MENU)
R/W 0x00
[7:6] ID_REG12[1:0] ㆍ 13
th
CAMERA ID character
R/W 0x00
[5:0] ID_REG00[5:0] ㆍ 1 CAMERA ID character
th
[7:6] ID_REG12[3:2] ㆍ 13 CAMERA ID character
R/W 0x00
R/W 0x00
st
[5:0] ID_REG01[5:0] ㆍ 2
Data sheet
03.12.2007 (REV 0.0)
nd
CAMERA ID character
R/W 0x00
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ADDR
0xD2
0xD3
0xD4
0xD5
0xD6
0xD7
0xD8
0xD9
0xDA
0xDB
CCD Image Signal Processor
BANK 0
bit
NAME
DESCRIPTION
[7:6] ID_REG12[5:4] ㆍ 13th CAMERA ID character
[5:0] ID_REG02[5:0] ㆍ 3
rd
[7:6] ID_REG13[1:0] ㆍ 14
status default
R/W 0x00
CAMERA ID character
th
R/W 0x00
CAMERA ID character
R/W 0x00
[5:0] ID_REG03[5:0] ㆍ 4th CAMERA ID character
[7:6] ID_REG13[3:2] ㆍ 14
th
R/W 0x00
CAMERA ID character
R/W 0x00
[5:0] ID_REG04[5:0] ㆍ 5th CAMERA ID character
th
CAMERA ID character
th
CAMERA ID character
th
CAMERA ID character
[7:6] ID_REG13[5:4] ㆍ 14
[5:0] ID_REG05[5:0] ㆍ
6
[7:6] ID_REG14[1:0] ㆍ 15
[5:0] ID_REG06[5:0] ㆍ 7
th
[7:6] ID_REG14[3:2] ㆍ 15
[5:0] ID_REG07[5:0] ㆍ 8
th
R/W 0x00
R/W 0x00
CAMERA ID character
th
CAMERA ID character
R/W 0x00
CAMERA ID character
[7:6] ID_REG14[5:4] ㆍ 15th CAMERA ID character
R/W 0x00
[5:0] ID_REG08[5:0] ㆍ 9th CAMERA ID character
[7:6] ID_POS_Y[1:0] ㆍ CAMERA ID vertical position
R/W 0x00
[5:0] ID_REG09[5:0] ㆍ 10th CAMERA ID character
CONFIDENTIAL
[7:6] ID_POS_Y[3:2] ㆍ CAMERA ID vertical position
[5:0] ID_REG10[5:0] ㆍ 11th CAMERA ID character
[7:6] ID_POS_X[1:0] ㆍ CAMERA ID horizontal position
[5:0] ID_REG11[5:0] ㆍ 12
[7]
MAX_AGC_SEL
[6]
OSD_ID_ON
0xDC
[5:4]
BLINK_TIME
[3]
ID_POS_Y[4]
th
CAMERA ID character
R/W 0x00
R/W 0x00
ㆍ MAX_AGC selection
SWITRON
ㆍ 0 : MAX1_AGC
1 : MAX2_AGC
ㆍ CAMERA ID On/Off
ㆍ 0 : OFF
ㆍ Set the blink time
1 : ON
ㆍ 0 : 0.25s
1 : 0.5s
ㆍ CAMERA ID vertical position
2 : 0.75s
R/W 0xD9
3 : 1s
[2:0] ID_POS_X[4:2] ㆍ CAMERA ID horizontal position
[7] DAY_MOTOR_P
0xDD
ㆍ 0 : Normal
1: Change
ㆍ Day&Night output pulse type selection
[6:5] DAY_PULSE_SEL ㆍ Adjust the brightness of IR
[4:0]
POS_LEN
[7] MENU_ICON_OFF
0xDE
ㆍ Day&Night motor control pulse phase change
[6:5] MENU_OFF_TIME
[4:0]
POS_SHT
[7]
Fix
0xDF [6:5]
[4:0]
BLK_TH
POS_BLC
Data sheet
03.12.2007 (REV 0.0)
R/W 0x81
ㆍ 0 : Maximum ~ 3 : Minimum
ㆍ OSD menu [LENS] item position(*OSD MENU)
ㆍ Menu ICON On/Off(*OSD MENU)
ㆍ 0 : On
1 : Off
ㆍ OSD menu AUTO off term selection
R/W 0x62
ㆍ 0 : 30 sec
1 : 1 min
2 : 2 min 3 : no off
ㆍ OSD menu [SHUTTER] item position(*OSD MENU)
ㆍ Fix at 1'b0.
ㆍ Black level horizontal aperture threshold
R/W 0x03
ㆍ OSD menu [BLC] item position(*OSD MENU)
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ADDR
0xE0
CCD Image Signal Processor
BANK 0
DESCRIPTION
ㆍ Negative image On/Off
status default
BLK_GAIN
ㆍ 0 : Off
1 : On
ㆍ Black level horizontal aperture gain
R/W 0x04
[4:0]
POS_AGC
ㆍ OSD menu [AGC] item position(*OSD MENU)
[7]
HPF_SEL
ㆍ High frequence horizontal aperture filter selection
bit
NAME
[7]
NEGATIVE_IMG
[6:5]
0xE1 [6:5]
HAP_CLIP1
ㆍ Low frequence horizontal aperture clip
[4:0]
POS_WBL
[7]
OSD_OLEN
ㆍ OSD menu [AWB] item position(*OSD MENU)
ㆍ OSD outline On/Off
[6:5]
VAP_CLIP
[4:0]
POS_FNC
0xE2
ㆍ 0 : Off
1 : On
ㆍ Vertical aperture clip
R/W 0xE5
R/W 0x66
ㆍ OSD menu [FUNCTION] item position(*OSD MENU)
ㆍ Set the point of starting AWB
[7] AWB_AE_DETECT ㆍ 0 : Start AWB irrespective of AE
0xE3
1 : Start AWB once AE gets stabilized
[6:5] AWB_METHOD1 ㆍ AWB method1 selection
[4:0]
POS_ADJ
[7]
AWB_TR_CLIP
R/W 0x87
ㆍ OSD menu [ADJUST] item position(*OSD MENU)
ㆍ Clip more than what is set as R_MAX/R_MIN, B_MAX/B_MIN in the
CONFIDENTIAL
AWB tracking area.
ㆍ 0 : Clip Off
0xE4
1 : Clip On
R/W 0xF2
[6:5] AWB_METHOD2 ㆍ AWB method2 selection
[4:0]
POS_LGG
ㆍ OSD menu [LANGUAGE] item position(*OSD MENU)
[7] AWB_METHOD3 ㆍ AWB method3 selection
SWITRON
0xE5 [6:5]
AE_GMAX
ㆍ AE digital gain maximum value selection
[4:0]
POS_CID
[7]
MENU_LOGO_OFF
ㆍ OSD menu [CAMERA ID] item position(*OSD MENU)
ㆍ OSD menu LOGO On/Off
[6]
Fix
0xE6
ㆍ 0 : On
R/W 0x4C
1 : Off
ㆍ Fix at 1'b0.
R/W 0x2D
[5] HAP_SUP_SEL ㆍ Horizontal edge suppress mode selection
[4:0]
POS_MIR
ㆍ OSD menu [MIRROR] item position(*OSD MENU)
[7]
0xE7 [6:5]
[4:0]
Fix
MENU_BKT
POS_DAY
ㆍ Fix at 1'b0.
ㆍ Set menu box transparency
ㆍ OSD menu [DAY&NIGHT] item position(*OSD MENU)
AFE_DAC2_ON ㆍ
ㆍ
[6]
DEF_FA_ON
ㆍ
0xE8
ㆍ
[5]
BTN_P
ㆍ
[4:0]
POS_MOT
ㆍ
[7]
0xE9
AFE DAC2 output On/Off
Field accumulation mode On/Off (defect search)
0 : Off
1 : On
Button press active Low or High selection
POS_PRI
Data sheet
03.12.2007 (REV 0.0)
R/W 0x0F
0 : High
1 : Low
OSD menu [MOTION] item position(*OSD MENU)
[7:5] DEF_FA_VALUE ㆍ Field accumulation count
[4:0]
R/W 0x4E
ㆍ OSD menu [PRIVACY] item position(*OSD MENU)
R/W 0x70
29/43
N V P 2020
ADDR
0xEA
CCD Image Signal Processor
bit
NAME
[7]
OSD_MOLEN
[6:5]
Y_CLIP_TH
[4:0]
POS_GAM
BANK 0
DESCRIPTION
ㆍ OSD menu outline On/Off
status default
ㆍ 0 : Off
1 : On
ㆍ Standards for processing when the output Y value is bigger than
R/W 0x11
Y_CLIP.
ㆍ 0 : clip 1: 1/8
2: 1/4
3 : 1/2
ㆍ OSD menu [GAMMA] item position(*OSD MENU)
[7:6] MOTION_DELAY ㆍ Set the time for alarm signal of motion detection
0xEB
0xEC
ㆍ IRIS GAIN phase change
[5]
MENU_IRIS_GAIN_P
[4:0]
POS_DEF
[7:4]
CLPOB_SIZE
ㆍ Set CLPOB pulse width
[3:0]
CLPOB_POS
ㆍ Set CLPOB position
ㆍ 0 : Normal
R/W 0x93
1 : Change
ㆍ OSD menu [RESET] item position(*OSD MENU)
R/W 0x88
0xED [7:0]
MENU_SH0
ㆍ OSD menu background0 horizontal start
R/W 0x14
0xEE [7:0]
MENU_EH0
ㆍ OSD menu background0 horizontal end
R/W 0x6C
0xEF [7:0]
MENU_SV0
ㆍ OSD menu background0 vertical start
ㆍ AFE DAC1 output On/Off
R/W 0x0F
[7]
AFE_DAC1_ON
[6]
IRIS_AFE_DC
ㆍ 0 : OFF
1 : ON
ㆍ Set the AFE DAC1 output value
CONFIDENTIAL
ㆍ 0: Internal register (IRIS_GAIN)
1 : Iris out
0xF0
[5]
INIT_SCR
ㆍ Display initial screen (blue screen).
0 : Initial screen display Off
R/W 0x05
1: Initial screen display On
SWITRON
ㆍ Set the Internal register of AFE.
[4]
ADC_SET
ㆍ The register saved at AFE_00 ~ AFE_03 is registered as the internal
register of AFE when 0 is changed into 1.
[3:0]
SLAVE_ADDR ㆍ Set I2C communication slave address
0xF1 [7:0]
bank_reg
ㆍ Set internal register bank
R/W 0x00
0xF2 [7:0]
MENU_EV0
ㆍ OSD menu box0 vertical end
R/W 0x20
0xF3 [7:0]
MENU_SH1
ㆍ OSD menu box1 horizontal start
R/W 0x14
0xF4 [7:0]
MENU_EH1
ㆍ OSD menu box1 horizontal end
R/W 0x6C
0xF5 [7:0]
MENU_SV1
ㆍ OSD menu box1 vertical start
R/W 0x21
0xF6 [7:0]
MENU_EV1
ㆍ OSD menu box1 vertical end
R/W 0x6A
0xF7
[7:4]
MENU_BKC1
ㆍ Set OSD menu upper box color
[3:0]
MENU_BKC0
ㆍ Set OSD menu lower box color
[7:3]
test1
[2]
DAC1_SL
0xF8
[1]
DAC2_SL
[0]
Fix
Data sheet
03.12.2007 (REV 0.0)
R/W 0x07
ㆍ Test register
ㆍ DAC1 sleep mode On/Off
ㆍ 0 : Normal operation
1: Power down mode
ㆍ DAC2 sleep mode On/Off
ㆍ 0 : Normal operation
R/W 0x18
1: Power down mode
ㆍ Fix at 1'b0.
30/43
N V P 2020
ADDR
bit
NAME
[7:6]
SD_H1
[5]
SL_H1
0xF9 [4:3]
0xFA
CCD Image Signal Processor
SD_H2
[2]
Fix
[1]
SL_H2
[0]
Fix
[7:6]
SD_RG
[5]
SL_RG
BANK 0
DESCRIPTION
ㆍ Driving option selection
ㆍ 0 : 12mA
1 : 14mA
ㆍ Slew rate selection
status default
2 : 16mA
3 : 18mA
2 : 16mA
3 : 18mA
2 : 16mA
3 : 18mA
ㆍ 0 : Fast
1 : Slow
ㆍ Driving option selection
ㆍ 0 : 12mA
1 : 14mA
ㆍ Fix at 1'b0.
ㆍ Slew rate selection
R/W 0x00
ㆍ 0 : Fast
1 : Slow
ㆍ Fix at 1'b0.
ㆍ Driving option selection
ㆍ 0 : 12mA
1 : 14mA
ㆍ Slew rate selection
R/W 0x00
ㆍ 0 : Fast
1 : Slow
[4:0] HAP_SUPPRESS ㆍ Horizontal edge suppress
CONFIDENTIAL
SWITRON
Data sheet
03.12.2007 (REV 0.0)
31/43
N V P 2020
ADDR
bit
CCD Image Signal Processor
NAME
[7:4] DEFECT_FCNT
0x01
[3:0]
DIFF_CNT
0x02 [7:0] COMPEN_START
BANK 1
DESCRIPTION
ㆍIf defect pixel continues to exist at the level higher than preset value
status default
at time of adjusting CCD defect, it is considered as defect.
ㆍThis is a condition to look for a defect. Comparison is made up to
R/W 0x02
the number of pixels set here at DIFF_CNT.
ㆍ Starting point to correct a defect.
ㆍ The higher the value, correction starts when the screen gets dark.
DSER_START ㆍ Starting point to search for defect value.
ㆍ If the difference with the surrounding pixel is more than what is set,
[7:4]
DIFF_DFT
it is considered as defect.
ㆍ Automatically search for defect.
[3] DEFECT_AUTO
ㆍ 0 : Defect auto Off 1 : Defect auto On
0x03 [7:0]
0x04
0x05
[2]
DEFECT_MANUAL
[1]
RELE_EN
[0]
NEW_EN
[7:4]
REL_FCNT
R/W 0x26
R/W 0x20
ㆍ Delete the wrong defect position.
ㆍ 0 : Delete function Off
1 : Delete function On
ㆍ Add when a new defect is found.
ㆍ 0 : Do not add.
1 : Add.
ㆍ Delete the defect when the position of the defect is maintained for
CONFIDENTIAL
[3:0] OFFSET_NEW
0x08
ㆍ Manually search for defect.
R/W 0x0A
the predetermined duration.
ㆍ Recognize a defect as a new one when its value is greater than the
R/W 0x00
existing defect by as much as what is set at OFFSET_NEW.
[7:6] DEF_V_00[9:8] ㆍ 1
st
[5:4} DEF_V_01[9:8] ㆍ 2
nd
[3:2] DEF_V_02[9:8] ㆍ 3
rd
Vertical defect position
Vertical defect position
SWITRON
Vertical defect position
R/W 0x00
[1:0] DEF_V_03[9:8] ㆍ 4th Vertical Defect Position
0x09 [7:0] DEF_H_00[7:0] ㆍ 1st Horizontal defect position
0x0A [7:0] DEF_V_00[7:0] ㆍ 1
0x0B
st
Vertical defect position
[7:6] DEF_H_00[9:8] ㆍ 1st Horizontal defect position
[5:0] DEF_D_00[5:0] ㆍ 1
st
Defect value
R/W 0x00
R/W 0x00
R/W 0x00
0x0C [7:0] DEF_H_01[7:0] ㆍ 2
nd
Horizontal defect position
R/W 0x00
0x0D [7:0] DEF_V_01[7:0] ㆍ 2
nd
Vertical defect position
R/W 0x00
[7:6] DEF_H_01[9:8] ㆍ 2
nd
Horizontal defect position
[5:0] DEF_D_01[5:0] ㆍ 2
nd
Defect value
0x0F [7:0] DEF_H_02[7:0] ㆍ 3
rd
Horizontal defect position
R/W 0x00
0x10 [7:0] DEF_H_02[7:0] ㆍ 3
rd
Vertical defect position
R/W 0x00
[7:6] DEF_H_02[9:8] ㆍ 3
rd
Horizontal defect position
0x0E
0x11
[5:0] DEF_D_02[5:0] ㆍ 3rd Defect value
0x12 [7:0] DEF_H_03[7:0]
0x13 [7:0] DEF_V_03[7:0]
[7:6] DEF_H_03[9:8]
0x14
[5:0] DEF_D_03[5:0]
[7:6] DEF_V_04[9:8]
0x15
ㆍ
ㆍ
ㆍ
ㆍ
ㆍ
4th
th
4
4th
th
4
th
5
Horizontal defect position
Vertical defect position
Horizontal defect position
Defect value
Vertical defect position
[5:4] DEF_V_05[9:8] ㆍ 6
th
Vertical defect position
[3:2] DEF_V_06[9:8] ㆍ 7
th
Vertical defect position
[1:0] DEF_V_07[9:8] ㆍ 8
th
Vertical defect position
Data sheet
03.12.2007 (REV 0.0)
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
32/43
N V P 2020
CCD Image Signal Processor
BANK 1
ADDR bit
NAME
DESCRIPTION
0x16 [7:0] DEF_H_04[7:0] ㆍ 5th Horizontal defect position
0x17 [7:0] DEF_V_04[7:0] ㆍ 5
th
Vertical defect position
[7:6] DEF_H_04[9:8] ㆍ 5
th
Horizontal defect position
0x18
[5:0] DEF_D_04[5:0] ㆍ 5th Defect value
status default
R/W 0x00
R/W 0x00
R/W 0x00
0x19 [7:0] DEF_H_05[7:0] ㆍ 6th Horizontal defect position
R/W 0x00
0x1A [7:0] DEF_V_05[7:0] ㆍ 6th Vertical defect position
R/W 0x00
[7:6] DEF_H_05[9:8] ㆍ 6
th
Horizontal defect position
[5:0] DEF_D_05[5:0] ㆍ 6
th
Defect value
0x1C [7:0] DEF_H_06[7:0] ㆍ 7
th
Horizontal defect position
R/W 0x00
0x1D [7:0] DEF_H_06[7:0] ㆍ 7
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_06[9:8] ㆍ 7
th
Horizontal defect position
[5:0] DEF_D_06[5:0] ㆍ 7
th
Defect value
0x1B
0x1E
0x1F [7:0] DEF_H_07[7:0] ㆍ 8th Horizontal defect position
0x20 [7:0] DEF_V_07[7:0] ㆍ 8
0x21
th
Vertical defect position
[7:6] DEF_H_07[9:8] ㆍ 8th Horizontal defect position
[5:0] DEF_D_07[5:0] ㆍ 8th Defect value
CONFIDENTIAL
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
[7:6] DEF_V_08[9:8] ㆍ 9th Vertical defect position
0x22
[5:4} DEF_V_09[9:8] ㆍ 10th Vertical defect position
[3:2] DEF_V_10[9:8] ㆍ 11
th
Vertical defect position
[1:0] DEF_V_11[9:8] ㆍ 12
th
Vertical defect position
0x23 [7:0] DEF_H_08[7:0] ㆍ 9
th
Horizontal defect position
SWITRON
0x24 [7:0] DEF_V_08[7:0] ㆍ 9
th
Vertical defect position
[7:6] DEF_H_08[9:8] ㆍ 9
th
Horizontal defect position
[5:0] DEF_D_08[5:0] ㆍ 9
th
Defect value
0x25
0x26 [7:0] DEF_H_09[7:0] ㆍ 10th Horizontal defect position
0x27 [7:0] DEF_V_09[7:0] ㆍ 10
0x28
th
Vertical defect position
[7:6] DEF_H_09[9:8] ㆍ 10th Horizontal defect position
[5:0] DEF_D_09[5:0] ㆍ 10th Defect value
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
0x29 [7:0] DEF_H_10[7:0] ㆍ 11th Horizontal defect position
R/W 0x00
0x2A [7:0] DEF_H_10[7:0] ㆍ 11th Vertical defect position
R/W 0x00
[7:6] DEF_H_10[9:8] ㆍ 11
th
Horizontal defect position
[5:0] DEF_D_10[5:0] ㆍ 11
th
Defect value
0x2C [7:0] DEF_H_11[7:0] ㆍ 12
th
Horizontal defect position
R/W 0x00
0x2D [7:0] DEF_V_11[7:0] ㆍ 12
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_11[9:8] ㆍ 12
th
Horizontal defect position
[5:0] DEF_D_11[5:0] ㆍ 12
th
Defect value
0x2B
0x2E
R/W 0x00
R/W 0x00
[7:6] DEF_V_12[9:8] ㆍ 13th Vertical defect position
0x2F
[5:4} DEF_V_13[9:8] ㆍ 14th Vertical defect position
[3:2] DEF_V_14[9:8] ㆍ 15th Vertical defect position
R/W 0x00
[1:0] DEF_V_15[9:8] ㆍ 16th Vertical defect position
0x30 [7:0] DEF_H_12[7:0] ㆍ 13th Horizontal defect position
R/W 0x00
0x31 [7:0] DEF_V_12[7:0] ㆍ 13th Vertical defect position
R/W 0x00
Data sheet
03.12.2007 (REV 0.0)
33/43
N V P 2020
ADDR
0x32
CCD Image Signal Processor
BANK 1
bit
NAME
DESCRIPTION
[7:6] DEF_H_12[9:8] ㆍ 13th Horizontal defect position
[5:0] DEF_D_12[5:0] ㆍ 13th Defect value
status default
R/W 0x00
0x33 [7:0] DEF_H_13[7:0] ㆍ 14th Horizontal defect position
R/W 0x00
0x34 [7:0] DEF_V_13[7:0] ㆍ 14th Vertical defect position
R/W 0x00
0x35
[7:6] DEF_H_13[9:8] ㆍ 14
th
Horizontal defect position
[5:0] DEF_D_13[5:0] ㆍ 14th Defect value
R/W 0x00
0x36 [7:0] DEF_H_14[7:0] ㆍ 15
th
Horizontal defect position
R/W 0x00
0x37 [7:0] DEF_H_14[7:0] ㆍ 15
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_14[9:8] ㆍ 15
th
Horizontal defect position
[5:0] DEF_D_14[5:0] ㆍ 15
th
Defect value
0x39 [7:0] DEF_H_15[7:0] ㆍ 16
th
Horizontal defect position
R/W 0x00
0x3A [7:0] DEF_V_15[7:0] ㆍ 16
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_15[9:8] ㆍ 16
th
Horizontal defect position
[5:0] DEF_D_15[5:0] ㆍ 16
th
Defect value
0x38
0x3B
R/W 0x00
R/W 0x00
[7:6] DEF_V_16[9:8] ㆍ 17th Vertical defect position
0x3C
[5:4} DEF_V_17[9:8] ㆍ 18th Vertical defect position
CONFIDENTIAL
[3:2] DEF_V_18[9:8] ㆍ 19th Vertical defect position
R/W 0x00
[1:0] DEF_V_19[9:8] ㆍ 20th Vertical defect position
0x3D [7:0] DEF_H_16[7:0] ㆍ 17
th
Horizontal defect position
R/W 0x00
0x3E [7:0] DEF_V_16[7:0] ㆍ 17
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_16[9:8] ㆍ 17
th
Horizontal defect position
0x3F
SWITRON
R/W 0x00
[5:0] DEF_D_16[5:0] ㆍ 17
th
Defect value
0x40 [7:0] DEF_H_17[7:0] ㆍ 18
th
Horizontal defect position
R/W 0x00
0x41 [7:0] DEF_V_17[7:0] ㆍ 18
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_17[9:8] ㆍ 18
th
Horizontal defect position
[5:0] DEF_D_17[5:0] ㆍ 18
th
Defect value
0x42
0x43 [7:0] DEF_H_18[7:0] ㆍ 19th Horizontal defect position
0x44 [7:0] DEF_H_18[7:0] ㆍ 19
th
Vertical defect position
[7:6] DEF_H_18[9:8] ㆍ 19
th
Horizontal defect position
0x45
[7:0] DEF_D_18[5:0] ㆍ 19th Defect value
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
0x46 [7:0] DEF_H_19[7:0] ㆍ 20
th
Horizontal defect position
R/W 0x00
0x47 [7:0] DEF_V_19[7:0] ㆍ 20
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_19[9:8] ㆍ 20
th
Horizontal defect position
[5:0] DEF_D_19[5:0] ㆍ 20
th
Defect value
[7:6] DEF_V_20[9:8] ㆍ 21
th
Vertical defect position
[5:4} DEF_V_21[9:8] ㆍ 22
th
Vertical defect position
[3:2] DEF_V_22[9:8] ㆍ 23
th
Vertical defect position
0x48
0x49
R/W 0x00
R/W 0x00
[1:0] DEF_V_23[9:8] ㆍ 24th Vertical defect position
0x4A [7:0] DEF_H_20[7:0] ㆍ 21th Horizontal defect position
0x4B [7:0] DEF_V_20[7:0] ㆍ 21
th
Vertical defect position
[7:6] DEF_H_20[9:8] ㆍ 21
th
Horizontal defect position
0x4C
[5:0] DEF_D_20[5:0] ㆍ 21th Defect value
Data sheet
03.12.2007 (REV 0.0)
R/W 0x00
R/W 0x00
R/W 0x00
34/43
N V P 2020
CCD Image Signal Processor
BANK 1
ADDR bit
NAME
DESCRIPTION
0x4D [7:0] DEF_H_21[7:0] ㆍ 22th Horizontal defect position
0x4E [7:0] DEF_V_21[7:0] ㆍ 22
th
Vertical defect position
[7:6] DEF_H_21[9:8] ㆍ 22
th
Horizontal defect position
0x4F
[5:0] DEF_D_21[5:0] ㆍ 22th Defect value
status default
R/W 0x00
R/W 0x00
R/W 0x00
0x50 [7:0] DEF_H_22[7:0] ㆍ 23th Horizontal defect position
R/W 0x00
0x51 [7:0] DEF_H_22[7:0] ㆍ 23th Vertical defect position
R/W 0x00
[7:6] DEF_H_22[9:8] ㆍ 23
th
Horizontal defect position
[5:0] DEF_D_22[5:0] ㆍ 23
th
Defect value
0x53 [7:0] DEF_H_23[7:0] ㆍ 24
th
Horizontal defect position
R/W 0x00
0x54 [7:0] DEF_V_23[7:0] ㆍ 24
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_23[9:8] ㆍ 24
th
Horizontal defect position
[7:0] DEF_D_23[5:0] ㆍ 24
th
Defect value
0x52
0x55
R/W 0x00
R/W 0x00
[7:6] DEF_V_24[9:8] ㆍ 25th Vertical defect position
0x56
[5:4] DEF_V_25[9:8] ㆍ 26th Vertical defect position
[3:2] DEF_V_26[9:8] ㆍ 27th Vertical defect position
R/W 0x00
[1:0] DEF_V_27[9:8] ㆍ 28th Vertical defect position
CONFIDENTIAL
0x57 [7:0] DEF_H_24[7:0] ㆍ 25th Horizontal defect position
R/W 0x00
0x58 [7:0] DEF_V_24[7:0] ㆍ 25th Vertical defect position
R/W 0x00
[7:6] DEF_H_24[9:8] ㆍ 25
th
Horizontal defect position
[5:0] DEF_D_24[5:0] ㆍ 25
th
Defect value
0x5A [7:0] DEF_H_25[7:0] ㆍ 26
th
Horizontal defect position
0x59
SWITRON
0x5B [7:0] DEF_V_25[7:0] ㆍ 26
th
Vertical defect position
[7:6] DEF_H_25[9:8] ㆍ 26
th
Horizontal defect position
[5:0] DEF_D_25[5:0] ㆍ 26
th
Defect value
0x5C
0x5D [7:0] DEF_H_26[7:0] ㆍ 27th Horizontal defect position
0x5E [7:0] DEF_H_26[7:0] ㆍ 27
0x5F
th
Vertical defect position
[7:6] DEF_H_26[9:8] ㆍ 27th Horizontal defect position
[5:0] DEF_D_26[5:0] ㆍ 27th Defect value
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
0x60 [7:0] DEF_H_27[7:0] ㆍ 28th Horizontal defect position
R/W 0x00
0x61 [7:0] DEF_V_27[7:0] ㆍ 28th Vertical defect position
R/W 0x00
[7:6] DEF_H_27[9:8] ㆍ 28
th
Horizontal defect position
[5:0] DEF_D_27[5:0] ㆍ 28
th
Defect value
[7:6] DEF_V_28[9:8] ㆍ 29
th
Vertical defect position
[5:4} DEF_V_29[9:8] ㆍ 30
th
Vertical defect position
[3:2] DEF_V_30[9:8] ㆍ 31
th
Vertical defect position
[1:0] DEF_V_31[9:8] ㆍ 32
th
Vertical defect position
0x64 [7:0] DEF_H_28[7:0] ㆍ 29
th
Horizontal defect position
R/W 0x00
0x65 [7:0] DEF_V_28[7:0] ㆍ 29
th
Vertical defect position
R/W 0x00
0x62
0x63
0x66
[7:6] DEF_H_28[9:8] ㆍ 29th Horizontal defect position
[5:0] DEF_D_28[5:0] ㆍ 29th Defect value
R/W 0x00
R/W 0x00
R/W 0x00
0x67 [7:0] DEF_H_29[7:0] ㆍ 30th Horizontal defect position
R/W 0x00
0x68 [7:0] DEF_V_29[7:0] ㆍ 30th Vertical defect position
R/W 0x00
Data sheet
03.12.2007 (REV 0.0)
35/43
N V P 2020
ADDR
0x69
CCD Image Signal Processor
BANK 1
bit
NAME
DESCRIPTION
[7:6] DEF_H_29[9:8] ㆍ 30th Horizontal defect position
[5:0] DEF_D_29[5:0] ㆍ 30th Defect value
status default
R/W 0x00
0x6A [7:0] DEF_H_30[7:0] ㆍ 31th Horizontal defect position
R/W 0x00
0x6B [7:0] DEF_H_30[7:0] ㆍ 31th Vertical defect position
R/W 0x00
0x6C
[7:6] DEF_H_30[9:8] ㆍ 31
th
Horizontal defect position
[5:0] DEF_D_30[5:0] ㆍ 31th Defect value
R/W 0x00
0x6D [7:0] DEF_H_31[7:0] ㆍ 32
th
Horizontal defect position
R/W 0x00
0x6E [7:0] DEF_V_31[7:0] ㆍ 32
th
Vertical defect position
R/W 0x00
[7:6] DEF_H_31[9:8] ㆍ 32
th
Horizontal defect position
0x6F
[5:0] DEF_D_31[5:0] ㆍ
ㆍ
[7]
AED_SPD
ㆍ
0x70
[6:4]
V_OFFSET
ㆍ
[3:0]
0x71
0x72
OSD_ROMRAM_POS
th
32 Defect value
AE digital gain speed selection
0 : Normal
1 : Fast
Encoder vertical direction offset
SEL_IRISL
ㆍ Select the input pin for the IRIS control left button signal
[3:0]
SEL_IRISR
ㆍ Select the input pin for the IRIS control right button signal
[3:0]
CONFIDENTIAL
Fix
SEL_MOTION
R/W 0x35
ㆍ Set delay for timing on font display
[7:4]
[7:4]
R/W 0x00
ㆍ Fix at 1'b0.
ㆍ Select the input pin for the MOTION enable signal
R/W 0x00
R/W 0x00
SWITRON
Data sheet
03.12.2007 (REV 0.0)
36/43
N V P 2020
CCD Image Signal Processor
ADDR bit
NAME
0x81 [5:0] ACC_BLC_MSB
0x82 [7:0] ACC_BLC_LSB
0x83 [5:0] ACC_NBLC_LSB
0x84 [7:0] ACC_NBLC_LSB
BANK 0x81
DESCRIPTION
ㆍ Accumulated value at the BLC area
ㆍ Accumulated value outside the Non-BLC area
AE_ES_MSB
ㆍ Electronic shutter value
[7:0] AE_ES_LSB
[7:0]
AGC
ㆍ AGC value
[7:0] AE_DIGT_GAIN ㆍ AE digital gain value
[7:0]
AE_ACC
ㆍ Average brightness of the input video
[7:0]
AWB_R
ㆍ AWB R value
[7:0]
AWB_B
ㆍ AWB B value
[7:0] AWB_TARGET_R ㆍ Target R for AWB
[7:0] AWB_TARGET_B ㆍ Target B for AWB
status default
R
-
R
-
R
-
R
-
0x85 [4:0]
R
-
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
R
R
R
R
R
R
R
R
-
CONFIDENTIAL
SWITRON
Data sheet
03.12.2007 (REV 0.0)
37/43
N V P 2020
CCD Image Signal Processor
3. Electrical Characteristics
3.1.
Absolute Maximum Ratings
Parameter
Min
Max
Unit
Power supply voltage
-0.5
6
V
Voltage on any 3.3V input pin
3.0
3.6
V
Voltage on any 5V input pin
4.5
5.5
V
Storage temperature
-40
125
℃
3.2.
Recommended Operating Condition
Parameter
Symbol
Min
Typ
Max
Unit
3.3V Digital power supply voltage
VDD3
3.0
3.3
3.6
V
3.3V Analog power supply voltage
AVDD3
3.0
3.3
3.6
V
5.0V Digital power supply voltage
Commercial temperature range
Industrial temperature range
VDD5
TA
TA
4.5
0
-40
5.0
-
5.5
70
85
V
℃
℃
3.3.
CONFIDENTIAL
DC Characteristics
Parameter
Symbol
Min
Typ
Max
Unit
VSS-0.3
-
0.3VDD3
V
3.3V Pins *Note1
Input low voltage
VIL3
SWITRON
VIH3
0.7VDD3
-
VDD3+0.3
V
IIL3
-
-
-10
uA
IIH3
-
-
10
uA
Input capacitance (f = 1Mhz, VIN3= 2.4V)
CIN
-
-
10
pF
Output low voltage (IOH3 = 3.2mA)
VOL3
-
-
0.4
V
Output high voltage (IOH3 = -400uA)
VOH3
2.4
-
VDD3
V
COUT
-
-
10
pF
V
Input high voltage
Input low current (VIN3 = VSS)
Input high current (VIN3 = VDD3)
Output capacitance
5.0V Pins *Note2
Input low voltage
VIL5
VSS-0.5
-
0.8
Input high voltage
VIH5
2.0
-
VDD5+0.5
V
Input low current (VIN5 = VSS)
IIL5
-
-
-10
uA
Input high current (VIN5 = VDD5)
IIH5
-
-
10
uA
Input capacitance (f = 1Mhz, VIN5 = 2.4V)
CIN
-
-
10
pF
Output low voltage (IOH5 = 3.2mA)
VOL5
-
-
0.4
V
Output high voltage (IOH5 = -400uA)
VOH5
2.4
-
VDD5
V
Output capacitance
COUT
-
-
10
pF
*Note2 : 3.3V data pins
expect 5V data pins
*Note3 : 5V data pins
XRG, H1, H2 pins(#5, #4, #3)
Data sheet
03.12.2007 (REV 0.0)
38/43
N V P 2020
CCD Image Signal Processor
4. System Application
4.1.1 Circuit Guide (NVP2020)
L1
10uH
R2
0
+
TC1
T10/10V(A)
C1
0.1u(F)
C2
0.1u(F)
+
+3.3V
TC2
T22/6.3V(A)
2
2
+3.3V
L2
10uH
1
R1
NC
1
+5.0V
L3
C3
0.1u(F)
10uH
+
TC3
T22/6.3V(A)
2
+3.3_VDD3
+3.3V
1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
ADCLK
SHP
SHD
U1
L5
0.1u(F)
1
XSUB
V2
V1
XSG1
V3
XSG2
0.1u(F)
R5
2K
SHD
SHP
VDD3
ADCLK
VSS
CF AIN-0
CF AIN-1
CF AIN-2
CF AIN-3
CF AIN-4
CF AIN-5
CF AIN-6
CF AIN-7
CF AIN-8
CF AIN-9
VSSUB
2
C8
R6
IRIS_SIGNAL
VOUT
VIN
VSAG
1
2
TC5
T100/6.3V(B2)
1
2
3
1
NJM2575F1
2
R3
75
TC7
T22/6.3V(A)
0.1u(B)
4.7K
C11
0.1u(F)
R7
200
EXP_I_3
EXP_I_2
EXP_I_1
TC10
T22/6.3V(A)
2
4
P/S
GND
R4
1K
+3.3V
+
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
+
U2
NVP2020
C7
C5
0.1u(F)
VCC
2
0.1u(F)
C10
VREF
IREF
COMP
VSSA
AVDD3C
DAC2
VSSA
AVDD3Y
DAC1
VDD3
VDDI
RSTB
EXP_I_3
EXP_I_2
EXP_I_1
VSS
1
C9
VSS
VDD5
H2
H1
XRG
VSS
VDD3
VDD3
VSS
VDDI
XSUB
V2
V1
XSG1
V3
XSG2
TC6
T22/6.3V(A)
C6
NC
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
C13
0.1u(F)
2
H2
H1
XRG
5
+
V4
AFE_SCL
AFE_SDA
AFE_SLD
EXP_IO_1
EXP_IO_2
EXP_IO_3
VDD3
XTALI
XTALO
VSS
VSS
EXP_IO_4
I2C_SCL
ISC_SDA
TSTO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
6
10uH
1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
+3.3V
D3
KDS160E
R9
100K
CONFIDENTIAL
C14
0.1u(F)
C17
1
GND
2
1
10uH
U4
KIA7029AT(TSM)
R13
+
C22
0.1u(F)
1M
R14
150
2
TC13
T22/6.3V(A)
1
C20
1u(F)
L7
+3.3V
VCC
3
RESET
V4
C15
0.1u(F)
0.1u(F)
EXP_IO_4
SCK
SDATA
SL
EXP_IO_1
EXP_IO_2
EXP_IO_3
TC9
T22/6.3V(A)
L8
10uH
X1
+3.3V
1
SWITRON
R15
4.7K
C25
NC
R16
4.7K
C26
20p(B)
+
TC14
T22/6.3V(A)
2
T1
20pF
C23
0.1u(F)
4
3
2
1
GND SDA
AO2 SCL
AO1
WP
AO0 VCC
5
6
7
8
NTSC:28.63636MHZ
PAL:28.375MHZ
U5
AT24C16N (SOP)
CN4
SDA
SCL
4
3
2
1
4P_1.25mm
Circuit Guide
Ref. Desg.
Value
Maker
L1~L8
10uH
TDK
TC1~8
Stanrd
Type (Size)
NLFV25T-100K-PF
2520
NLCV32T-100K-PF
3225
Partsnic
TLMOJ226ASSR
3216
SAMSUNG
TCSCSOJ226MA
3216
22/6.3V
C1~C23
0.1uF
SAMSUNG
CL10F104ZB8
1608
R1~R23
10K ~
SAMSUNG
RC1608J103CS
1608
Data sheet
03.12.2007 (REV 0.0)
39/43
VIDEO
N V P 2020
CCD Image Signal Processor
D7
D6
D5
D4
D3
D2
D1
D0
D9
D8
ADCLK
4.1.2 Circuit Guide (AD9943)
L5
10uH
1
+3.3V
+
8
7
6
5
4
3
2
1
C6
0.1u(F)
D7
D6
D5
D4
D3
D2
D1
D0
2
TC7
T22/6.3V(A)
9
10
11
12
13
14
15
16
L6
10uH
1
+3.3V
+
U3
AD9943
NC
NC
NC
NC
NC
SCK
SDATA
SL
32
31
30
29
28
27
26
25
SCK
SDATA
SL
CLPOB
SHP
SHD
AVDD
AVSS
CCDIN
REFT
REFB
C12
0.1u(F)
17
18
19
20
21
22
23
24
2
TC8
T22/6.3V(A)
D8
D9
DRVDD
DRVSS
DVDD
DATACLK
DVSS
PBLK
82
82
1
R10
R11
C16
0.1u(F)
1
CONFIDENTIAL
CLPOB
SHP
SHD
+
+
2
C19
NC
2
SWITRON
C18
NC
TC11
T22/6.3V(A)
TC12
T22/6.3V(A)
CCD IN
C21
0.1u(B)
Data sheet
03.12.2007 (REV 0.0)
40/43
N V P 2020
CCD Image Signal Processor
H1
H2
XRG
CCD_OUT
4.1.3 Circuit Guide (CCD)
C24
0.1u(F)
D4
L9
1
10
10
47uH
2
-8.0V
R17
10
C27
0.1u(F)
R21
NC
1
+15V_A
L10
47uH
1
+15V
R20
1M
R18
R19
+
TC15
T4.7/16V(A)
2
NC
TC16
T10/25V(B2)
D5
R22
C28
0.1u(F)
2
100
C30
C31
270p(B)
D6
KDS160E
R24
100K
1
VOUT
NC
NC
GND
VQ1
VQ2
VQ3
VQ4
R23
1M
D
C29
0.1u(F)
U6
16
15
14
13
12
11
10
9
VHH2
VSUB
VEE
φV2
φV1
VME
φV3
φV4
GND
XSUB
XV2
XV1
XSG1
XV3
XSG2
XV4
1
2
3
4
5
6
7
8
XSUB
V2
V1
XSG1
V3
XSG2
V4
NVD2014
G
S
Q1
KTK5132U
1u / 2012(F)
8
7
6
5
4
3
2
1
R25
100
2
VDD
GND
SUB
VL
RG
NC
HQ1
HQ2
2
U7
RJ2351/2361BA
1
NC
9
10
11
12
13
14
15
16
+
R26
4.7K
CONFIDENTIAL
SWITRON
Data sheet
03.12.2007 (REV 0.0)
41/43
N V P 2020
4.2.
CCD Image Signal Processor
Package Information
CONFIDENTIAL
SWITRON
Type
Pin pitch
Size(WxD)
64 - LQFP
0.40mm
7x7mm
Package
Data sheet
03.12.2007 (REV 0.0)
42/43
N V P 2020
CCD Image Signal Processor
5. Revision History
REVISION
DATE
DESCRIPTION
6. Contact Information
-. Homepage : www.nextchip.com
-. E-mail : [email protected]
-. Tel : 82-2-3460-4700
CONFIDENTIAL
SWITRON
Data sheet
03.12.2007 (REV 0.0)
43/43