SPIF223A ATA to Serial ATA Bi-direction Bridge MAY 29, 2006 Version 1.2 Sunplus Technology reserves the right to change this documentation without prior notice. Information provided by Sunplus Technology is believed to be accurate and reliable. However, Sunplus Technology makes no warranty for any errors which may appear in this document. Contact Sunplus Technology to obtain the latest version of device specifications before placing your order. No responsibility is assumed by Sunplus Technology for any infringement of patent or other rights of third parties which may result from its use. In addition, Sunplus products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. http://www.golon.net E-mail:[email protected] Mr Wu 13798432566 SPIF223A Table of Contents PAGE 1. GENERAL DESCRIPTION .......................................................................................................................................................................... 3 2. FEATURES.................................................................................................................................................................................................. 3 3. REFERENCES ............................................................................................................................................................................................ 3 4. FUNCTIONAL BLOCK DIAGRAM .............................................................................................................................................................. 4 5. SIGNAL DESCRIPTIONS............................................................................................................................................................................ 5 5.1. PIN DESCRIPTIONS ................................................................................................................................................................................ 5 5.2. PIN LIST ................................................................................................................................................................................................ 5 5.3. ATA INTERFACE REVERSE ...................................................................................................................................................................... 6 5.4. SPIF223A PIN DIAGRAM........................................................................................................................................................................ 9 6. ELECTRONICAL SPECIFICATION .......................................................................................................................................................... 10 6.1. POWER REQUIREMENT ........................................................................................................................................................................ 10 6.2. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................. 10 6.3. RECOMMENDED/TYPICAL OPERATING CONDITIONS ............................................................................................................................... 10 6.4. DC CHARACTERISTICS ..........................................................................................................................................................................11 6.5. SPIF223A UART AND SPI INTERFACE SELECT: .....................................................................................................................................11 6.6. SPIF223A DEVICE MODE OR HOST : .....................................................................................................................................................11 6.7. SPIF223A ATA DEVICE MODE SELECT: .................................................................................................................................................11 6.8. SPIF223A SERIAL ATA BUS TRI-STATE FEATURE:...................................................................................................................................11 6.9. SPIF223A ATA BUS TRI-STATE FEATURE: ..............................................................................................................................................11 7. COMMAND LIST ....................................................................................................................................................................................... 12 7.1. ATA COMMAND LIST:............................................................................................................................................................................ 12 7.2. ATAPI COMMAND LIST: ........................................................................................................................................................................ 15 8. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 17 8.1. PACKAGE INFORMATION ....................................................................................................................................................................... 17 8.1.1. 64 pin TQFP............................................................................................................................................................................ 17 8.2. ORDERING INFORMATION ..................................................................................................................................................................... 19 8.3. STORAGE CONDITION AND PERIOD FOR PACKAGE ................................................................................................................................. 19 8.4. RECOMMENDED SMT TEMPERATURE PROFILE...................................................................................................................................... 19 9. DISCLAIMER............................................................................................................................................................................................. 20 10. REVISION HISTORY ................................................................................................................................................................................. 21 http://www.golon.net E-mail:[email protected] 2 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A A SINGLE-CHIP SOLUTION FOR AN ATA TO SERIAL ATA DEVICE BRIDGE 1. GENERAL DESCRIPTION The Sunplus SPIF223A is a single-chip solution for bi-direction of Serial ATA Features ATA to Serial ATA and Serial ATA to ATA device bridge. It could ⎯ Integrated Serial ATA Link and PHY logic. accept ATA commands through both ATA and SATA interface , ⎯ Compliant with Serial ATA 1.0A specifications. decode the commands and converts them into ATA commands to ⎯ Support Serial ATA Generation 1 transfer rate of 1.5Gb/s. the device. Response from the device through the serial ATA or ⎯ Support Spread Spectrum in receiver. ATA bus are deciphered, processed and converted to ATA protocol ⎯ Support Serial ATA power saving mode : Partial, and Slumber.. and sent to the host. The SPIF223A supports the Serial ATA generation 1 transfer rate of 1.5Gb/s (150MB/s) on the serial side ATA Features ⎯ Compliant with ATA specifications. and is compatible with Ultra133 on the ATA side. ⎯ Compatible with Ultra ATA 133. ⎯ Support PIO mode 0,1,2,3,4,5,6 MDMA0,1,2 and Ultra DMA 2. FEATURES mode 0,1,2,3,4,5,6 ⎯ Support UDMA data transfer rates of up to 133MBps. Overall Features ⎯ Bi-Direction of ATA to Serial ATA bridge chip. ⎯ Support ATA device master/slave/Chip select ⎯ Compliant with ATA specification. ⎯ Support ATA bus timing control. ⎯ Compliant with SATA 1.0a specification. ⎯ Support ATA and ATAPI device like HDD and ODD, Tape.. ⎯ Compatible with Ultra ATA 133. ⎯ Support ATA interface reverse feature. emulation. ⎯ Fabricated in 0.16um CMOS process with 1.8 volt core and 3.3 volt I/Os. ⎯ Available in a 64-pin TQFP package with e-Pad . 3. REFERENCES ⎯ PHY isolation debug mode For more details about Serial ATA and ATA technology please refer ⎯ Full scan for high production test coverage to the following industry specifications: ⎯ Build-in 8051 uP to control data flow. Serial 1 ⎯ Support UART, SPI, I2C bus. 1 High Speed Serialized ATA Attachment specification, Revision 1.0A. ⎯ Support ATA bus skew-rate programming by UART/SPI interface. ATA / Http://www.T13.org/ ATA/ATAPI specifications. 2 For e-Pad of SPIF223A, please always connect e-Pad to the ground of application board. 2 For ATA bus timing control, please check with agent to get more information for UART/SPI interface. http://www.golon.net E-mail:[email protected] 3 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 4. FUNCTIONAL BLOCK DIAGRAM TestControlSignals SDAT SCLK Test Controller PLL XTALI XTALO clock I2C ATA ATA IF TX+/FIFO Registers Transport LINK PHY SDIF RX+/- 8051 RAM ROM Power Management UART UAI UAO http://www.golon.net E-mail:[email protected] 4 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 5.SIGNAL DESCRIPTIONS 5.1. Pin Descriptions Table 5-1: Pin Types Pin Type I/O Pin Description Bi-directional Pin I Input Pin with LVTTL Thresholds O Output Pin I-Sch Input Pin with Schmitt Trigger P Pull-Down resistor is internal T Tri-state Output Pin 5.2. Pin List Table 5-2: SPIF223A Pin Listing Pin# Pin Name Type Description 1 B_IDE_DD[13] I/O ATA Interface Data Bus bit 13 2 B_IDE_DD[2] I/O ATA Interface Data Bus bit 2 3 B_IDE_DD[12] I/O ATA Interface Data Bus bit 12 4 D3V3_IO 5 B_IDE_DD[3] I/O ATA Interface Data Bus bit 3 6 B_IDE_DD[11] I/O ATA Interface Data Bus bit 11 7 B_IDE_DD[4] I/O ATA Interface Data Bus bit 4 8 DVSS GND Ground for the Digital Core and I/O 9 D1V8_CO PWR 1.8V Digital CORE Power 10 B_IDE_DD[10] I/O ATA Interface Data Bus bit 10 11 B_IDE_DD[5] I/O ATA Interface Data Bus bit 5 12 B_IDE_DD[9] I/O ATA Interface Data Bus bit 9 13 B_IDE_DD[6] I/O ATA Interface Data Bus bit 6 14 B_IDE_DD[8] I/O ATA Interface Data Bus bit 8 PWR 3.3V Digital I/O Power 15 B_IDE_DD[7] I/O ATA Interface Data Bus bit 7 16 I_IDE_RST_B I/O ATA Interface Reset. 17 RESET_B I 18 D3V3_IO PWR 19 IDE_ORD_INV I ATA Cable Signal Ordering Inverse 20 CFG0 I Device/Host mode enable 21 UART_SPI_SEL I UART/SPI interface enable 22 XTALI/CLKI I Crystal oscillator input or external clock input 23 XTALO O Crystal oscillator output 24 VDDA PWR 1.8V Analog Power 25 GNDA GND Analog Ground 26 REXT I External reference resistor input 27 RXP I Differential receive +ve I ASIC Reset input 3.3V Digital I/O Power 28 RXN 29 VDDA PWR 1.8V Analog Power 30 GNDA GND Analog Ground 31 TXN O 0: UART enable, 1: SPI enable Differential receive –ve Differential transmit –ve http://www.golon.net E-mail:[email protected] 5 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A Pin# Pin Name Type Description 32 TXP O Differential transmit +ve 33 I_IDE_JUMP0 I Jumper 0 34 IDE_DASP I/O 35 IDE_JUMP1 I Jumper 1 ATA Interface Device Active or Slave(Device 1) Present 36 TEST_CFG I Test Configuration bit 0 37 UAO_SPI_OUT O UART/SPI data output 38 SPI_En_B O SPI Enable 39 SPL_CLK O SPI Clock 40 UAI_SPI_IN 41 D1V8_CO PWR 1.8V Digital CORE Power 42 DVSS GND Ground for the Digital Core and I/O 43 I2C_SDA I/O 44 D3V3_IO PWR 45 I2C_SCLK I/O 46 IDE_PDIAG 47 IDE_CS1_B I/O I/O 48 IDE_CS0_B 49 I UART/SPI data in I2C Serial Data I2C Serial Clock ATA Interface Passed Diagnostics ATA Interface Cable Assembly Type Identifier ATA Interface Chip Select 1 I/O ATA Interface Chip Select 0 I/O IDE_DA2 3.3V Digital I/O Power ATA Interface Device Address bit 2 I/O 50 IDE_DA0 51 IDE_DA1 I/O ATA Interface Device Address bit 0 ATA Interface Device Address bit 1 52 IDE_CSEL I/O ATA Interface Cable Select 53 IDE_INTRQ I/O ATA Interface Interrupt Request 54 IDE_DMACK_B I/O ATA Interface DMA Acknowledge 55 IDE_IORDY I/O ATA Interface I/O Ready ATA Interface DMA Read during Ultra DMA data-out bursts ATA Interface Data Strobe during Ultra DMA data-in bursts 56 D3V3_IO PWR 3.3V Digital I/O Power 57 DVSS GND Ground for the Digital Core and I/O 58 IDE_DIOR_B I/O ATA Interface I/O Read ATA Interface DMA Ready during Ultra DMA data-in bursts ATA Interface Data Strobe during Ultra DMA data-out bursts 59 IDE_DIOW_B I/O ATA Interface I/O Write ATA Interface Stop during Ultra DMA data bursts 60 IDE_DMARQ I/O ATA Interface DMA Request 61 IDE_DD[15] I/O ATA Interface Data Bus bit 15 62 IDE_DD[0] I/O ATA Interface Data Bus bit 0 63 IDE_DD[14] I/O ATA Interface Data Bus bit 14 64 IDE_DD[1] I/O ATA Interface Data Bus bit 1 5.3. ATA Interface Reverse IDE_ORD_INV = 0 IDE_ORD_INV = 1 Pin Name Pin Name Pin# 1 IDE_DD[13] IDE_DD[0] 2 IDE_DD[2] IDE_DD[15] 3 IDE_DD[12] IDE_DMARQ 4 D3V3_IO 5 IDE_DD[3] IDE_DIOW_ 6 IDE_DD[11] IDE_DIOR_ http://www.golon.net E-mail:[email protected] 6 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A IDE_ORD_INV = 0 IDE_ORD_INV = 1 Pin Name Pin Name Pin# 7 B_IDE_DD[4] 8 DVSS 9 D1V8_CO IDE_DMACK_ 10 IDE_DD[10] IDE_INTRQ 11 IDE_DD[5] IDE_CSEL 12 IDE_DD[9] IDE_DA1 13 IDE_DD[6] IDE_DA0 14 IDE_DD[8] IDE_DA2 15 IDE_DD[7] IDE_CS0_ 16 I_IDE_RST_B IDE_CS1_ 17 RESET_B 18 D3V3_IO 19 IDE_ORD_INV 20 CFG0 21 UART_SPI_SEL 22 XTALI/CLKI 23 XTALO 24 VDDA 25 GNDA 26 REXT 27 RXP 28 RXN 29 VDDA 30 GNDA 31 TXN 32 TXP 33 I_IDE_JUMP0 34 IDE_DASP 35 IDE_JUMP1 36 TEST_CFG 37 UAO_SPI_OUT 38 SPI_En_B 39 SPL_CLK 40 UAI_SPI_IN 41 D1V8_CO 42 DVSS 43 I2C_SDA 44 D3V3_IO 45 I2C_SCLK 46 IDE_PDIAG 47 IDE_CS1_B IDE_RESET_ 48 IDE_CS0_B IDE_DD[7] 49 IDE_DA2 IDE_DD[8] 50 IDE_DA0 IDE_DD[6] 51 IDE_DA1 IDE_DD[9] http://www.golon.net E-mail:[email protected] 7 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A IDE_ORD_INV = 0 IDE_ORD_INV = 1 Pin Name Pin Name Pin# 52 IDE_CSEL IDE_DD[5] 53 IDE_INTRQ IDE_DD[10] 54 IDE_DMACK_B IDE_DD[4] 55 IDE_IORDY 56 D3V3_IO 57 DVSS 58 IDE_DIOR_B IDE_DD[11] 59 IDE_DIOW_B IDE_DD[3] 60 IDE_DMARQ IDE_DD[12] 61 IDE_DD[15] IDE_DD[2] 62 IDE_DD[0] IDE_DD[13] 63 IDE_DD[14] IDE_DD[1] 64 IDE_DD[1] IDE_DD[14] http://www.golon.net E-mail:[email protected] 8 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A IDE_DA2/DD8 IDE_DA0/DD6 IDE_DA1/DD9 IDE_CSEL/DD5 IDE_INTRQ/DD10 IDE_DMACK_B/DD4 IDE_IORDY D3V3_IO DVSS IDE_DIOR_B/DD11 IDE_DIOW_B/DD3 IDE_DMARQ/DD12 IDE_DD15/DD2 IDE_DD0/DD13 IDE_DD14/DD1 IDE_DD1/DD14 SPIF223A TQFP-64 pins TXP TXN GNDA VDDA RXN RXP REXT GNDA VDDA XTALO XTALI/CLKI UART_SPI_SEL CFG0 IDE_ORD_INV D3V3_IO RESET_B 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 IDE_DD13/DD0 IDE_DD2/DD15 IDE_DD12/DRQ D3V3_IO IDE_DD3/DIOW# IDE_DD11/DIOR# IDE_DD4/DMAK# DVSS DIV8_CO IDE_DD10/IRQ IDE_DD5/CEL IDE_DD9/DA1 IDE_DD6/DA0 IDE_DD8/DA2 IDE_DD7/CS0# IDE_RST_B/CS1# 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 IDE_CS0_B/DD7 IDE_CS1_B/RST# IDE_PDIAG I2C_SCL D3V3_IO I2C_SDA DVSS D1V8_CO UAI/SPI_IN SPI_CLK SPI_EN_B UAO/SPI_OUT TEST_CFG IDE_JUMP1 IDE_DASP IDE_JUMP0 U1 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 5.4. SPIF223A Pin Diagram 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 TQFP_64 QFP64-0.5-SKT-A http://www.golon.net E-mail:[email protected] 9 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 6.ELECTRONICAL SPECIFICATION 6.1. Power Requirement Table 6-1: Total Power Dissipation Symbol Parameter Limits Condition Unit Min. Typ. Max. IIO Absolute digital I/O pad power supply 3.3v 0 5.0 - mA Ianalog Absolute digital power supply and PHY 1.8v 60 90 - mA 6.2. Absolute Maximum Ratings Table 6-2: Absolute Maximum Ratings Symbol VIO Parameter Condition Absolute digital I/O pad power supply voltage VCORE Absolute digital power supply VASATA Absolute analog power supply voltage Limits Rating for PHY Unit Min. Typ. Max. 3.0 3.3 3.6 V 1.62 1.8 1.98 V 1.62 1.8 1.98 V VI Absolute input voltage 3.0 3.3 3.6 V TSTR Absolute storage temperature -40 25 150 ℃ 6.3. Recommended/Typical Operating Conditions Table 6-3: Recommended/Typical Operating Conditions Symbol Parameter Limits Condition Unit Min. Typ. Max. VCORE Operating digital power supply voltage 1.62 1.8 1.98 V VIO Operating digital I/O pad supply voltage 3.0 3.3 3.6 V 1.62 1.8 1.98 V 3.0 3.3 3.6 V 0 25 70 ℃ VASATA Operating analog power supply voltage for SATA PHY VI Operating Input signal voltage TOPE Operating temperature http://www.golon.net E-mail:[email protected] 10 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 6.4. DC Characteristics Table 6-4 DC Characteristics Symbol Parameter Limits Condition Unit Min. Typ. Max. VIL Input low voltage -0.3 - 0.8 V VIH Input high voltage 2.0 - VDDPST+0.3 V VT Threshold point 1.45 1.59 1.77 V Schmitt trig. Low to High threshold point 1.47 1.50 1.50 V Schmitt trig. high to low threshold point 0.90 0.94 0.96 V VT VT + - II Input leakage current VI=5.5V or 0V - - ± 10 µA IOZ Tri-state output leakage current VO=5.5V or 0V - - ± 10 µA RPU Pull-up resistor 46 70 114 KΩ RPD Pull-down resistor 30 58 129 KΩ VOL Output low voltage IOL (min) - - 0.4 V VOH Output high voltage IOH (min) 2.4 - - V IOL Low level output current VOL=0.4V 4mA 4.5 6.6 8.3 mA VOL=0.4V 8mA 8.9 13.2 16.7 mA VOL=2.4V 8mA 12.3 24.8 40.5 mA VOL=2.4V 12mA 18.5 37.1 60.8 mA IOH High level output current 6.5. SPIF223A UART and SPI Interface Select: SPIF223A have supported 2 IO interface: UART and SPI. Then, it could be configured by pin21 (UART_SPI_Sel) UART_SPI_Sel : 0 Using UART interface. UART_SPI_Sel : 1 Using SPI interface. Mode IDE_JUMP0 IDE_JUMP1 Master 0 0 Slave 1 0 Cable Select 1 1 6.6. SPIF223A Device Mode or Host : 6.8. SPIF223A Serial ATA bus Tri-state Feature: SPIF223A have supported both dirction : SerialATA to ATA host SPIF223A have supported Serial ATA bus Tri-state feature under bridge and ATA to SerialAT host bridge. Then, we could use pin20 UART_SPI_SEL as low. It could help to design a combo interface (H_D_Sel). or multi-interface product. H_D_Sel : 0 Serial ATA device to ATA host mode (Connecting to ATA HDD).. H_D_Sel : 1 ATA device to Serial SPI_CLK : Low Serial ATA bus Hi-Z. SPI_CLK : High Serial ATA bus normal feature. ATA host mode. 6.9. SPIF223A ATA bus Tri-state Feature: (Connecting to Serial ATA HDD). SPIF223A have supported ATA bus tri-state by pin 38 (SPI_EN). If 6.7. SPIF223A ATA Device Mode Select: SPI_EN# When SPIF223A have been choice to H_D_Sel as 1, it will use as SPI_EN# is high, SPIF223A will go into normal function to accept ATA device mode. ATA bus access. For ATA device, SPIF223A could support master, slave and Cable select. is low, SPIF223A will enable ATA bus Tri-state. (For this mode, UART_SPI_Sel must be low.) SPI_EN# : Low It could be configured by : SPI_EN#: High http://www.golon.net E-mail:[email protected] 11 If ATA bus Tri-State ATA bus normal feature. Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 7.COMMAND LIST The SPIF223A ATA to Serial ATA Controller decodes ATA LBA extended commands. Certain obsolesced commands are commands in hardware. The commands supported include also supported. The supported commands are listed below: ATA/ATAPI-5 and ATA/ATAPI-6 commands, including the 48-bit 7.1. ATA Command List: Table 7-1 ATA Standard Commands http://www.golon.net E-mail:[email protected] 12 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A http://www.golon.net E-mail:[email protected] 13 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A http://www.golon.net E-mail:[email protected] 14 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 7.2. ATAPI Command List: http://www.golon.net E-mail:[email protected] 15 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 3 3 About ATAPI command, SPIF223A will not support 16-byte SCSI command if ATAPI device don’t indicate 16-byte packet support on Identify packet device information. http://www.golon.net E-mail:[email protected] 16 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 8.PACKAGE/PAD LOCATIONS 8.1. Package Information 8.1.1. 64 pin TQFP http://www.golon.net E-mail:[email protected] 17 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A Fig 8-1: SPIF223A in TQFP-64 package ◎E-Pad dimension could be changed without notice. http://www.golon.net E-mail:[email protected] 18 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 8.2. Ordering Information Product Number Package Type SPIF223A - HF021 Green Package form – TQFP 64* 8.3. Storage Condition and Period for Package Package Moisture sensitivity level Max. Reflow temperature Floor life storage condition Dry pack TQFP LEVEL 3 255 +5/-0℃ 168Hrs @ ≦30℃/ 60% R.H. Yes Note1: Please refer to IPC/JEDEC standard J-STD-020A and EIA JEDEC stand JFSD22-A112 Note2: or refer to the “CAUTION Note” on dry pack bag. 8.4. Recommended SMT Temperature Profile This “Recommended” temperature profile is a rough guideline for PPF(Pre-Plated Frame) product with 63/37 solder paste, we SMT process reference. Most of SUNPLUS leadframe base recommend 240℃~245℃ for peak temperature. product choice Matte Tin and Sn/Bi for plating recipe. For http://www.golon.net E-mail:[email protected] 19 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 9.DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or regarding the freedom of the described chip(s) from patent infringement. MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. prices at any time without notice. FURTHERMORE, SUNPLUS MAKES NO WARRANTY OF SUNPLUS reserves the right to halt production or alter the specifications and Accordingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SUNPLUS for such applications. Please note that application circuits illustrated in this document are for reference purposes only. http://www.golon.net E-mail:[email protected] 20 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2 SPIF223A 10. REVISION HISTORY Date Revision # MAY 29, 2006 1.2 APR. 25, 2006 SEP. 08, 2005 1.1 1.0 Description 1.Update application into datasheet . (UART/SPI, ATA_bus Tri-State, SerialATA Hi_Z) Page 3-6 2.Update AC timing 10-11 3.Add command list for ATA command and Packet command. 12-16 1.Update application into datasheet . (UART/SPI, ATA_bus Tri-State, SerialATA Hi_Z) 3-6 2.Update AC timing 10-11 3.Add command list for ATA command and Packet command. 12-16 4.Update pin assignment, 18 5.Add ATA interface reverse 5.3 section. 6-8 Original 16 http://www.golon.net E-mail:[email protected] 21 Mr Wu 13798432566 MAY 29, 2006 Version: 1.2