AD549 | 超低输入偏置电流运算放大器 | 军用和航空产品 | 其它产品 | 亚德诺半导体 English | 日本語 | Руccкий 购买 | 查看购物车 | 样片 | 办事处与代理商 | 质量声明 欢迎用户 | 登录 検索 输入关键字或产品型号 参数搜索 交互式搜索 联系ADI专家 打印 | 通过电子邮件发送本页 | 保存到myAnalog 主页 其它产品 军用和航空产品 AD549 AD549: 超低输入偏置电流运算放大器 产品状态 量产 数据手册 AD549*是一款单芯片静电计运算放大器，具有极低的输入偏置电流。输入失调电压 和输入失调电压漂移经过激光校准，精度极高。该器件运用Analog Devices, Inc（简称ADI）独家开发的“Topgate”JFET技术，实现了超低输入电流。借助这种 技术，可以制造与标准结隔离式双极性工艺兼容的极低输入电流JFET。 自举输入级 下载 英文产品数据手册 Rev H, 03/2008 (pdf 1220kB) （关于数据手册） 提供10 15 Ω共模阻抗，从而确保输入电流实质上独立于共模电压。 AD549适合要求极低输入电流和低输入失调电压的应用。它可以作为出色的前置放 大器用于各种电流输出传感器，例如光电二极管、光电倍增管或氧气传感器等，也 可以用作精密积分器或低下垂采样保持器。AD549与标准FET和静电计运算放大器 引脚兼容，因此只需花费很少的额外成本，就可以让现有系统实现性能升级。 AD549采用TO-99密封封装。外壳与引 ...更多 技术资料 工具、软件和仿真模型 质量和可靠性 无铅（pb)产品 样片和购买 | 封装 AD549连接图 特性 超低输入偏置电流 60 fA（最大 值，AD549L） 低失调漂移 5 μV/°C （最大 值，AD549K） 20 μV/°C （最大 值，AD549J） 250 fA（最大 值，AD549J） 在整个共模电压范围内保证超低 输入偏置电流 低失调电压 0.25 mV（最大 值，AD549K） 低功耗 电源电流：700 μA（最大 值） 低输入电压噪声： 4 μV（峰峰值，0.1 Hz至10 Hz） 1.00 mV（最大 值，AD549J） 提供符合MIL-STD-883B标准的器 件 原理图符号和PCB封装 放大 样片和购买 | 封装 打印 AD549 型号选项 产品型号 产品状态 封装 引脚 温度范围 AD549JH 量产 AD549JHZ AD549KH 报价* (100-499) 8 ld Header 8 商业 $ 15.78 量产 8 ld Header 8 商业 量产 8 ld Header 8 商业 报价* (1000 pcs.) RoHS? 查看PCN/PDN 样片 $ 14.98 N 材料信息 - 联络ADI $ 15.05 $ 14.30 Y 材料信息 - 联络ADI $ 22.19 $ 21.07 N 材料信息 - 联络ADI http://www.analog.com/zh/other-products/militaryaerospace/ad549/products/product.html[2010-12-15 8:46:49] AD549 | 超低输入偏置电流运算放大器 | 军用和航空产品 | 其它产品 | 亚德诺半导体 AD549KHZ 量产 8 ld Header 8 商业 $ 21.02 $ 19.97 Y 材料信息 - 联络ADI AD549LH 量产 8 ld Header 8 商业 $ 27.21 $ 25.86 N 材料信息 - 联络ADI AD549LHZ 量产 8 ld Header 8 商业 $ 25.97 $ 24.68 Y 材料信息 - 联络ADI AD549SH/883B 量产 8 ld Header 8 军用 $ 68.27 $ 64.86 N 材料信息 - 联络ADI 回到顶部 *这里所列出的美国报价单仅供预算参考，指美元报价（规定订量的每片美元，美国离岸价），如有修改不再另行通知。由于地区关税、商业税、 汇率及手续费原因，国际报价可能不同。对于特殊批量报价，请与您当地的ADI公司办事处或代理商联络。对于评估板和套件的报价是指一个单位 价格。 **当产品状态为”这款产品仍在量产中,但不推荐用于新设计”时,请选择其它产品用于新设计。 浏览代理商名单 职业 | 投资信息 | 关于ADI | 联络ADI | 分类索引（A-Z） | 术语表 | 保护隐私权和安全保密 | 使用条款 | 网站地图 | © 1995 - 2010 Analog Devices, Inc. All Rights Reserved 沪ICP备09046653号 http://www.analog.com/zh/other-products/militaryaerospace/ad549/products/product.html[2010-12-15 8:46:49] Ultralow Input Bias Current Operational Amplifier AD549 CONNECTION DIAGRAM FEATURES APPLICATIONS Electrometer amplifiers Photodiode preamp pH electrode buffer Vacuum ion gauge measurement PRODUCT DESCRIPTION The AD5491 is a monolithic electrometer operational amplifier with very low input bias current. Input offset voltage and input offset voltage drift are laser trimmed for precision performance. The part’s ultralow input current is achieved with Topgate JFET technology, a process development exclusive to Analog Devices, Inc. This technology allows fabrication of extremely low input current JFETs compatible with a standard junction isolated bipolar process. The 1015 Ω common-mode impedance, which results from the bootstrapped input stage, ensures that the input current is essentially independent of common-mode voltage. The AD549 is suited for applications that require very low input current and low input offset voltage. It excels as a preamp for a wide variety of current output transducers, such as photodiodes, photomultiplier tubes, or oxygen sensors. The AD549 can also be used as a precision integrator or low droop sample and hold. The AD549 is pin compatible with standard FET and electrometer op amps, allowing designers to upgrade the performance of present systems at little additional cost. GUARD PIN, CONNECTED TO CASE NC OFFSET NULL INVERTING INPUT V+ 8 1 AD549 7 2 6 5 3 NONINVERTING INPUT OUTPUT 4 OFFSET NULL V– 10kΩ 1 5 4 VOS TRIM NC = NO CONNECTION –15V 00511-001 Ultralow bias current 60 fA max (AD549L) 250 fA max (AD549J) Input bias current guaranteed over common mode voltage range Low offset voltage 0.25 mV max (AD549K) 1.00 mV max (AD549J) Low offset drift 5 µV/°C max (AD549K) 20 µV/°C max (AD549J) Low power 700 µA max supply current Low input voltage noise 4 µV p-p 0.1 Hz to 10 Hz MIL-STD-883B parts available Figure 1. The AD549 is available in a TO-99 hermetic package. The case is connected to Pin 8 so that the metal case can be independently connected to a point at the same potential as the input terminals, minimizing stray leakage to the case. The AD549 is available in four performance grades. The J, K, and L versions are rated over the commercial temperature range of 0°C to +70°C. The S grade is specified over the military temperature range of −55°C to +125°C, and is available processed to MIL-STD-883B, Rev C. Extended reliability plus screening is also available. Plus screening includes 168-hour burn-in, as well as other environmental and physical tests derived from MIL-STD-883B, Rev C. PRODUCT HIGHLIGHTS 1. The AD549’s input currents are specified, 100% tested, and guaranteed after the device is warmed up. Input current is guaranteed over the entire common-mode input voltage range. 2. The AD549’s input offset voltage and drift are laser trimmed to 0.25 mV and 5 µV/°C (AD549K), and 1 mV and 20 µV/°C (AD549J). 3. A maximum quiescent supply current of 700 µA minimizes heating effects on input current and offset voltage. 4. AC specifications include 1 MHz unity gain bandwidth and 3 V/µs slew rate. Settling time for a 10 V input step is 5 µs to 0.01%. 1 Protected by Patent No. 4,639,683. Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. AD549 TABLE OF CONTENTS Specifications..................................................................................... 3 Common-Mode Input Voltage Overload................................ 12 Absolute Maximum Ratings............................................................ 5 Differential Input Voltage Overload ........................................ 13 ESD Caution.................................................................................. 5 Input Protection ......................................................................... 13 Typical Performance Characteristics ............................................. 6 Sample and Difference Circuit to Measure Electrometer Leakage Currents........................................................................ 13 Functional Description .................................................................. 10 Minimizing Input Current ........................................................ 10 Circuit Board Notes ................................................................... 10 Offset Nulling.............................................................................. 11 AC Response with High Value Source and Feedback Resistance .................................................................................... 12 Photodiode Interface ................................................................. 14 Temperature Compensated pH Probe Amplifier................... 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 18 REVISION HISTORY 5/04—Data Sheet Changed from Rev. C to Rev. D Updated Format..............................................................Universal Changes to Features...................................................................... 1 Updated Outline Dimensions ................................................... 18 Added Ordering Guide .............................................................. 18 10/02—Data Sheet Changed from Rev. B to Rev. C. Deleted PRODUCT HIGHLIGHTS #5 ..........................................1 Edits to SPECIFICATIONS..............................................................3 Deleted METALLIZATION PHOTOGRAPH ..............................3 Updated OUTLINE DIMENSIONS .............................................13 7/02—Data Sheet Changed from Rev. A to Rev. B. Edits to SPECIFICATIONS..............................................................2 Rev. D | Page 2 of 20 AD549 SPECIFICATIONS @ 25°C and VS = ±15 V dc, unless otherwise noted. All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. Table 1. Parameter INPUT BIAS CURRENT1 Either Input, VCM = 0 V Either Input, VCM = ±10 V Either Input at TMAX, VCM = 0 V Offset Current Offset Current at TMAX INPUT OFFSET VOLTAGE2 Initial Offset Offset at TMAX vs. Temperature vs. Supply vs. Supply, TMIN to TMAX Long-Term Offset Stability INPUT VOLTAGE NOISE f = 0.1 Hz to 10 Hz f = 10 Hz Min AD549J Typ Max Min AD549K Typ AD549L Typ Max Min AD549S Typ Max Unit 250 250 75 75 4.2 30 1.3 100 100 40 40 2.8 20 0.85 60 60 75 75 420 30 125 100 100 fA fA pA fA pA 0.5 1.0 1.9 20 100 100 0.15 0.25 0.4 5 32 32 0.3 0.5 0.9 10 32 32 0.3 0.5 2.0 15 32 50 mV mV µV/°C µV/V µV/V µV/month 2 10 10 15 4 90 4 90 f = 100 Hz 60 f = 1 kHz 35 f = 10 kHz INPUT IMPEDANCE Differential VDIFF = ±1 Common Mode VCM = ±10 OPEN-LOOP GAIN VO @ ±10 V, RL = 10 kΩ VO @ ±10 V, RL = 10 kΩ, TMIN to TMAX VO = ±10 V, RL = 2 kΩ VO = ±10 V, RL = 2 kΩ, TMIN to TMAX INPUT VOLTAGE RANGE Differential3 Common-Mode Voltage Common-Mode Rejection Ratio V = +10 V, −10 V TMIN to TMAX OUTPUT CHARACTERISTICS Voltage @ RL = 10 kΩ, TMIN to TMAX Voltage @ RL = 2 kΩ, TMIN to TMAX Short-Circuit Current TMIN to TMAX Load Capacitance Stability G = +1 Min 150 150 11 50 2.2 10 32 32 15 INPUT CURRENT NOISE f = 0.1 Hz to 10 Hz f = 1 kHz Max 5 10 10 15 10 10 32 15 4 90 4 90 60 60 60 µV p-p nV/√Hz nV/√Hz 35 35 35 nV/√Hz 35 35 35 35 nV/√Hz 0.7 0.22 0.5 0.16 0.36 0.11 0.5 0.16 fA rms fA/√Hz 1013||1 1013||1 1013||1 1013||1 Ω||pF 1015||0.8 1015||0.8 1015||0.8 1015||0.8 Ω||pF 6 300 1000 300 1000 300 1000 300 1000 V/mV 300 100 800 250 300 100 800 250 300 100 800 250 300 100 800 250 V/mV V/mV 80 200 80 200 80 200 25 150 V/mV ±20 +10 −10 80 76 −12 −10 15 9 90 80 20 4000 100 90 90 80 +12 +10 35 ±20 +10 −10 −12 −10 15 9 20 90 80 +12 +10 35 4000 Rev. D | Page 3 of 20 ±20 +10 −10 −12 −10 15 9 100 90 20 4000 90 80 +12 +10 35 ±20 +10 −10 −12 −10 15 6 100 90 20 4000 V V dB dB +12 +10 35 V V mA mA pF AD549 Parameter FREQUENCY RESPONSE Unity Gain, Small Signal Full Power Response Slew Rate Settling Time, 0.1% Settling Time, 0.01% Overload Recovery, 50% Overdrive, G = −1 POWER SUPPLY Rated Performance Operating Quiescent Current TEMPERATURE RANGE Operating, Rated Performance Storage PACKAGE OPTION TO-99 (H-08A) Chips Min 0.7 2 AD549J Typ Max 1.0 50 3 4.5 5 Min 0.7 2 0 −65 AD549JH Min 0.7 2 2 ±15 0.60 Max 1.0 50 3 4.5 5 2 ±5 AD549K Typ ±5 +70 +150 0 −65 0.60 Max 1.0 50 3 4.5 5 Min 0.7 2 2 ±15 ±18 0.70 AD549L Typ ±15 ±18 0.70 ±5 +70 +150 0 −65 AD549KH 1 0.60 AD549LH AD549S Typ Max 1.0 50 3 4.5 5 MHz kHz V/µs µs µs 2 µs ±15 ±18 0.70 ±5 +70 +150 −55 −65 Unit 0.60 ±18 0.70 V V mA +125 +150 °C °C AD549SH/883B Bias current specifications are guaranteed after five minutes of operation at TA = 25°C. Bias current increases by a factor of 2.3 for every 10°C rise in temperature. Input offset voltage specifications are guaranteed after five minutes of operation at TA = 25°C. Defined as max continuous voltage between the inputs, such that neither input exceeds ±10 V from ground. 2 3 Rev. D | Page 4 of 20 AD549 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Internal Power Dissipation Input Voltage1 Output Short Circuit Duration Differential Input Voltage Storage Temperature Range (H) Operating Temperature Range AD549J (K, L) AD549S Lead Temperature Range (Soldering, 60 sec) 1 Rating ±18 V 500 mW ±18 V Indefinite +VS and −VS −65°C to +125°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 0°C to +70°C −55°C to +125°C +300°C For supply voltages less than ±18 V, the absolute maximum input voltage is equal to the supply voltage ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. D | Page 5 of 20 AD549 TYPICAL PERFORMANCE CHARACTERISTICS 800 +VIN 10 –VIN 00511-002 5 0 0 5 10 SUPPLY VOLTAGE (V) 15 700 600 500 400 20 0 5 Figure 2. Input Voltage Range vs. Supply Voltage 20 COMMON-MODE REJECTION RATIO (dB) 120 25°C RL = 10kΩ +VOUT 15 –VOUT 10 5 00511-003 OTUPUT VOLTAGE SWING (V) 15 Figure 5. Quiescent Current vs. Supply Voltage 20 0 0 5 10 SUPPLY VOLTAGE (V) 15 110 100 90 80 70 –20 20 Figure 3. Output Voltage Swing vs. Supply Voltage –10 0 10 INPUT COMMON-MODE VOLTAGE (V) 20 Figure 6. CMRR vs. Input Common-Mode Voltage 30 3000 VS = ±15V OPEN-LOOP GAIN (V/mV) 25 20 15 10 1000 300 0 10 100 1k LOAD RESISTANCE (Ω) 10k 00511-007 5 00511-004 OTUPUT VOLTAGE SWING (V p-p) 10 SUPPLY VOLTAGE (±V) 00511-006 INPUT VOLTAGE (V) 15 00511-005 AMPLIFIER QUIESCENT CURRENT (µA) 20 100 0 100k Figure 4. Output Voltage Swing vs. Load Resistance 5 10 SUPPLY VOLTAGE (V) 15 Figure 7. Open-Loop Gain vs. Supply Voltage Rev. D | Page 6 of 20 20 AD549 3000 50 INPUT CURRENT (fA) OPEN-LOOP GAIN (V/mV) 45 1000 300 40 35 30 –25 5 35 65 TEMPERATURE (°C) 95 00511-011 100 –55 00511-008 25 20 125 0 Figure 8. Open-Loop Gain vs. Temperature 20 15 10 00511-009 5 0 1 2 3 4 5 WARMUP TIME (Minutes) 6 120 100 80 60 40 20 10 7 Figure 9. Change in Offset Voltage vs. Warm-Up Time 45 10k INPUT NOISE VOLTAGE (µV p-p) 100k 40 35 30 00511-010 25 –5 0 5 COMMON-MODE VOLTAGE (V) 10k Figure 12. Input Voltage Noise Spectral Density 50 20 –10 100 1k FREQUENCY (Hz) WHENEVER JOHNSON NOISE IS GREATER THAN AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE CONSIDERED NEGLIGIBLE FOR THE APPLICATION 1kHz BANDWIDTH 1k RESISTOR JOHNSON NOISE 100 10 10Hz BANDWIDTH 1 00511-013 0 140 00511-012 NOISE SPECTRAL DENSITY (nV/ Hz) 160 25 INPUT CURRENT (fA) 20 Figure 11. Input Bias Current vs. Supply Voltage 30 ∆IVOSI (µV) 5 10 15 POWER SUPPLY VOLTAGE (V) AMPLIFIER GENERATED NOISE 0.1 100k 10 Figure 10. Input Bias Current vs. Common-Mode Voltage 1M 10M 100M 1G SOURCE RESISTANCE (Ω) Figure 13. Noise vs. Source Resistance Rev. D | Page 7 of 20 10G 100G AD549 120 80 80 100 60 60 40 40 20 20 0 0 –40 10 100 1k 10k 100k FREQUENCY (Hz) –40 10M 1M PSRR (dB) +SUPPLY 60 40 –SUPPLY 20 0 –20 10 Figure 14. Open-Loop Frequency Response 00511-017 –20 80 00511-014 –20 PHASE MARGIN (Degrees) 100 OEPN-LOOP GAIN (dB) 100 100 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 17. PSRR vs. Frequency Response 40 10 30 25 20 15 10 0 10 00511-015 5 100 1k 10k FREQUENCY (Hz) 100k 40 20 0 00511-016 CMRR (dB) 60 10k 100k FREQUENCY (Hz) 1M 10mV 5mV –5 1mV 1 2 3 SETTLING TIME (µs) 4 Figure 18. Output Voltage Swing and Error vs. Settling Time 80 1k 0 0 100 100 5mV 1mV –10 1M Figure 15. Large Signal Frequency Response –20 10 10mV 5 00511-018 OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) 35 10M Figure 16. CMRR vs. Frequency Rev. D | Page 8 of 20 5 AD549 10kΩ +VS +VS 0.1µF 0.1µF 7 AD549 VIN 3 4 0.1µF VIN VOUT 5 RL 10kΩ 10kΩ 2 CL 100pF –VS 00511-019 3 SQUARE WAVE INPUT 7 AD549 SQUARE WAVE INPUT Figure 19. Unity Gain Follower 4 0.1µF 5 RL 10kΩ –VS VOUT CL 100pF 00511-022 2 00511-023 00511-020 Figure 22. Unity Gain Inverter Figure 20. Unity Gain Follower Large Signal Pulse Response 00511-024 00511-021 Figure 23. Unity Gain Inverter Large Signal Pulse Response Figure 21. Unity Gain Follower Small Signal Pulse Response Figure 24. Unity Gain Inverter Small Signal Pulse Response Rev. D | Page 9 of 20 AD549 FUNCTIONAL DESCRIPTION MINIMIZING INPUT CURRENT CIRCUIT BOARD NOTES The AD549 has been optimized for low input current and offset voltage. Careful attention to how the amplifier is used will reduce input currents in actual applications. There are a number of physical phenomena that generate spurious currents, which degrade the accuracy of low current measurements. Figure 27 is a schematic of an I-to-V converter with these parasitic currents modeled. The amplifier operating temperature should be kept as low as possible to minimize input current. Like other JFET input amplifiers, the AD549’s input current is sensitive to chip temperature, rising by a factor of 2.3 for every 10°C. Figure 25 is a plot of AD549’s input current versus its ambient temperature. CF RF 2 AD549 1nA fS 3 8 6 + VOUT – 10pA RP VS 1pA Cp V dCp dV C II' = R + dT V + dT p P 00511-027 100pA Figure 27. Sources of Parasitic Leakage Currents 100fA 1fA –55 00511-025 10fA –25 5 35 65 TEMPERATURE (°C) 95 125 Figure 25. Input Bias Current vs. Ambient Temperature On-chip power dissipation raises the chip operating temperature, causing an increase in input bias current. Due to the AD549’s low quiescent supply current, the chip temperature is less than 3°C higher than its ambient temperature when the (unloaded) amplifier is operating with 15 V supplies. The difference in the input current is negligible. However, heavy output loads can cause a significant increase in chip temperature and a corresponding increase in the input current. Maintaining a minimum load resistance of 10 Ω is recommended. Input current versus additional power dissipation due to output drive current is plotted in Figure 26. 5 4 BASED ON TYPICAL IB = 40fA 3 2 00511-026 NORMALIZED INPUT BIAS CURRENT 6 1 0 25 50 75 100 125 150 175 ADDITIONAL INTERNAL POWER DISSIPATION (mW) 200 Finite resistance from input lines to voltages on the board, modeled by resistor RP, results in parasitic leakage. Insulation resistance of more than 1015 Ω must be maintained between the amplifier’s signal and supply lines in order to capitalize on the AD549’s low input currents. Standard PC board material does not have high enough insulation resistance. Therefore, the AD549’s input leads should be connected to standoffs made of insulating material with adequate volume resistivity (e.g., Teflon). The insulator’s surface must be kept clean in order to preserve surface resistivity. For Teflon, an effective cleaning procedure consists of swabbing the surface with high grade isopropyl alcohol, rinsing with deionized water, and baking the board at 80°C for 10 minutes. In addition to high volume and surface resistivity, other properties are desirable in the insulating material chosen. Resistance to water absorption is important since surface water films drastically reduce surface resistivity. The insulator chosen should also exhibit minimal piezoelectric effects (charge emission due to mechanical stress) and triboelectric effects (charge generated by friction). Charge imbalances generated by these mechanisms can appear as parasitic leakage currents. These effects are modeled by variable capacitor CP in Figure 27. Table 3 lists various insulators and their properties2. Guarding the input lines by completely surrounding them with a metal conductor biased near the input lines’ potential has two major benefits. First, parasitic leakage from the signal line is reduced since the voltage between the input line and the guard is very low. Second, stray capacitance at the input node is 2 Electronic Measurements, pp. 15–17, Keithley Instruments, Inc., Cleveland, Ohio, 1977. Figure 26. Input Bias Current vs. Additional Power Dissipation Rev. D | Page 10 of 20 AD549 minimized. Input capacitance can substantially degrade signal band width and the stability of the I-to-V converter. The case of the AD549 is connected to Pin 8 so that it can be bootstrapped near the input potential. This minimizes pin leakage and input common-mode capacitance due to the case. Guard schemes for inverting and noninverting amplifier topologies are illustrated in Figure 28 and Figure 29. OFFSET NULLING The AD549’s input offset voltage can be nulled by using balance Pins 1 and 5, as shown in Figure 30. Nulling the input offset voltage in this fashion introduces an added input offset voltage drift component of 2.4 µV/°C per millivolt of nulled offset (a maximum additional drift of 0.6 µV/°C for the AD549K, 1.2 µV/°C for the AD549L, and 2.4 µV/°C for the AD549J). CF +VS GUARD RF IN 8 4 10kΩ –VS Figure 28. Inverting Amplifier with Guard Figure 30. Standard Offset Null Circuit The approach in Figure 31 can be used when the amplifier is used as an inverter. This method introduces a small voltage referenced to the power supplies in series with the amplifier’s positive input terminal. The amplifier’s input offset voltage drift with temperature is not affected. However, variation of the power supply voltages causes offset shifts. GUARD 3 AD549 + VS 2 8 6 + VOUT – 6 5 1 3 00511-028 3 AD549 + VOUT – 6 00511-030 AD549 7 2 2 VOUT + RF – RF RI – AD549 + VI Figure 29. Noninverting Amplifier with Guard 3 Other guidelines include keeping the circuit layout as compact as possible and keeping the input lines short. Keeping the assembly rigid and minimizing sources of vibration will reduce triboelectric and piezoelectric effects. All precision, high impedance circuitry requires shielding against interference noise. Low noise coaxial or triaxial cables should be used for remote connections to the input signal lines. 200Ω + VOUT – +VS – 499kΩ 6 499kΩ 100kΩ 0.1µF –VS 00511-031 RI 00511-029 2 Figure 31. Alternate Offset Null Circuit for Inverter Table 3. Insulating Materials and Characteristics Material Teflon® Kel-F® Sapphire Polyethylene Polystyrene Ceramic Glass Epoxy PVC Phenolic Volume Resistivity (V–CM) 1017 − 1018 1017 − 1018 1016 − 1018 1014 − 1018 1012 − 1018 1012 − 1014 1010 − 1017 1010 − 1015 105 − 1012 Minimal Triboelectric Effects W W M M W W W G W G–Good with Regard to Property M–Moderate with Regard to Property W–Weak with Regard to Property Rev. D | Page 11 of 20 Minimal Piezoelectric Effect W M G G M M M M G Resistance to Water Absorption G G G M M W W G W AD549 AC RESPONSE WITH HIGH VALUE SOURCE AND FEEDBACK RESISTANCE 00511-032 00511-034 Source and feedback resistances greater than 100 kΩ magnify the effect of the input capacitances (stray and inherent to the AD549) on the ac behavior of the circuit. The effects of common-mode and differential input capacitances should be taken into account since the circuit’s bandwidth and stability can be adversely affected. In an inverting configuration, the differential input capacitance forms a pole in the circuit’s loop transmission. This can create peaking in the ac response and possible instability. A feedback capacitance can be used to stabilize the circuit. The inverter pulse response with RF and RS equal to 1 MΩ appears in Figure 34. Figure 35 shows the response of the same circuit with a 1 pF feedback capacitance. Typical differential input capacitance for the AD549 is 1 pF. Figure 34. Inverter Pulse Response with 1 MΩ Source and Feedback Resistance 00511-033 00511-035 Figure 32 Follower Pulse Response from 1 MΩ Source Resistance, Case Not Bootstrapped Figure 35. Inverter Pulse Response with 1 MΩ Source and Feedback Resistance, 1pF Feedback Capacitance Figure 33. Follower Pulse Response from 1 MΩ Source Resistance, Case Bootstrapped In a follower, the source resistance and input common-mode capacitance form a pole that limits the bandwidth to ½πRSCS. Bootstrapping the metal case by connecting Pin 8 to the output minimizes capacitance due to the package. Figure 32 and Figure 33 show the follower pulse response from a 1 MΩ source resistance with and without the package connected to the output. Typical common-mode input capacitance for the AD549 is 0.8 pF. COMMON-MODE INPUT VOLTAGE OVERLOAD The rated common-mode input voltage range of the AD549 is from 3 V less than the positive supply voltage to 5 V greater than the negative supply voltage. Exceeding this range degrades the amplifier’s CMRR. Driving the common-mode voltage above the positive supply causes the amplifier’s output to saturate at the upper limit of the output voltage. Recovery time is typically 2 µs after the input has been returned to within the normal operating range. Driving the input common-mode voltage within 1 V of the negative supply causes phase reversal of the output signal. In this case, normal operation is typically resumed within 0.5 µs of the input voltage returning within range. Rev. D | Page 12 of 20 AD549 DIFFERENTIAL INPUT VOLTAGE OVERLOAD A plot of the AD549’s input currents versus differential input voltage (defined as VIN+ − VIN−) appears in Figure 36. The input current at either terminal stays below a few hundred femtoamps until one input terminal is forced higher than 1 V to 1.5 V above the other terminal. Under these conditions, the input current limits at 30 µA. In the corresponding version of this scheme for a follower, shown in Figure 38, RP and the capacitance at the positive input terminal produce a pole in the signal frequency response at a f = ½πRC. Again, the Johnson noise, RP, adds to the amplifier’s input voltage noise. RPROTECT SOURCE 3 100µ IIN– 6 00511-038 AD549 10µ 2 IIN+ 100n Figure 38. Follower with Input Current Limit 10n 1n 100p 10p 00511-036 1p 100f 10f –5 –4 –3 –2 –1 0 1 2 3 4 DIFFERENTIAL INPUT VOLTAGE (V) (VIN+ – VIN–) 5 Figure 39 is a schematic of the AD549 as an inverter with an input voltage clamp. Bootstrapping the clamp diodes at the inverting input minimizes the voltage across the clamps and keeps the leakage due to the diodes low. Low leakage diodes, such as the FD333s, should be used and should be shielded from light to keep photocurrents from being generated. Even with these precautions, the diodes measurably increase input current and capacitance. RF Figure 36. Input Current vs. Differential Input Voltage SOURCE 2 INPUT PROTECTION AD549 The AD549 safely handles any input voltage within the supply voltage range. Subjecting the input terminals to voltages beyond the power supply can destroy the device or cause shifts in input current or offset voltage if the amplifier is not protected. A protection scheme for the amplifier as an inverter is shown in Figure 37. RP is chosen to limit the current through the inverting input to 1 mA for expected transient (less than 1 s) overvoltage conditions, or to 100 µA for a continuous overload. Since RP is inside the feedback loop, and is much lower in value than the amplifier’s input resistance, it does not affect the inverter’s dc gain. However, the Johnson noise of the resistor adds root sum of squares to the amplifier’s input noise. 6 3 PROTECT DIODES 00511-039 INPUT CURRENT (A) 1µ Figure 39. Input Voltage Clamp with Diodes SAMPLE AND DIFFERENCE CIRCUIT TO MEASURE ELECTROMETER LEAKAGE CURRENTS There are a number of methods used to test electrometer leakage currents, including current integration and direct current-to-voltage conversion. Regardless of the method used, board and interconnect cleanliness, proper choice of insulating materials (such as Teflon or Kel-F), correct guarding and shielding techniques, and care in physical layout are essential to making accurate leakage measurements. RF RPROTECT 2 AD549 6 3 Figure 37. Inverter with Input Current Limit 00511-037 SOURCE CF Figure 40 is a schematic of the sample and difference circuit. It uses two AD549 electrometer amplifiers (A and B) as currentto-voltage converters with high value (1010 Ω) sense resistors (RSa and RSb). R1 and R2 provide for an overall circuit sensitivity of 10 fA/mV (10 pA full scale). CC and CF provide noise suppression and loop compensation. CC should be a low leakage polystyrene capacitor. An ultralow leakage Kel-F test socket is used for contacting the device under test. Rigid Teflon coaxial cable is used to make connections to all high impedance nodes. The use of rigid coaxial cable affords immunity to error induced by mechanical vibration and provides an outer conductor for shielding. The entire circuit is enclosed in a grounded metal box. Rev. D | Page 13 of 20 AD549 The test apparatus is calibrated without a device under test present. After power is turned on, a five-minute stabilization period is required. First, VERR1 and VERR2 are measured. These voltages are the errors caused by the offset voltages and leakage currents of the current-to-voltage converters. VERR1 = 10 (VOSA –IBA × RSa) VERR2 = 10 (VOSB –IBB × RSb) CC 20pF CF 0.1µF RSa 1010Ω R2 9.01kΩ PHOTODIODE INTERFACE R1 1kΩ 2 A 6 AD549L 8 CAL/TEST + VERR1/VA – The AD549’s low input current and low input offset voltage make it an excellent choice for very sensitive photodiode preamps (Figure 41). The photodiode develops a signal current, IS, equal to GUARD IS = R × P I (+) VOS + DEVICE UNDER TEST where P is light power incident on the diode’s surface ,in Watts, and R is the photodiode responsivity in Amps/Watt. RF converts the signal current to an output voltage VOUT – CF 0.1µF R2 9.01kΩ I (–) R1 1kΩ VOUT = RF × IS VERR2/VB RF 109Ω 8 3 B 6 AD549L + CF 10pF 2 2 RSb 1010Ω CF 0.1µF 10kΩ AD549 R1 1kΩ 6 + 5 1µF 1 3 R2 9.01kΩ VOUT 4 – 00511-040 CC 20pF –VS Figure 41. Photodiode Preamp Figure 40. Sample and Difference Circuit for Measuring Electrometer Leakage Currents Once measured, these errors are subtracted from the readings taken with a device under test present. Amplifier B closes the feedback loop to the device under testing, in addition to providing the current-to-voltage conversion. The offset error of the device under testing appears as a common-mode signal and does not affect the test measurement. As a result, only the leakage current of the device under testing is measured. DC error sources and an equivalent circuit for a small area (0.2 mm square) photodiode are indicated in Figure 42. RF 109Ω CF 10pF IS RS 109Ω CS 20pF IS – A – VA – VERR1 = 10[RSa × IB(+)] VX – VERR2 = 10[RSb × IB(–)] VOS + + VOUT – Figure 42. Photodiode Preamp DC Error Sources Input current, IB, contributes an output voltage error, VE1, proportional to the feedback resistance VE1 = IB × RF Rev. D | Page 14 of 20 00511-042 – 00511-041 3 Although a series of devices can be tested after only one calibration measurement, calibration should be updated periodically to compensate for any thermal drift of the currentto-voltage converters or changes in the ambient environment. Laboratory results have shown that repeatable measurements within 10 fA can be realized when this apparatus is properly implemented. These results are achieved in part by the design of the circuit, which eliminates relays and other parasitic leakage paths in the high impedance signal lines, and in part by the inherent cancellation of errors through the calibration and measurement procedure. AD549 The error current results in an error voltage (VE2) at the amplifier’s output equal to VE2 = (1 + RF/RS)VOS Given typical values of photodiode shunt resistance (on the order of 109 Ω), RF/RS can easily be greater than one, especially if a large feedback resistance is used. Also, RF/RS increases with temperature, since photodiode shunt resistance typically drops by a factor of 2 for every 10°C rise in temperature. An op amp with low offset voltage and low drift must be used in order to maintain accuracy. The AD549K offers guaranteed maximum 0.25 mV offset voltage and 5 mV/°C drift for very sensitive applications. Photodiode Preamp Noise Noise limits the signal resolution obtainable with the preamp. The output voltage noise divided by the feedback resistance is the minimum current signal that can be detected. This minimum detectable current divided by the responsivity of the photodiode represents the lowest light power that can be detected by the preamp. Noise sources associated with the photodiode, amplifier, and feedback resistance are shown in Figure 43; Figure 44 is the spectral density versus frequency plot of the contribution of each of the noise sources to the output voltage noise (circuit parameters in Figure 42 are assumed). Each noise source’s rms contribution to the total output voltage noise is obtained by integrating the square of its spectral density function over frequency. The rms value of the output voltage noise is the square root of the sum of all contributions. Minimizing the total area under these curves optimizes the preamplifier’s resolution for a given bandwidth. IF RF CF RS CS A IN EN Figure 43. Photodiode Preamp Noise Sources IF AND CS, NO FILTERS IF AND CS, WITH FILTERS AD549 OPEN-LOOP GAIN 1µ 100n EN CONTRIBUTION, NO FILTER EN CONTRIBUTION, WITH FILTER 10n 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 44. Photodiode Preamp Noise Sources' Spectral Density vs. Frequency Log Ratio Amplifier Logarithmic ratio circuits are useful for processing signals with wide dynamic range. The AD549L’s 60 fA maximum input current makes it possible to build a log ratio amplifier with 1% log conformance for input currents ranging from 10 pA to 1 mA, a dynamic range of 160 dB. The log ratio amplifier in Figure 45 provides an output voltage proportional to the log base 10 of the ratio of input currents I1 and I2. Resistors R1 and R2 are provided for voltage inputs. Since NPN devices are used in the feedback loop of the front end amplifiers that provide the log transfer function, the output is valid only for positive input voltages and input currents. The input currents set the collector currents IC1 and IC2 of a matched pair of log transistors, Q1 and Q2, to develop voltages VA and VB: VA, VB = –(kT/q)ln IC/IES 00511-043 IS 10µ 00511-044 I = VOS/RS The photodiode preamp in Figure 41 can detect a signal current of 26 fA rms at a bandwidth of 16 Hz, which, assuming a photodiode responsivity of 0.5 A/W, translates to a 52 fW rms minimum detectable power. The photodiode used has a high source resistance and low junction capacitance. CF sets the signal bandwidth with RF, and also limits the peak in the noise gain that multiplies the op amp’s input voltage noise contribution. A single pole filter at the amplifier’s output limits the op amp’s output voltage noise bandwidth to 26 Hz, comparable to the signal bandwidth. This greatly improves the preamplifier’s signal-to-noise ratio (in this case, by a factor of 3). VOLTAGE NOISE CONTRIBUTIONS NOISE SPECTRAL DENSITY (nV Hz) The op amp’s input voltage offset causes an error current through the photodiode’s shunt resistance, RS where IES is the transistors’ saturation current. The difference of VA and VB is taken by the subtractor section to obtain VC = (kT/q)ln(IC2/IC1) Rev. D | Page 15 of 20 AD549 The very low input current of the AD549 makes this circuit useful over a very wide range of signal currents. The total input current (which determines the low level accuracy of the circuit) is the sum of the amplifier input current, the leakage across the compensating capacitor (negligible if a polystyrene or Teflon capacitor is used), and the collector-to-collector and collector to-base leakages of one side of the dual log transistors. The magnitudes of these last two leakages depend on the amplifier’s input offset voltage, and are typically less than 10 fA with 1 mV offsets. The low level accuracy is limited primarily by the amplifier’s input current, only 60 fA maximum when the AD549L is used. VC is scaled up by the ratio of (R9 + R10)/R8, which is equal to approximately 16 at room temperature, resulting in the output voltage VOUT = 1 × log(IC2/IC1)V R8 is a resistor with a positive 3500 ppm/°C temperature coefficient to provide the necessary temperature compensation. The parallel combination of R15 and R7 is provided to keep the subtractor section’s gain for positive and negative inputs matched over temperature. Frequency compensation is provided by R11, R12, C1, and C2. The bandwidth of the circuit is 300 kHz at input signals greater than 50 µA; bandwidth decreases smoothly with decreasing signal levels. The effects of the emitter resistance of Q1 and Q2 can degrade the circuit’s accuracy at input currents above 100 µA. The networks composed of R13, D1, R16, R14, D2, and R17 compensate for these errors, so that this circuit has less than 1% log conformance error at 1 mA input currents. The correct value for R13 and R14 depends on the type of log transistors used. 49.9 kΩ resistors were chosen for use with LM394 transistors. Smaller resistance values are needed for smaller log transistors. To trim the circuit, set the input currents to 10 µA and trim A3’s offset using the amplifier’s trim potentiometer so the output equals 0. Then set I1 to 1 µA and adjust the output to equal 1 V by trimming R10. Additional offset trims on amplifiers A1 and A2 can be used to increase the voltage input accuracy and dynamic range. FOR EACH AMPLIFIER 4 3 1 A1 10kΩ V1 OFFSET 0.1µF 5 D3 6 AD549 0.1µF –VS PIN 4 Q1, Q2 = LM394 DUAL LOG TRANSISTORS 2 R11 49.9kΩ C1 100pF R15 1kΩ * R1 10kΩ Q1 V1 IN A R3 20kΩ R16 10kΩ R14 49.9kΩ R5 20kΩ R7 15kΩ 3 D1 VOUT A3 AD549 D2 R17 10kΩ R13 49.9kΩ R2 10kΩ V2 IN I2 IN +VS Q2 C2 100pF R4 20kΩ B D4 A2 AD549 6 5 1 4 4 R6 20kΩ * 5 R10 10kΩ 2kΩ OUTPUT OFFSET SCALE FACTOR ADJ R9 R8 14.3kΩ 1kΩ VOUT = 1V × LOG10 2 3 1 2 6 10kΩ V2 OFFSET V2 V1 I2 VOUT = 1V × LOG10 I1 D1, D4 1N4148 DIODES R8, R15 1kΩ + 350 ppm/°C TC RESISTOR *TELLAB QB1 OR PRECISION RESISTOR PT146 ALL OTHER RESISTORS ARE 1% METAL FILM Figure 45. Log Ratio Amplifier Rev. D | Page 16 of 20 00511-045 I1 IN PIN 7 AD549 TEMPERATURE COMPENSATED pH PROBE AMPLIFIER A pH probe can be modeled as a mV-level voltage source with a series source resistance dependent upon the electrode’s composition and configuration. The glass bulb resistance of a typical pH electrode pair falls between 106 Ω and 109 Ω. It is therefore important to select an amplifier with low enough input currents such that the voltage drop produced by the amplifier’s input bias current and the electrode resistance does not become an appreciable percentage of a pH unit. The pH probe output is ideally 0 V at a pH of 7 independent of temperature. The slope of the probe’s transfer function, though predictable, is temperature dependent (−54.2 mV/pH at 0 and −74.04 mV/pH at 100°C). By using an AD590 temperature sensor and an AD535 analog divider, an accurate temperature compensation network can be added to the basic pH probe amplifier. Table 4 shows voltages at various points and illustrates the compensation. The AD549 is set for a noninverting gain of 13.51. The output of the AD590 circuitry (Point C) is equal to 10 V at 100°C, and decreases by 26.8 mV/°C. The output of the AD535 analog divider (Point D) is a temperature compensated output voltage centered at 0 V for a pH of 7, and has a transfer function of –1.00 V/pH unit. The output range spans from −7.00 V (pH = 14) to +7.00 V (pH = 0). The circuit in Figure 46 illustrates the use of the AD549 as a pH probe amplifier. As with other electrometer applications, the use of guarding, shielding, Teflon standoffs, and so on is a must in order to capitalize on the AD549’s low input current. If an AD549L (60 fA max input current) is used, the error contributed by the input current is held below 60 µV for pH electrode source impedances up to 109 Ω Input offset voltage (which can be trimmed) will be below 0.5 mV. +15V 0.1µF 0.1µF pH PROBE OUTPUT 14 (A) 3 7 AD549 10 Z2 11 Z1 1 X1 2 X2 8 0.1µF (C) 12kΩ (D) OUTPUT Y2 7 Y1 6 5 1kΩ SCALE FACTOR ADJUST 0.1µF +15V AD590 IN STAINLESS STEEL PROBE OR AC2626 OUT 12 4 2 1kΩ AD535 (B) 6 –15V + – 00511-046 26.6kΩ Figure 46. Temperature Compensated pH Amplified Table 4. Illustration of Temperature Compensation Point Probe Temperature 0 25°C 37°C 60°C 100°C A (Probe Output) 54.20 mV 59.16 mV 61.54 mV 66.10 mV 74.04 mV B (A 3 13.51) 0.732 V 0.799 V 0.831 V 0.893 V 1.000 V Rev. D | Page 17 of 20 C (590 Output) 7.32 V 7.99 V 8.31 V 8.93 V 10.00 V D (10 B/C) 1.00 V 1.00 V 1.00 V 1.00 V 1.00 V AD549 OUTLINE DIMENSIONS REFERENCE PLANE 0.1850 (4.70) 0.1650 (4.19) 0.5000 (12.70) MIN 0.2500 (6.35) MIN 0.1000 (2.54) BSC 0.0500 (1.27) MAX 0.1600 (4.06) 0.1400 (3.56) 0.3350 (8.51) 0.3050 (7.75) 0.3700 (9.40) 0.3350 (8.51) 5 6 4 0.2000 (5.08) BSC 3 7 2 0.0400 (1.02) MAX 0.1000 (2.54) BSC 0.0190 (0.48) 0.0160 (0.41) 0.0400 (1.02) 0.0100 (0.25) 0.0210 (0.53) 0.0160 (0.41) 0.0450 (1.14) 0.0270 (0.69) 8 1 0.0340 (0.86) 0.0280 (0.71) 45° BSC BASE & SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-002AK CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 47. 8-Lead Metal Can [TO-99] (H-08) Dimensions shown in inches and (millimeters) ORDERING GUIDE Model AD549JH AD549KH AD549LH AD549SH/883B Temperature Range 0°C to +70°C 0°C to +70°C 0°C to +70°C –55°C to +125°C Package Description 8-Lead Metal Can (TO-99) 8-Lead Metal Can (TO-99) 8-Lead Metal Can (TO-99) 8-Lead Metal Can (TO-99) Rev. D | Page 18 of 20 Package Option H-08 H-08 H-08 H-08 AD549 NOTES Rev. D | Page 19 of 20 AD549 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00511–0–5/04(D) Rev. D | Page 20 of 20 极低偏置电流运算放大器 AD549 1 概述 AD549 是具有极低输入偏置电流的单片电路静电计型运算放大器。为达到高精度的目 的，输入偏置电压和输入偏置电压漂移均通过激光调节。这种极低输入电流性能由 ADI 公 司专有的 topgate 工艺技术完成。该技术可以制造与具有极低输入电流的 JFET 并与双极性 电路隔离的集成运放。输入级具有 1015Ω 的共模阻抗，其输入电流与共模电压无关。 AD549 适用于低输入电流和低输入偏置电压的场合。它特别适合用作各种电流输出的 传感器，如光电二极管、光电倍增管以及氧气传感器等的前置放大器。该产品也可用作精密 积分器或低衰减采样保持器。AD549 的封装与标准 FET 和静电计运算放大器兼容，因此用 户花少量成本即可对系统升级，提高已有系统的性能。 AD549 有 TO-99 密封封装。金属外壳与 8 管脚相连，使得金属外壳与同样电压的输入 终端独立连接，达到降低外壳泄漏的目的。 AD549 具有四种性能等级。其中 J、K 和 L 型号的温度范围是 0℃到 70℃。S 型号专用 于军事，其温度范围：-55℃到 125℃。 AD549 的输入电流在整个共模输入电压范围内都得到保证，其输入失调电压和漂移由 激光分别调节到 0.25mV 和 5μV/℃(AD549K)；1mV 和 20μV/℃(AD549J)。700μA 的最 大静态电流使输入电流和偏置电压的热效应降到最低。模拟性能包括 1MHz 的均匀增益带 宽和 3V/μs 的压摆率。当输入为 10V 时，建立时间是 5μs 到 0.01%。 2 AD549 的引脚及特性参数 图一所示是 AD549 的引脚图，表一所示是其特性参数。 图一 AD549 引脚图 表一 参数 AD549 的主要特性 AD549J AD549K AD549L AD549S 最小 典型 最大 最小 典型 最大 最小 典型 最大 最小 典型 最大 共模输入，VCM=0V 150 250 75 100 40 60 75 100 共模输入，VCM=±10V 150 250 75 100 40 60 75 100 单位 输入偏置电流 fA fA 共模输入 TMAX，VCM=0V 11 4.2 2.8 420 pA 失调电流 50 30 20 30 fA TMAX 处失调电流 2.2 1.3 0.85 125 pA 输入失调电压 失调 0.5 0.15 1.0 TMAX 处失调电压 0.3 0.25 0.9 0.4 1.9 0.3 0.5 0.5 mV 2.0 mV 受温度的影响 10 20 2 5 5 10 10 15 μV/℃ 受电源的影响 32 100 10 32 10 32 10 32 μV/V TMIN~TMAX,受电源影响 32 100 10 32 10 32 32 50 μV/V 长时间失调稳定性 15 15 4 4 f=10Hz 90 f=100Hz f=1kHz f=10kHz 15 μV/month 4 4 μVp-p 90 90 90 nV/ 60 60 60 60 nV/ 35 35 35 35 nV/ 35 35 35 35 nV/ 0.7 0.5 0.36 0.5 fA rms 0.22 0.16 0.11 0.16 fA/ 1013‖1 1013‖1 1013‖1 15 输入电压噪声 f=0.1Hz ~10Hz 6 输入电流噪声 f=0.1Hz ~10Hz f=10kHz 输入阻抗 1013‖1 差模 VDFF =±1 15 共模 VCM =±10 15 10 ‖0.8 15 10 ‖0.8 Ω‖pF 15 10 ‖0.8 10 ‖0.8 Ω‖pF 开环增益 300 1000 300 1000 300 1000 300 1000 V/mV TMIN/TMAX 300 800 300 800 300 800 300 800 V/mV V0=±10V,RL=10kΩ 100 250 100 250 100 250 100 250 V/mV 80 200 80 200 80 200 25 150 V/mV V0@±10V,RL=10kΩ V0@±10V,RL=10kΩ, V0=±10V,RL=10kΩ, TMIN/TMAX 输入电压范围 差模电压 共模电压 共 -10 模 抑 制 +10 ±20 ±20 ±20 -10 +10 -10 +10 -10 ±20 V +10 V 比 V=+10V,-10V 80 90 90 100 90 100 90 100 dB TMIN/TMAX 76 80 80 90 80 90 80 90 dB 输出性能 电 压 @RL=10kΩ ， -12 TMIN/TMAX 电 压 @RL=2kΩ +12 -12 +10 -10 +12 -12 +10 -10 12 -12 +10 -10 +12 V ， TMIN/TMAX -10 短路电流 15 TMIN/TMAX 9 负载电容稳定性 G=+1 20 35 15 20 35 15 35 15 4000 4000 +10 20 35 V mA mA 6 9 9 4000 20 4000 pF 1.0 MHz 50 kHz 频率响应 单位增益，小信号 全功率响应 0.7 1.0 50 0.7 1.0 50 0.7 1.0 50 0.7 压摆率 2 2 3 2 3 2 3 3 V/μs 建立时间，0.1% 4.5 4.5 4.5 4.5 μs 建立时间，0.01% 5 5 5 5 μs 过载恢复，50%，G=-1 2 2 2 2 μs ±15 ±15 ±15 ±15 V 电源供给 额定性能 工作 ±5 静态电流 ±18 0.60 ±5 0.70 ±18 0.60 ±5 0.70 ±18 0.60 ±5 0 .70 0.60 ±18 V 0.70 mA 温度范围 工作，额定性能 0 存储 -65 +70 +150 0 +70 0 +70 -55 +70 ℃ -65 +150 -65 +150 -65 +150 ℃ 封装选择 TO-99(H-08A)芯片 3 AD549JH AD549KH AD549LH AD549SH/883B AD549 的工作原理 3.1 最小化输入电流 AD549 具有很小的输入电流和失调电压。在实际应用中应谨慎考虑如何使用放大器可以 减小输入电流。 为减小输入电流，该放大器的工作温度应尽可能低。像其他 JFET 输入放大器一样， AD549 的输入电流对芯片温度很敏感，上升斜率因子为每 10℃的 2.3。图二所示为 AS549 不同环境温度时的输入电流。 图二 环境温度对输入偏置电流的影响 芯片电源损耗使工作温度上升，从而导致输入偏置电流上升。由于 AD549 具有极低的 静态供应电流，当放大器工作在 15V 时，芯片温度不会比环境温度高出 3℃。这种情况下输 入电流的差异可以忽略。但大输出负载可引起芯片温度和输入电流的显著增加，因此建议最 小负载阻抗不小于 10Ω。 3.2 电路板设计注意事项 很多原因会产生伪电流，从而降低电流测量的精度。 在放大器信号和电源线之间应有大于 1015Ω 的绝缘阻抗，以获得低输入电流。然而标 准的 PCB 材料不具备如此高的绝缘阻抗，因此输入线应与具有足够大电阻系数的绝缘材料相 连。为保持其电阻系数，绝缘体的表面应保持干净。 选择绝缘材料时，除了大容量和高表面电阻系数，还要考虑其他性能。由于表面水膜层 会大大减小绝缘性，防止吸水也很重要。同样需要考虑的因素还有压电效应（机械压力产生 电子激发）和静电效应（摩擦产生电子）。由于这些机理产生的电子不平衡将表现为寄生泄 漏电流。 用通过输入电压偏压的金属导体包围输入线有两个好处：一是由于金属导体和输入线之 间的电压很小，因此信号线的寄生漏电减小。二是输入点的分布电容减小。输入电容可显著 地降低信号带宽和电流/电压转换器的稳定性。使 8 管脚封装处于 AD549 输入电压附近，从 而减小封装泄漏和输入共模电容。图三、图四为反向放大器和同相放大器的保护电路图。 图三 反向放大器的保护电路图 图四 同向放大器的保护电路图 其他保护措施还包括：使电线布局紧凑，减小输入线的长度。所有精密的高阻抗电路都 需要屏蔽干扰噪声。使用低噪声共轴和三轴电缆以尽量隔离输入信号线。 3.3 失调电压的补偿 AD549 的输入失调电压可通过平衡管脚 1 和 5 来调整，见图五。用这种方式补偿输入失 调电压将引入一个附加的输入失调电压漂移，大小为每毫伏 2.4μV/℃。AD549K、AD549L 和 AD549J 的最大附加漂移分别是 0.6μV/℃、1.2μV/℃和 2.4μV/℃。 图六所示方法可用于放大器用作反向器的场合。这种方法在放大器负输入终端和电源间 引入一个参考电压。放大器的输入失调电压漂移不受影响。但电源电压的波动将引起失调电 压漂移。 图五 标准失调电压补偿电路 图六 用作反向器时的失调电压补偿电路 3.4 高内阻信号源和高反馈阻抗的交流响应 电源和反馈阻抗大于 100kΩ 时，输入电容的影响放大了电路的交流特性。由于电路带 宽和稳定性互相影响，应考虑共模和差分输入电容产生的影响。 在随后级，电源阻抗和单极输入共模电容把带宽限制在½πRSCS。把器件的金属外壳和管 脚 8 与输出相连可减小电容的影响。AD549 共模输入电容的典型值是 0.8pF。 在反相放大器的结构中，差分输入电容形成环路传递函数的一极，并导致响应的过冲和 不稳定。可用一个反馈电容稳定电路。AD549 差模输入电容的典型值是 1pF。 3.5 共模输入电压过载 额定共模输入电压范围是小于正电源电压 3V 到大于负电源电压 5V。超过这个范围将降 低放大器的共模抑制比。共模电压高于正电源电压将导致放大器输出级饱和。当输入恢复到 正常值范围内后，典型的恢复时间为 2μs。输入共模电压在负电源电压 1V 内将导致输出信 号相位翻转。这种情况下，在输入电压回到正常值范围后 0.5μs 内运放恢复正常工作。 3.6 差模输入电压过载 图七所示为不同差模输入电压下 AD549 的的输入电流。差模电压在 1V 到 1.5V 内时，两 端输入电流在几百 fA 内。超出此范围，输入电流在 30μA 内。 图七 不同差模输入电压下的输入电流 3.7 输入保护 AD549 可以轻易处理供给电压范围内的任何输入电压。在没有保护的情况下，输入端电 压超过电源供给电压会损坏器件，造成输入电流漂移或偏置电压漂移。 图八所示是放大器用作反相器时的保护电路图。RP 将瞬时过电压产生的电流限制在 1mA 以内（持续时间小于 1 秒），或连续电流小于 100μA。由于 RP 处在反馈电路中，并且远小于 放大器输入阻抗值，因此不会影响反相器的直流增益。但电阻器的热噪声增加了放大器的输 入噪声。 在 AD549 用作跟随器的保护电路中（图九） ，正输入端的和电容引入½πRC 的极点。同 样，RP 的热噪声增大了放大器的输入电压噪声。 如图十所示为 AD549 用作反相器并具有输入钳位电压的电路图。钳位二极管与反相输入 端相连，减小超过钳位的电压值。由于二极管电流低，还可减小漏电流。应使用低渗漏二极 管如 FD333 并防止照射以防止光电流产生。即使采取这些措施，二极管的输入电流和电容仍 会有所增加。 图八 有输入电流限制的反相放大器 图十 图九 有输入电流限制的跟随器 具有输入钳位的反相放大器 4 应用电路 4.1 漏电流的采样和测量 有很多方法，如电流积分和直接将电流转换为电压，可测量微弱的漏电流。无论哪种方 法，为准确测量都应考虑电路板和连线的整洁、绝缘材料的选择、保护技术和布线排版。 图十一是采样和差动电路。电路包括两个 AD549 静电计放大器用作电流电压转换器，和 10 高阻值（10 Ω）的传感电阻（RSa 和 RSb） 。R1 和 R2 提高了电路的总灵敏度，其值为 10fA/mV （满量程 10pA）。CC 和 CF 用作抑制噪声和闭环补偿。CC 应是一个低渗漏的聚苯乙烯电容。测 量时使用极低渗漏的 Kel-F 测试插座连接器件。使用硬性 Teflon 共轴电缆达到高阻抗的目 的，还可以避免机械振动引起的误差，为外部导体起防护作用。整个电路用接地金属外壳屏 蔽。 图十一 测量微弱输入电流的采样差动放大电路 校准时待测器件不应接入。上电后，需要 5 分钟的稳定时间。首先测量 VERR1 和 VERR2。这 是电流电压转换器的偏置电压和漏电流产生的误差电压。 VERR1=10(VOSA-IBA×RSa) VERR2=10(VOSB-IBB×RSb) 将这些误差从测量状态下的读数中减去。在测量时，放大器 B 除提供电流电压转换外， 还形成反馈闭环。仪器的偏置误差呈现共模信号，不影响测量结果。因此，测量到的只有仪 器的漏电流。 VA-VERR1=10[RSa×IB(+)] VX-VERR2=10[RSa×IB(-)] 尽管一系列的测量仅需要一次校准，为补偿电流电压转换器的温度漂移和周围环境的变 化，还应定时校准为好。实验结果显示，当仪器正确使用时，可实现 10fA 内的可重复性测 量。这个结果的一部分由于电路设计消除了高阻抗信号线的传递和其他寄生渗漏路径，一部 分由于校准和测量过程消除了误差。 4.2 光电二极管接口 AD549 具有低输入电流和低输入补偿电压，因此适合作为非常敏感的光电二极管的前 置放大器（见图十二）。光电二极管的信号电流 IS=R×P，其中：P 是照射在二极管表面的光 亮度，单位 W，R 是光电二极管响应率，单位 A/W。RF 将信号电流转换成输出电压： VOUT=RF×IS。输入电流 IB 产生输入电压误差 VE1：VE1＝IB×RF。运算放大器的输入电压补 偿通过光电二极管分流电阻 RS 产生误差电流：I＝VOS×RS。这个误差电流将在放大器输出 级产生一个误差电压 VE2：VE2＝（1＋RF/RS）VOS。对于给定典型值的光电二极管分流电阻， 特别当反馈阻抗很大的时候，RF/RS 远大于 1。并且 RF/RS 随温度增加。应使用低补偿电压 和低漂移的运算放大器使之保持精确。AD549K 可用于非常敏感的场合，其最大补偿电压为： 0.25mV，漂移：5mV/℃。 图十二 光电二极管前置放大器 图十三 光电二极管前置放大器直流误差源 4.2.1 光电二极管前置放大器噪声 噪声限制了前置放大器的信号分辨率。反馈阻抗产生的输出电压噪声是可检测的最小电 流信号。光电二极管的响应率产生的这个最小可探测电流表征了可被前置放大器检测到最小 光亮度。 噪声源与光电二极管、放大器和反馈电阻的连接见图十四。图十五所示是光谱密度在不 同频率点处噪声源对输出电压噪声的贡献（电路参数如图十三所示）。每个噪声源对输出电 压总噪声的贡献（rms）是对光谱密度函数平方在频率上的积分。输出电压噪声的 rms 值是 所有贡献的平方根。减小曲线下的总面积可以在给定带宽内提高偏置前置放大器的分辨率。 光电二极管前置放大器（图十二）在分辨率 0.5A/W，转换为 52fWrms 最小可探测电源 下，可以检测带宽 16Hz，26fArms 的信号电流。这个光电二极管具有高电源阻抗和低耦合 电容。CF 和 RF 一起决定了信号带宽，也限制了运算放大器输入电压噪声增益的峰值。放大 器输出的单极滤波器将运算放大器输出电压噪声带宽限制在 26Hz，与信号带宽匹配。这样 极大提高了前置放大器的信噪比。 图十四 光电二级管偏置放大器噪声源 图十五 不同频率下光电二级管 前置放大器噪声源密度谱 4.2.2 对数放大器 对数电路在处理动态范围很宽的信号时很有用。AD549L 的 60fA 最大输入电流可得到 输入电流范围 10pA～1mA，动态范围为 160dB 下、精度为 1%的对数放大性能。 如图十六所示对数放大器，输出电压与输入电流 I1 和 I2 的对数成比例。电阻 R1、R2 提 供电压输入。由于 NPN 器件用在前置放大器的闭环回路里构成对数函数，输出只与正极输 入电压和输入电流有关。输入电流决定匹配电阻 Q1、Q2 的集成器电流 IC1、IC2，从而决 定电压 VA、VB： VA,VB=—(kT/q)lnIC/IES 其中 IES 是晶体管饱和电流。 图十六 对数比例放大器 VA,VB 的差值由减法器获得：VC=(kT/q)lnIC/IES。 VC 与 (R9+R10)/R8 成 比 例 ， 室 温 下 大 约 等 于 16 。 因 此 ， 输 出 电 压 ： VOUT=1×log(IC2/IC1)V。 R8 的温度系数是＋3500ppmm/℃，用来提供温度补偿。并联电阻 R15 和 R7 可保持减 法器增益以使正负极输入匹配。 R11、R12、C1 和 C2 提供频率补偿。输入信号大于 50μA 时电路带宽是 300kHz。信号 减小时，带宽平稳减小。 调整电路时，先使输入电流为 10μA。使用放大器的调整分压计调整 A3 的便宜，使输 出为 0。再把 I1 定为 1μA，调整 R10 使输出为 1V。A1 和 A2 的附加偏移调整可提高电压 输入精度和动态范围。 AD549 的极低输入电流使电路适用于很宽的的信号电流。总输入电流是放大器输入电 流、补偿电容的漏电（使用聚苯乙烯和聚四氟乙烯电容时不可忽略）、双边对数晶体管一极 的集流器之间、集流器与地的漏电的总和。这些漏电决定了电路的精度。这些漏电的量级取 决于放大器输入失调电压。当偏移电压为 10mV 时，其值小于 10fA。最小分辨率主要受放 大器输入电流限制，AD549L 的精度最多只有 60fA。 输入电流大于 100μA 时，发射极电阻 Q1 和 Q2 的作用将降低电路的精度。R13、D1、 R16、R14、D2 和 R17 组成的电路补偿这些误差，使误差在输入电流为 1mA 时小于 1%。R13 和 R14 的大小取决于使用的对数晶体管的类型。LM394 的晶体管电阻约为 49.9kΩ。更小的 对数增益应使用更小的电阻值。 4.3 温度补偿 pH 探测放大器 pH 电极可等效为一个 mV 量级的电压源和一个串连电阻（取决于电极的成分和结构）。 标准 pH 电极的阻抗在 106Ω 和 109Ω 之间。因此选择具有足够低输入电流的放大器很重要， 保证放大器输入偏置电流在电极阻抗产生的压降不会成为测量的显著误差。图十七所示电路 中 AD549 用作一个 pH 探测放大器。 图十七 温度补偿 pH 探测放大器 像其他静电计放大器应用一样，必须使用保护环，屏蔽之类技术以保证 AD549 的低输 入电流。以 AD549L 为例，其最大输入电流为 60fA。如果 ph 电极电源阻抗大于 109Ω，输 入电流产生的误差小于 60μV。输入失调电压可补偿，小于 0.5mV。 无论温度多少，pH 值为 7 时，ph 探测器的输入值是 0V。可预测探测器转换函数的斜率 受温度影响（0℃时-54.2mV/pH,100℃时-74.04mV/pH），可用 AD590 温度传感器和 AD535 模 拟除法器为 pH 探测放大器提供精确的温度补偿电路。AD549 的放大器增益是 13.51。100℃ 时 AD590 电路的输出（C 点处）是 10V，系数为 26.8mV/℃。AD535 模拟除法器的输出（D 点 处）是温度补偿了的电压输出，ph 值为 7 时其中心值为 0V，转换函数是-1.00V/pH。输出范 围从-7.00V（pH＝14）到+7.00V（pH＝0）。 5 结束语 本文介绍 ADI 公司生产的极低偏置电流运算放大器 AD549，它具有低失调电压、低失 调漂移、低功耗、低输入电压噪声等特点。文中介绍了 AD549 的技术性能和工作原理及其 应用电路，可为 AD549 在其它高精度测量中提供很高的借鉴价值。 Product Page | 亚德诺半导体 Page 1 of 1 Print | Close this window AD549: 超低输入偏置电流运算放大器 PRODUCT DESCRIPTION AD549*是一款单芯片静电计运算放大器，具有极低的输入偏置电流。输入失调电压和输入失调电压漂移经过 激光校准，精度极高。该器件运用Analog Devices, Inc（简称ADI）独家开发的“Topgate”JFET技术，实现了 超低输入电流。借助这种技术，可以制造与标准结隔离式双极性工艺兼容的极低输入电流JFET。 自举输入级 提供1015 Ω共模阻抗，从而确保输入电流实质上独立于共模电压。 AD549适合要求极低输入电流和低输入失调电压的应用。它可以作为出色的前置放大器用于各种电流输出传感 器，例如光电二极管、光电倍增管或氧气传感器等，也可以用作精密积分器或低下垂采样保持器。AD549与标 准FET和静电计运算放大器引脚兼容，因此只需花费很少的额外成本，就可以让现有系统实现性能升级。 AD549采用TO-99密封封装。外壳与引脚8相连，因而金属外壳可以独立连至与输入引脚电位相同的一点，使 得流至外壳的杂散泄漏极小。AD549提供四种性能等级产品。J、K、L级的额定温度范围为0°C至+70°C商用 温度范围。S级按照MIL-STD-883B Rev. C标准加工，额定温度范围为−55°C至+125°C军用温度范围。 另外还 有扩展可靠性、增强筛选型产品。 增强筛选方法包括168小时老化测试，以及根据MIL-STD-883B Rev. C标准 衍生的其它环境和物理测试。 产品聚焦 1. AD549提供额定输入电流，100%经过测试，保证在器件预热后达到额定性能。在整个共模输入电压 范围内，保证输入电流达到额定性能。 2. 输入失调电压和漂移经过激光调整，分别达到0.25 mV和5 μV/°C (AD549K)，或者1 mV和20 μV/°C (AD549J)。 3. 最大静态电源电流为700 μA，对输入电流和失调电压的加热效应极小。 4. 交流特性包括1 MHz单位增益带宽和3 V/μs压摆率。 对于10 V输入步进，0.01%建立时间为5 μs。 * 受美国专利第4,639,683号保护。 应用 • • • • 静电计放大器 光电二极管前置放大器 pH 电极缓冲器 真空离子计测量 数据手册, Rev. G, 7/07 1 2010-12-15