芯美电子 EUP8060X 1A Li-Ion/Polymer Charger IC with Thermal Regulation and OVP DESCRIPTION FEATURES The EUP8060X series are highly integrated single cell Li-Ion/Polymer battery charger IC designed for handheld devices. The EUP8060X integrates internal power FET, current sensor, charge status, reverse current protection and overvoltage protection (OVP) in a single monolithic devices. When AC-adapter is applied, an external resistor sets the magnitude of the charge current, which may be programmed up to 1A. Thermal feedback also regulates the charge current to limit the die temperature when fast charging or while exposed to high ambient temperature. The EUP8060X charges the battery in three phases: conditioning, constant current, and constant voltage. Charge is terminated based on minimum current. An internal charge timer provides a backup safety for charge termination. The EUP8060X can operate in an LDO mode which is used primary during system level testing of the handset to eliminate the need for battery insertion. The EUP8060X automatically re-starts the charge if the battery voltage falls below an internal threshold. The EUP8060X also automatically enters sleep mode when DC supplies are removed. No external sense resistor or blocking diode is required for charging. z z z z z z z z z z z z z Programmable Charge Current up to 1A ± 1% Voltage Regulation Accuracy Thermal Regulation to Maximize Charge Rate Input Overvoltage Protection: 6.6V and 11V Options Charge Termination by Minimum Current and Time Precharge Conditioning with Safety Timer Status Outputs to Indicate Charge, Fault, and Power good Outputs Reverse Leakage Protection Prevents Battery Drainage Short-Circuit and Thermal Protection Automatic Sleep Mode for Low Power Consumption LDO Mode Operation for System Level Testing without Battery Insertion 3mm × 3mm TDFN Package RoHS Compliant and 100% Lead (Pb)-Free APPLICATIONS z z Mobile Phone, PDA, MP3 Players, Digital Cameras Mobile Internet Devices (M1D) Typical Application Circuit Figure 1. EUP8060B DS8060X Ver 1.0 May 2008 1 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Block Diagram Figure 2. Block Diagram DS8060X Ver 1.0 May 2008 2 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Pin Configurations Package Type Pin Configurations Package Type EUP8060A/D TDFN-10 Pin Configurations EUP8060B TDFN-10 EUP8060C TDFN-10 Pin Description PIN A,D B C I/O DESCRIPTION IN 1 1 1 I TMR 2 2 2 I STAT1 3 3 3 O Charge Input Voltage and internal supply. Connect a 1- µF (minimum) capacitor from IN to VSS. CIN≥ COUT Safety Timer Program Input, timer disabled if floating. Connect a resistor to VSS pin to program safety timer timeout value Charge Status Output 1 (open-collector, see Table 3) STAT2 4 4 4 O Charge Status Output 2 (open-collector, see Table 3) VSS 5 5 5 I ISET 6 6 6 O PG 7 7 ─ O Ground Charge current set point, resistor connected from ISET to VSS sets charge current value. Connect a 0.47-µF capacitor from BAT to ISET. Power Good status output (open-collector), active low CE ─ 8 7 I Charge enable Input. CE = LO enables charger. CE = HI disables charger. TE ─ ─ 8 I TS 8 ─ ─ I BAT 9 9 9 I OUT 10 10 10 O DS8060X Ver 1.0 May 2008 Termination enable Input. TE = LO enables termination detection and battery absent detection. TE = HI disables termination detection and battery absent detection. Temperature Sense Input, connect to battery pack thermistor. Connect an external resistive divider to program temperature thresholds. Battery Voltage Sense Input. Connect to the battery positive terminal. Connect a 200Ω resistor from BAT to OUT. Charge current output. Connect to the battery positive terminal. Connect a 1-µF (minimum) capacitor from OUT to VSS. 3 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Ordering Information Order Number Package Type EUP8060AJIR1 TDFN-10 EUP8060BJIR1 TDFN-10 EUP8060CJIR1 TDFN-10 EUP8060DJIR1 TDFN-10 Marking xxxxx 8060A xxxxx 8060B xxxxx 8060C xxxxx 8060D Operating Temperature Range -40 °C to 85°C -40 °C to 85°C -40 °C to 85°C -40 °C to 85°C EUP8060X □ □ □ □ Lead Free Code 1: Lead Free 0: Lead Packing R: Tape & Reel Operating temperature range I: Industry Standard Package Type J: TDFN DS8060X Ver 1.0 May 2008 4 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Absolute Maximum Ratings Supply voltage (IN with respect to Vss )----------------------------------------------------------- -0.3V to18V Input Voltage on IN, STATx, PG , TS, CE , TE (all with respect to Vss) --------------------- -0.3V to VIN Input Voltage on OUT,BAT,ISET,TMR (all with respect to Vss) ------------------------------ -0.3V to 7V Output Sink Current (STATx)+PG -----------------------------------------------------------------15mA Output Current (OUT pin) ---------------------------------------------------------------------------1.5A Junction temperature range, TJ ------------------------------------------------------------------------150°C Storage temperature range, Tstg ------------------------------------------------------------- -65°C to 150°C Lead temperature (soldering, 10s) -------------------------------------------------------------------260°C Dissipation Ratings Package θJA TDFN-10 48°C/W Derating Factor Above TA =25°C 0.0208 W/°C TA < 40°C Power Rating 1.5W Recommended Operating Conditions Min. Max. Unit Supply voltage, VIN 4.35 16.5 V Operating junction temperature range, TJ -40 125 °C Electrical Characteristics over recommended operating, TJ = 0~125°C range, See the Application Circuits section, typical values at TJ = 25°C (unless otherwise noted). SYMBOLE PARAMETER TEST CONDITIONS EUP8060X MIN TYP MAX UNIT 3.5 V 180 mV POWER DOWN THRESHOLD – UNDERVOLTAGE LOCKOUT V(UVLO) increase V(IN): 0 → 4 V Power down threshold 1.5 INPUT POWER DETECTION, CE = HI or LOW, V(IN) > 3.5 V VIN(DT) Input power detection threshold V(IN) detected at [V(IN) – V(OUT)] > VIN(DT) VHYS(INDT) Input power detection hysteresis Input power not detected at [V(IN)– V(OUT)] < [VIN(DT)– VHYS(INDT)] 30 TDGL(INDT1) Deglitch time, input power detected status PG :HI → LO, Thermal regulation loop not active, RTMR = 50 KΩ or V(TMR) = OPEN 1.5 TDGL(NOIN) Delay time, input power not detected status PG : LO → HI after TDGL(NOIN) Charger turned off after TDLY(CHGOFF), Measured TDLY(CHGOFF) Charger off delay from PG : LO → HI; Timer reset after TDLY(CHGOFF) mV 3.5 ms 10 µs 32 ms 28 INPUT OVERVOLTAGE PROTECTION V(OVP) Input overvoltage detection threshold V(IN) increasing VHYS(OVP) Input overvoltage hysteresis V(IN) decreasing TDGL(OVDET) Input overvoltage detection delay EUP8060A/B/C 6.2 6.6 7.0 EUP8060D 10.2 11 11.7 V EUP8060A/B/C 30 mV EUP8060D 30 mV CE = HI or LO, Measured from V(IN) > V(OVP) to 10 100 µs 10 100 µs PG : LO → HI; VIN increasing TDGL(OVNDET) Input overvoltage not detected delay CE = HI or LO, Measured from V(IN) < V(OVP) to PG : HI → LO; VIN decreasing DS8060X Ver 1.0 May 2008 5 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Electrical Characteristics over recommended operating, TJ = 0~125°C range, See the Application Circuits section, typical values at TJ = 25°C (unless otherwise noted). SYMBOLE PARAMETER EUP8060X TEST CONDITIONS MIN TYP MAX V(IN) = 6 V 50 200 V(IN) = 16.5 V 250 UNIT QUIESCENT CURRENT ICC(CHGOFF) IN pin quiescent current, charger off ICC(CHGON) IN pin quiescent current, charger on IBAT(DONE) Input power detected, CE = HI Input power detected, CE = LO, VBAT = 4.5 V Input power detected, charge terminated, Battery leakage current after termination into IC CE = LO Battery leakage current into IC, charger Input power detected, CE = HI OR off input power not detected, CE = LO TS PIN COMPARATOR IBAT(CHGOFF) µA 0.7 1.5 mA 1 5 µA 1 5 µA V(TS1) Lower voltage temperature threshold Hot detected at V(TS) < V(TS1); NTC thermistor 29 30 31 %V(IN) V(TS2) Upper voltage temperature threshold Cold detected at V(TS) > V(TS2); NTC thermistor 57 58 59 %V(IN) Hysteresis Temp OK at V(TS) > [ V(TS1) + VHYS(TS) ] OR V(TS) < [ V(TS2)– VHYS(TS) ] VIL Input (low) voltage V( CE ) increasing VIH Input (high) voltage VOL Output (low) saturation voltage VHYS(TS) 2 %V(IN) CE INPUT 1 0 2.0 V( CE ) decreasing STAT1, STAT2 AND PG OUTPUTS , V(IN) ≥ VO(REG) + V(DO-MAX) Ioutput = 5 mA (sink) 1.2 V V THERMAL SHUTDOWN T(SHUT) Temperature trip Junction temperature, temp rising 155 °C T(SHUTHYS) Thermal hysteresis Junction temperature 20 °C VOLTAGE REGULATION, V(IN) ≥ VO(REG) + V(DO-MAX), I(TERM) < I(OUT) < IO(OUT), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED VO(REG) Output voltage VO(TOL) Voltage regulation accuracy EUP8060A/B/C/D V(DO) Dropout voltage, V(IN) – V(OUT) 4.20 –1% I(OUT) = 1 A V 1% 800 mV CURRENT REGULATION , V(IN) > V(OUT) > V(DO-MAX), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED IO(OUT) Output current range V(BAT) > V(LOWV), IO(OUT) = I(OUT) = K(SET)×V(SET)/RSET 100 V(SET) Output current set voltage V(ISET) = V(SET), V(LOWV) < V(BAT) ≤ VO(REG) 2.45 K(SET) Output current set factor 100 mA ≤ IO(OUT)≤ 1000 mA RISET External resistor range Resistor connected to ISET pin mA × kΩ Volts 2.50 1000 mA 2.55 V 325 445 0.7 10 kΩ 25 35 ms 25 35 ms 25 35 ms VOLTAGE AND CURRENT REGULATION TIMING, V(IN) > V(OUT) + V(DO-MAX), CHARGER ENABLED, NO FAULT CONDITIONSDETECTED, RTMR = 50K or V(TMR) = OPEN; Thermal regulation loop not active Input power detection to full charge current time delay Measured from PG :HI → LO to I(OUT) > 100 mA, TPWRUP(EN) Charge enable to full charge current delay Measured from CE :HI → LO to I(OUT) >100 mA, IO(OUT) = 1A, V(BAT)= 3.5 V, V(IN) = 4.5 V, Input power detected TPWRUP(LDO) Input power detection to voltage regulation delay, LDO mode set, no battery or load connected TPWRUP(CHG) CE = LO, IO(OUT) = 1 A, V(BAT) = 3.5 V Measured from PG :HI → LO to V(OUT) > 90% of charge voltage regulation; V(TMR) = OPEN, LDO mode set, no battery and no load at OUT pin, CE = LO PRECHARGE AND OUTPUT SHORT-CIRCUIT CURRENT REGULATION, V(IN)–V(OUT) > V(DO-MAX) , V(IN) ≥ 4.5V, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, RTMR = 50K or V(TMR)=OPEN; Thermal regulation loop not active V(LOWV) Precharge to fast-charge transition threshold V(BAT) increasing 2.8 2.95 3.15 V V(SC) Precharge to short-circuit transition threshold V(BAT) decreasing 1.2 1.4 1.6 V DS8060X Ver 1.0 May 2008 6 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Electrical Characteristics over recommended operating, TJ = 0~125°C range, See the Application Circuits section, typical values at TJ = 25°C (unless otherwise noted). SYMBOLE PARAMETER TEST CONDITIONS MIN EUP8060X TYP MAX UNIT PRECHARGE AND OUTPUT SHORT-CIRCUIT CURRENT REGULATION, V(IN)–V(OUT) > V(DO-MAX) , V(IN) ≥ 4.5V, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, RTMR = 50K or V(TMR)=OPEN; Thermal regulation loop not active V(SCIND) Short-circuit indication V(BAT) decreasing 1.6 IO(PRECHG) Precharge current range V(SC) < VI(BAT) < V(LOWV), t < T(PRECHG) IO(PRECHG) = K(SET)× V(PRECHG)/R(ISET) 10 V(PRECHG) Precharge set voltage V(ISET) = V(PRECHG), V(SC) < VI(BAT) < V(LOWV), t < T(PRECHG) 225 IO(SHORT) Output shorted regulation current VSS≤ V(BAT)≤ V(SCI), IO(SHORT) = I(OUT), V(BAT)=VSS VPOR < VIN < 6.0V 15 6.0 V < VIN <VOVP 1.8 2.0 V 100 mA 250 280 mV 22 30 25 mA TEMPERATURE REGULATION (Thermal regulation™), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED TJ(REG) Temperature regulation limit V(IN) = 5.5 V, V(BAT) = 3.2 V, Fast charge current set to 1A I(MIN_TJ(REG)) Minimum current in thermal regulation V(LOWV) < V(BAT) < VO(REG), 0.7kΩ < RISET < 3.5kΩ 101 112 125 °C 100 160 mA CHARGE TERMINATION DETECTION, VO(REG) = 4.2 V, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, Thermal regulation LOOP NOT ACTIVE, RTMR = 50K or TMR pin OPEN I(TERM) Termination detection current range V(BAT) > V(RCH), I(TERM) = K(SET)× V(TERM)/RISET 10 100 mA V(TERM) Charge termination detection set voltage(1) V(BAT) > V(RCH) 225 250 275 mV TDGL(TERM) Deglitch time, termination detected V(ISET) decreasing 15 25 35 ms BATTERY RECHARGE THRESHOLD V(RCH) Recharge threshold detection [VO(REG)–V(BAT) ] > V(RCH) 75 100 135 mV TDGL(RCH) Deglitch time, recharge detection V(BAT) decreasing 15 25 35 ms TIMERS, CE = LO, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, V(TMR) < 3 V, TIMERS ENABLED T(CHG) Charge safety timer range T(CHG) = K(CHG)× RTMR ; thermal loop not active K(CHG) Charge safety timer constant V(BAT) > V(LOWV) 0.08 T(PCHG) Pre-charge safety timer range T(PCHG) = K(PCHG)× T(CHG) ; Thermal regulation loop not active 1080 K(PCHG) Pre-charge safety timer constant V(BAT) < V(LOWV) 0.08 0.1 0.12 VTMR(OFF) Charge timer and termination enable threshold [Charge timer AND termination disabled] at V(TMR) > VTMR(OFF) EUP8060A/B/D 2.5 3.0 3.5 V Charge timer enable threshold [Charge timer disabled] at V(TMR) > VTMR(OFF) EUP8060C TMR pin source current V(TMR) = 3.5 V, V(IN) = 4.5 V 1 6 µA 2 V < V(BAT) < VO(REG) 1 3.2 mA 150 ms ITMR BATTERY DETECTION THRESHOLDS IDET(DOWN) Battery detection current (sink) IDET(UP) Battery detection current (source) 2 V < V(BAT) < VO(REG) T(DETECT) Battery detection time 2 V < V(BAT) < VO(REG), Thermal regulation loop not active; RTMR = 50 kΩ, IDET(down) or IDET (UP) TIMER FAULT RECOVERY I(FAULT) Fault Current (source) 3 Overcurrent detection delay time 2 85 V(OUT) < V(RCH) Measured from V(ISET) = VSS to IO(OUT) = 0 120 hours hr/kΩ 3600 sec -10 mA 1.8 A 100 µs (1) The voltage on the ISET pin is compared to the V(TERM) voltage to determine when the termination should occur. DS8060X Ver 1.0 May 2008 10 0.12 IO(PRECHG) CHARGE OVERCURRENT DETECTION, V(IN) ≥ 4.5 V, CHARGER ENABLED Charge overcurrent detection ICH(OI) V(ISET) = VSS threshold TDGL(OI) 0.1 7 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Typical Operating Characteristics Figure3. Figure4. Figure5. Figure6. PRE-CHARGE CURRENT vs BATTERY VOLTAGE 107 o 0C 106 105 Charge Current - mA o 25 C 104 103 102 o 85 C 101 100 99 98 2.0 2.2 2.4 2.6 2.8 Battery Voltage -V Figure7. DS8060X Ver 1.0 May 2008 Figure8. 8 联系电话：１５９９９６４４５７９ ８３１５１７１５ 3.0 芯美电子 EUP8060X FAST-CHARGE CURRENT vs BATTERY VOLTAGE FAST-CHARGE CURRENT vs BATTERY VOLTAGE 51.50 1020 51.25 1000 Charge Current - mA Charge Current - mA 1010 o 85 C 990 o 25 C 980 o 0C 970 o 85 C o 25 C 51.00 o 0C 50.75 960 950 3.0 3.2 3.4 3.6 3.8 50.50 3.0 4.0 3.2 3.4 Battery Voltage -V 3.6 3.8 4.0 Battery Voltage -V Figure9. Figure10. KSET LINEARITY vs CHARGE CURRENT KSET LINEARITY vs CHARGE CURRENT 440 460 450 420 440 o 420 KSET - A/A KSET - A/A o 0C 430 o 25 C 410 85 C 400 o 25 C o 0C 380 o 85 C 360 400 390 20 340 30 40 50 60 70 80 90 100 0 110 100 200 300 Battery Charge Current - mA Figure11. 500 600 700 800 900 1000 1100 Figure12. BATTERY REGULATION VOLTAGE vs INPUT VOLTAGE DROPOUT VOLTAGE vs TEMPERATURE 0.36 V(DO) - Dropout Voltage - V 4.255 o 85 C Battery Voltage - V 400 Battery Charge Current - mA 4.250 o 25 C 4.245 o 0.34 0.32 0.30 0.28 0.26 0C 0.24 -20 4.240 4 5 6 7 8 9 10 11 20 40 60 80 TA - Temperature - C Figure14. Figure13. DS8060X Ver 1.0 May 2008 0 o Input Voltage - V 9 联系电话：１５９９９６４４５７９ ８３１５１７１５ 100 120 芯美电子 EUP8060X State Machine Diagram Figure 15. Operational Flow chart DS8060X Ver 1.0 May 2008 10 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Typical Application NOTE: Temp window set between 0℃ and 45℃ for application w/TS pin. Figure 16. Application Circuit DS8060X Ver 1.0 May 2008 11 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X FUNCTIONAL DESCRIPTION The charge current is programmable using external components (RISET resistor). A typical charge profile is shown below, for an operation condition that does not cause the IC junction temperature to exceed TJ(REG), (112 ℃ typical). Figure 17.Charging Profile Within TJ(REG) If the operating conditions cause the IC junction temperature to exceed TJ(REG), the charge cycle is modified, with the activation of the integrated thermal control loop. The thermal control loop is activated when an internal voltage reference, which is inversely proportional to the IC junction temperature, is lower than a fixed, temperature stable internal voltage. The thermal loop overrides the other charger control loops and reduces the charge current until the IC junction temperature returns to TJ(REG), effectively regulating the IC junction temperature. A modified charge cycle, with the thermal loop active, is shown in Figure 18. Figure 18.Charging Profile ,Thermal Loop Active DS8060X Ver 1.0 May 2008 OPERATING MODES Power Down The EUP8060X family is in a power-down mode when the input power voltage (IN) is below the power-down threshold V(UVLO). During the power down mode all IC functions are off, and the host commands at the control pins are not interpreted. The status output pins STAT1 and STAT2 are set to high impedance mode and PG output is set to the high impedance state. Sleep Mode The EUP8060X enters the sleep mode when the input power voltage (IN) is above the power down threshold V(UVLO) but still lower than the input power detection threshold, V(IN) < V(OUT) + VIN(DT). During the sleep mode the charger is off, and the host commands at the control pins are not interpreted. The status output pins STAT1 and STAT2 are set to the high impedance state and the PG output indicates input power not detected. The sleep mode is entered from any other state, if the input power (IN) is not detected. Overvoltage Lockout The input power is detected when the input voltage V(IN) > V(OUT) + VIN(DT). The EUP8060X transitions from the sleep mode to the power-on-reset mode. In this mode of operation an internal timer T(POR) is started. Until the timer expires the STAT1 and STAT2 outputs indicate charger OFF, and the PG output indicates the input power status as not detected. At the end of the power-on-reset delay. The STAT1, STAT2 and PG pins are active. Stand-By Mode In the EUP8060B/C the stand-by mode is started at the end of the power-on-reset phase, if the input power is detected and CE = HI. In the stand-by mode selected blocks in the IC are operational, and the control logic monitors system status and control pins to define if the charger will set to on or off mode. The quiescent current required in stand-by mode is 50 µA typical. If the CE pin is not available the EUP8060X enters the begin charge mode at the end of the power-on-reset phase. Begin Charge Mode All blocks in the IC are powered up, and the EUP8060X is ready to start charging the battery pack. A new charge cycle is started when the control logic decides that all conditions required to enable a new charge cycle are met. During the begin charge phase all timers are reset, after that the IC enters the charging mode. Charge Mode When the charging mode is active the EUP8060X executes the charging algorithm, as described in the operational flow chart, Figure 15. 12 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Suspend Mode The suspend mode is entered when the pack temperature is not within the valid temperature range. During the suspend mode the charger is set to off, but the timers are not reset. The normal charging mode resumes when the pack temperature is within range. LDO Mode Operation The LDO Mode (TMR pin open circuit) disables the charging termination circuit, disables the battery detect routine and holds the safety timer clock in reset. This is often used for operation without a battery or in production testing. The OUT pin current can be monitored via the ISET pin. If in LDO mode without a battery present, It is recommended that a 200Ω feedback resistor,R8, be used, see Figure 16. CONTROL LOGIC OVERVIEW An external host can enable or disable the charging process using a dedicated control pin, CE . A low-level signal on this pin enables the charge, and a high-level signal disables the charge. The EUP8060X is in stand-by mode with CE = HI. When the charger function is enabled ( CE = LO) a new charge is initiated. Table 1 describes the charger control logic operation, in EUP8060X versions without the TS pin the pack temp status is internally set to OK. In both STANDBY and SUSPEND modes the charge process is disabled. In the STANDBY mode all timers are reset; in SUSPEND mode the timers are held at the count stored when the suspend mode was set. The timer fault, termination and output short circuit variables shown in the control logic table are latched in the detection circuits, outside the control logic. Refer to the timers, termination and short circuit protection sections for additional details on how those latched variables are reset. Temperature Qualification (Applies only to versions with TS pin option) The EUP8060X continuously monitors battery temperature by measuring the voltage between the TS and VSS pins. An internal current source provides the bias for most common 10-kΩ negative-temperature coefficient thermistors (NTC). The device compares the voltage on the TS pin against the internal V(LTF) and V(HTF) thresholds to determine if charging is allowed. Once a temperature outside the V(LTF) and V(HTF) thresholds is detected the device immediately suspend the charge. The device suspend charge by turning off the power FET and holding the timer value (i.e. timers are NOT reset). Charge is resumed when the temperature returns to the normal range. However the user may modify these thresholds by adding two external resistors. See Figure 16. Input Overvoltage Detection, Power Good Status Output The input power detection status for pin IN is shown at the open collector output pin PG . Table 2. Input Power Detection Status INPUT POWER DETECTION (IN) PG STATE NOT DETECTED High impedance DETECTED, LO NO OVERVOLTAGE DETECTED, High impedance OVERVOLTAGE The EUP8060X detects an input overvoltage when V(IN) > V(OVP). The charger function is turned off and the EUP8060X is set to standby mode of operation. The OVP detection is not latched, and the IC returns to normal operation when the fault condition is removed. Table 1. Control Logic Functionality EUP8060X OPERATION MODE CE POWER DOWN LO SLEEP X STANDBY SEE STATE DIAGRAM OUTPUT SHORT CIRCUIT TERMI -NATION (latched) PACK TEMP THERMAL SHUTDOWN POWER DOWN CHARGER POWER STAGE X X X X X Yes OFF X X X X X No OFF HI LO LO LO LO Low Not Detected Detected Detected Detected Detected Detected X X No Yes No X Yes No No No X X Yes No Yes X X X X TJ<TSHUT No No No No No OFF OFF IFAULT IDETECT LO Detected No No No TJ<TSHUT No OFF LO Detected Over Voltage Detected No No No X X X X Absent Hot or Cold Ok TJ>TSHUT No OFF No No No Ok TJ<TSHUT No OFF No No No Ok TJ<TSHUT No ON LO CHARGING INPUT POWER TIMER FAULT (latched) LO DS8060X Ver 1.0 May 2008 13 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Charge Status Outputs The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in Table 3. These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the opencollector transistor is turned off. Table 3. Charge Status (1) Charge State STAT1 STAT2 Precharge in progress ON ON Fast charge in progress ON OFF Done (termination enabled only) OFF ON Charge Suspend (temperature) Timer Fault Charger off OFF OFF Selected input power overvoltage detected Battery absent Batteryshort (1) Pulse loading on the OUT pin may cause the IC to cycle between Done and charging states (LEDs Flashing) (2) When termination is disabled (TMR pin floating or TE = Hi, EUP8060C) the Done state is not available; the status LEDs indicate fast charge if VBAT > VLOWV and precharge if VBAT < VLOWV. The available output current is a function of the OUT pin voltage, See Figure 23. Battery Charging: Constant Current Phase TheEUP8060 family offers on-chip current regulation. The current regulation is defined by the value of the resistor connected to ISET pin. During a charge cycle the fast charge current IO(OUT) is applied to the battery if the battery voltage is above the V(LOWV) threshold (2.95 V typical): I(OUT ) = I O ( OUT ) = V(SET ) × K (SET ) (3) R ISET Where K(SET) is the output current set factor and V(SET) is the output current set voltage. During a charge cycle if the battery voltage is below the V(LOWV) threshold a pre-charge current I(PRECHG) is applied to the battery. This feature revives deeply discharged cells. I(OUT ) = I ( PRECHG ) = V(SET ) × K (SET ) R ISET ~ I O ( OUT ) 10 (4) Where K(SET) is the output current set factor and V(PRECHG) is the precharge set voltage. At low constant current charge currents, less than 350 mA, it is recommended that a 0.47µF capacitor be placed DS8060X Ver 1.0 May 2008 between the ISET and BAT pins to insure stability, see Figure 16. Charge Current Translator When the charge function is enabled internal circuits generate a current proportional to the charge current at the ISET pin. This current, when applied to the external charge current programming resistor RISET generates an analog voltage that can be monitored by an external host to calculate the current sourced from the OUT pin. V (ISET ) = I(OUT ) × R ISET K (SET ) (5) Battery Voltage Regulation The battery pack voltage is sensed through the BAT pin, which is tied directly to the positive side of the battery pack. The EUP8060X monitors the battery pack voltage between the BAT and VSS pins. When the battery voltage rises to VO(REG) threshold the voltage regulation phase begins and the charging current begins to taper down.The voltage regulation threshold VO(REG) is fixed by an internal IC voltage reference. Pre-Charge Timer The EUP8060X family activates an internal safety timer during the battery pre-conditioning phase. The charge safety timer time-out value is set by the external resistor connected to TMR pin, RTMR and the timeout constants K(PCHG) and T(CHG): T( PCHG ) = K ( PCHG ) × T( CHG ) The pre-charge timer operation is detailed in Table 4. Table 4. Pre-Charge Timer Operational Modes VOUT > V(LOWV) PRE-CHARGE TIMER MODE X RESET Yes RESET Yes RESET No Hold CHARGING, TMR PIN NOT OPEN No COUNTING, EXTERNAL PROGRAMMED RATE CHARGING, TMR PIN OPEN X RESET 8060X Mode STANDBY ( CE = Hi) CHARGING SUSPEND (TS out of range) SUSPEND (TS out of range) 14 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X In SUSPEND mode the pre-charge timer is put on hold (i.e., pre-charge timer is not reset), normal operation resumes when the timer returns to the normal operating mode (COUNTING). If V(BAT) does not reach the internal voltage threshold V(LOWV) within the pre-charge timer period a fault condition is detected, the charger is turned off and the pre-charge safety timer fault condition is latched. When the pre-charge timer fault latch is set the charger is turned off. Under those conditions a small current IFAULT is applied to the OUT pin, as long as input power (IN) is detected AND V(OUT) < V(LOWV), as part of a timer fault recovery protocol. This current allows the output voltage to rise above the pre-charge threshold V(LOWV), resetting the pre-charge timer fault latch when the pack is removed. Table 5 further details the pre-charge timer fault latch operation. Table 5. Pre-Charge Timer Latch Functionality PRE-CHARGE TIMER FAULT ENTERED WHEN Pre-charge timer timeout AND V(OUT) > V(LOWV) PRE-CHARGE TIMER FAULT LATCH RESET AT CE rising edge or OVP detected Input power removed (not detected) Timer function disabled Thermal Protection Loop An internal control loop monitors the EUP8060X junction termperature (TJ) to ensure safe operation during high power dissipations and or increased ambient temperatures. This loop monitors the EUP8060X junction temperature and reduces the charge current as necessary to keep the junction temperature from exceeding, TJ(REG), (112°C, typical). The EUP8060X 's thermal loop control can reduce the charging current down to ~100mA if needed. If the junction temperature continues to rise, the IC will enter thermal shutdown. Thermal Shutdown and Protection Internal circuits monitor the junction temperature, TJ, of the die and suspends charging if TJ exceeds an internal threshold T(SHUT) (155°C typical). Charging resumes when TJ falls below the internal threshold T(SHUT) by approximately 20°C. DS8060X Ver 1.0 May 2008 Dynamic Timer Function The charge and pre-charge safety timers are programmed by the user to detect a fault condition if the charge cycle duration exceeds the total time expected under normal conditions. The expected charge time is usually calculated based on the fast charge current rate. When the thermal loop is activated the charge current is reduced, and EUP8060X activates the dynamic timer control, an internal circuit that slows down the safety timer's clock frequency. The dynamic timer control circuit effectively extends the safety time duration for either the precharge or fast charge timer modes. This minimizes the chance of a safety timer fault due to thermal regulation. The EUP8060X dynamic timer control (DTC) monitors the voltage at pin ISET during pre-charge and fast charge, and if in thermal regulation slows the clock frequency proportionately to the change in charge current. The time duration is based on ripple counter, so slowing the clock frequency is a real time correction. The DTC circuit changes the safety timers clock period based on the V(SET)/V(ISET) ratio (fast charge) or V(PRECHG)/V(SET) ratio (pre-charge). Typical safety timer multiplier values relative to the V(SET)/V(ISET) ratio is shown in Figure 19 and Figure 20. Charge Termination Detection and Recharge The charging current is monitored during the voltage regulation phase. Charge termination is indicated at the STATx pins (STAT1 = Hi-Z; STAT2 = Low) once the charge current falls below the termination current threshold I(TERM). A deglitch period TDGL(TERM) is added to avoid false termination indication during transient events. Charge termination is not detected if the charge current falls below the termination threshold as a result of the thermal loop activation. Termination is also not detected when charger enters the suspend mode, due to detection of invalid pack temperature or internal thermal shutdown. Table 6 describes the termination latch functionality. Table 6. Termination Latch Functionality TERMINATION TERMINATION DETECTED LATCH RESET AT LATCHED WHEN I(OUT)<I(TERM) AND t >TDGL(TERM) AND V(OUT) > V(RCH) CE rising edge or OVP detected New charging cycle started; see state diagram Termination disabled 15 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Battery Absent Detection-Voltage Mode Algorithm The EUP8060X provides a battery absent detection scheme to reliably detect insertion and/or removal of battery packs. The detection circuit applies an internal current to the battery terminal, and detects battery presence based on the terminal voltage behavior. Figure 22 has a typical waveform of the output voltage when the battery absent detection is enabled and no battery is connected: The termination function is DISABLED: 1. In EUP8060A/B/D the termination is disabled when the TMR pin is left open (floating). 2. In EUP8060C leaving TMR pin open (floating) does NOT disable the termination. The only way to disable termination in the EUP8060C is to set TE = HIGH. Figure 19. Safety Timer Linearity Internal Clock Period Multiplication Factor Figure 22. Battery-Absent Detection Waveforms The battery absent detection function is disabled if the voltage at the BAT pin is held above the battery recharge threshold, V(RCH), after termination detection. When the voltage at the BAT pin falls to the recharge threshold, either by connection of a load to the battery or due to battery removal, the EUP8060 begins a battery absent detection test. This test involves enabling a detection current, IDET(DOWN), for a period of T(DETECT) and checking to see if the battery voltage is below the pre-charge threshold, V(LOWV). Following this, the precharge current, IDET(UP) is applied for a period of T(DETECT) and the battery voltage checked again to be above the recharge threshold. Passing both of the discharge and charging tests (battery terminal voltage being below the pre-charge and above the recharge thresholds on the battery detection test) indicates a battery absent fault at the STAT1 and STAT2 pins. Failure of either test starts a new charge cycle. For the absent battery condition the voltage on the BAT pin rises and falls between the V(LOWV) and VO(REG) thresholds indefinitely. See the operation flowchart for more details on this algorithm. If it is desired to power a system load without a battery, it is recommended to float the TMR pin which puts the charger in LDD mode (disables termination). The battery absent detection function is disabled when the termination is disabled. Figure 20. Safety Timer Linearity for RTMR Values Figure 21. Oscillator Linearity vs ITMR RTMR 30KΩ-100KΩ DS8060X Ver 1.0 May 2008 16 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Charge Safety Timer As a safety mechanism the EUP8060X has a user -programmable timer that monitors the total fast charge time. This timer (charge safety timer) is started at the beginning of the fast charge period. The safety charge timeout value is set by the value of an external resistor connected to the TMR pin (RTMR); if pin TMR is left open (floating) the charge safety timer is disabled. The charge safety timer time-out value is calculated as follows: T( CHG ) = [K ( CHG ) × R ( TMR ) ] Short circuit Protection The internal comparators monitor the battery voltage and detect when a short circuit is applied to the battery terminal. If the voltage at the BAT pin is less than the internal threshold V(scind) (1.8V typical), the STAT pins indicate a fault condition (STAT1 = STAT2 = Hi-Z). When the voltage at the BAT pin falls below a second internal threshold V(sc) (1.4V typical), the charger power stage is turned off. A recovery current, I(short) (22 mA typical), is applied to the BAT pin, enabling detection of the short circuit removal. The battery output current versus battery voltage is shown in the graph, Figure 23. The safety timer operation modes are shown in Table 7 Table 7. Charge Safety Timer Operational Modes EUP8060X VOUT > V(LOWV) CHARGE SAFETY TIMER MODE RESET RESET RESET SUSPEND STANDBY X CHARGING No SUSPEND No SUSPEND Yes CHARGING, TMR Yes COUNTING PIN NOT OPEN CHARGING, TMR X RESET PIN OPEN In SUSPEND mode the charge safety timer is put on hold (i.e., charge safety timer is not reset), normal operation resumes when the TS fault is removed and the timer returns to the normal operating mode (COUNTING). If charge termination is not reached within the timer period a fault condition is detected. Under those circumstances the LED status is updated to indicate a fault condition and the charger is turned off. When the charge safety timer fault latch is set and the charger is turned off a small current IFAULT is applied to the OUT pin, as long as input power (IN) is detected AND V(OUT) < V(RCHG), as part of a timer fault recovery protocol. This current allows the output voltage to rise above the recharge threshold V(RCHG) if the pack is removed, and assures that the charge safety timer fault latch is reset if the pack is removed and re-inserted. Table 8 further details the charge safety timer fault latch operation. Table 8. Charge Safety Timer Latch Functionality CHARGE SAFETY CHARGE SAFETY TIMER FAULT TIMER FAULT ENTERED LATCH RESET AT Figure 23. Short circuit Behavior See the application section for additional details on start-up operation with V(BAT) < V(SC). Startup with Deeply Depleted Battery Connected The EUP8060X charger furnishes the programmed charge current if a battery is detected. If no battery is connected the EUP8060X operates as follows: · The output current is limited to 22 mA (typical), if the voltage at BAT pin is below the short circuit detection threshold V(SC), 1.8 V typical. · The output current is regulated to the programmed pre-charge current if V(SC) < V(BAT) < V(LOWV). · The output current is regulated to the programmed fast charge current If V(BAT) > V(LOWV) AND voltage regulation is not reached. The output voltage collapses if no battery is present and the end equipment requires a bias current larger that the available charge current. CE rising edge or OVP detected V(OUT) > V(LOW V) DS8060X Ver 1.0 May 2008 Input power removed (not detected) New charging cycle started; see state diagram 17 联系电话：１５９９９６４４５７９ ８３１５１７１５ 芯美电子 EUP8060X Packaging Information TDFN-10 SYMBOLS A A1 D E1 E L b e D1 DS8060X Ver 1.0 May 2008 MILLIMETERS MIN. MAX. 0.70 0.80 0.00 0.05 2.90 3.10 1.70 2.90 3.10 0.30 0.50 0.18 0.30 0.50 2.40 INCHES MIN. 0.028 0.000 0.114 MAX. 0.031 0.002 0.122 0.067 0.114 0.012 0.007 0.122 0.020 0.012 0.020 0.094 18 联系电话：１５９９９６４４５７９ ８３１５１７１５