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LT1614
Inverting 600kHz
Switching Regulator
U
DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
■
The LT ®1614 is a fixed frequency, inverting mode switching reglator that operates from an input voltage as low as
1V. Utilizing a low noise topology, the LT1614 can generate a negative output down to – 24V from a 1V to 5V input.
Fixed frequency switching ensures a clean output free
from low frequency noise. The device contains a lowbattery detector with a 200mV reference and shuts down
to less than 10µA. No load quiescent current of the LT1614
is 1mA and the internal NPN power switch handles a
500mA current with a voltage drop of just 295mV.
Better Regulation Than a Charge Pump
0.1Ω Effective Output Impedance
– 5V at 200mA from a 5V Input
600kHz Fixed Frequency Operation
Operates with VIN as Low as 1V
1mA Quiescent Current
Low Shutdown Current: 10µA
Low-Battery Detector
Low VCESAT Switch: 295mV at 500mA
U
APPLICATIO S
■
■
■
■
High frequency switching enables the use of small inductors and capacitors. Ceramic capacitors can be used in
many applications, eliminating the need for bulky tantalum types.
MR Head Bias
LCD Bias
GaAs FET Bias
Positive-to-Negative Conversion
The LT1614 is available in 8-lead MSOP or SO packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATIO
+
VIN
C1
33µF
100k
L2
22µH
5V to – 5V Converter Efficiency
90
VOUT
– 5V
200mA
SW
SHDN
LT1614
VC
NFB
GND
69.8k
D1
24.9k
+
VIN
5V
C2
33µF
1nF
C1, C2: AVX TAJB336M010
C3: TAIYO YUDEN EMK316BJ105MF
D1: MBR0520
L1, L2: MURATA LQH3C220
Figure 1. 5V to – 5V/200mA Converter
1614 TA01
80
EFFICIENCY (%)
C3
1µF
L1
22µH
70
60
50
40
3
100
10
30
LOAD CURRENT (mA)
300
1614 TA02
1
LT1614
W W
W
AXI U
U
ABSOLUTE
RATI GS
(Note 1)
VIN, SHDN, LBO Voltage ......................................... 12V
SW Voltage ............................................... – 0.4V to 30V
NFB Voltage ............................................................ – 3V
VC Voltage ................................................................ 2V
LBI Voltage ............................................ 0V ≤ VLBI ≤ 1V
Current into FB Pin .............................................. ±1mA
Junction Temperature ...........................................125°C
Operating Temperature Range
LT1614C ................................................. 0°C to 70°C
LT1614I ............................................. – 40°C to 85°C
Extended Commercial
Temperature Range (Note 2) .................. – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
TOP VIEW
NFB
VC
SHDN
GND
1
2
3
4
8
7
6
5
LBO
LBI
VIN
SW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
LT1614CMS8
LT1614IMS8
MS8 PART MARKING
TJMAX = 125°C, θJA = 160°C/W
LTID
LTJB
NFB 1
8
LBO
VC 2
7
LBI
SHDN 3
6
VIN
GND 4
5
SW
LT1614CS8
LT1614IS8
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
1614
1614I
TJMAX = 125°C, θJA = 120°C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Commercial Grade 0°C to 70°C. VIN = 1.5V, VSHDN = VIN unless
otherwise noted.
PARAMETER
CONDITIONS
MIN
Quiescent Current
VSHDN = 0V
Feedback Voltage
NFB Pin Bias Current (Note 3)
VNFB = –1.24V
Reference Line Regulation
1V ≤ VIN ≤ 2V
2V ≤ VIN ≤ 6V
Error Amp Transconductance
2
UNITS
mA
µA
– 1.21
– 1.24
– 1.27
V
– 2.5
– 4.5
–7
µA
0.6
0.3
1.1
0.8
%/V
%/V
0.92
1
V
6
V
●
∆I = 5µA
µmhos
16
100
V/V
●
500
600
●
73
70
80
80
%
%
0.75
1.2
A
Maximum Duty Cycle
Switch Current Limit (Note 4)
2
10
●
Error Amp Voltage Gain
Switching Frequency
MAX
1
5
●
Minimum Input Voltage
Maximum Input Voltage
TYP
750
kHz
LT1614
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Commercial Grade 0°C to 70°C. VIN = 1.5V, VSHDN = VIN unless
otherwise noted.
PARAMETER
CONDITIONS
Switch VCESAT
Shutdown Pin Current
MIN
TYP
MAX
UNITS
ISW = 500mA (25°C, 0°C)
ISW = 500mA (70°C)
295
350
400
mV
mV
VSHDN = VIN
VSHDN = 0V
10
–5
20
– 10
µA
µA
200
210
215
mV
mV
V
LBI Threshold Voltage
●
190
185
LBO Output Low
ISINK = 10µA
0.1
0.25
LBO Leakage Current
VLBI = 250mV, VLBO = 5V
0.01
0.1
µA
LBI Input Bias Current (Note 5)
VLBI = 150mV
10
50
nA
Low-Battery Detector Gain
1MΩ Load
1000
Switch Leakage Current
VSW = 5V
0.01
3
TYP
MAX
1
5
2
10
V/V
µA
Industrial Grade – 40°C to 85°C. VIN = 1.5V, VSHDN = VIN unless otherwise noted.
PARAMETER
CONDITIONS
MIN
Quiescent Current
VSHDN = 0V
Feedback Voltage
mA
µA
●
– 1.21
– 1.24
– 1.27
V
●
–2
– 4.5
– 7.5
µA
1V ≤ VIN ≤ 2V
2V ≤ VIN ≤ 6V
0.6
0.3
1.1
0.8
%/V
%/V
– 40°C
85°C
1.1
0.8
1.25
1.0
V
V
NFB Pin Bias Current (Note 3)
VNFB = – 1.24V
Reference Line Regulation
Minimum Input Voltage
Maximum Input Voltage
Error Amp Transconductance
UNITS
6
●
∆I = 5µA
Error Amp Voltage Gain
V
16
µmhos
100
V/V
Switching Frequency
●
500
600
Maximum Duty Cycle
●
70
80
%
0.75
1.2
A
Switch Current Limit (Note 4)
750
kHz
Switch VCESAT
ISW = 500mA (– 40°C)
ISW = 500mA (85°C)
250
330
350
400
mV
mV
Shutdown Pin Current
VSHDN = VIN
VSHDN = 0V
10
–5
20
– 10
µA
µA
LBI Threshold Voltage
200
220
mV
LBO Output Low
ISINK = 10µA
0.1
0.25
V
LBO Leakage Current
VLBI = 250mV, VLBO = 5V
0.1
0.3
µA
5
30
●
180
LBI Input Bias Current (Note 5)
VLBI = 150mV
Low-Battery Detector Gain
1MΩ Load
1000
Switch Leakage Current
VSW = 5V
0.01
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1614C is guaranteed to meet specified performance from
0°C to 70°C and is designed, characterized and expected to meet these
extended temperature limits, but is not tested at – 40°C and 85°C. The
LT1614I is guaranteed to meet the extended temperature limits.
nA
V/V
µA
3
Note 3: Bias current flows out of NFB pin.
Note 4: Switch current limit guaranteed by design and/or correlation to
static tests. Duty cycle affects current limit due to ramp generator.
Note 5: Bias current flows out of LBI pin.
3
LT1614
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Shutdown Pin Bias Current vs
Input Voltage
Quiescent Current in Shutdown
10
10
8
8
LBI Bias Current vs Temperature
16
6
4
2
LBI BIAS CURRENT (nA)
SHDN BIAS CURRENT (µA)
QUIESCENT CURRENT (µA)
14
6
4
12
10
8
6
4
2
2
0
0
1
2
3
INPUT VOLTAGE (V)
4
0
5
0
1
2
3
INPUT VOLTAGE (V)
4
1614 G01
–25
0
50
25
TEMPERATURE (°C)
75
1614 G02
Switch VCESAT vs Current
Oscillator Frequency vs
Input Voltage
210
TA = 25°C
100
1614 G03
LBI Reference vs Temperature
500
900
208
300
200
100
800
206
204
FREQUENCY (kHz)
REFERENCE VOLTAGE (mV)
400
VCESAT (mV)
0
–50
5
202
200
198
196
194
25°C
85°C
700
–40°C
600
500
192
0
0
100
500
200
300
400
SWITCH CURRENT (mA)
190
–50
600
–25
25
50
0
TEMPERATURE (°C)
75
–1.245
5
5
–1.240
VIN = 3V
1
0
–40
VIN = 5V
–20
0
20
40
TEMPERATURE (°C)
60
80
1614 G07
*Includes diode leakage
–1.235
4
VNFB (V)
NFB PIN BIAS CURRENT (µA)
QUIESCENT CURRENT (mA)
6
2
5
VNFB vs Temperature
6
3
4
1614 G06
NFB Pin Bias Current vs
Temperature
VIN = 1.25V
3
1614 G05
Quiescent Current vs
Temperature*
4
2
1
INPUT VOLTAGE (V)
1614 G04
4
400
100
3
–1.230
–1.225
2
–1.220
1
0
–50
–1.215
–25
0
25
50
TEMPERATURE (°C)
75
100
1614 G08
–1.210
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
1614 G09
LT1614
U
U
U
PIN FUNCTIONS
NFB (Pin 1): Negative Feedback Pin. Reference voltage is
– 1.24V. Connect resistive divider tap here. The suggested value for R2 is 24.9k. Set R1 and R2 according to:
R1 =
GND (Pin 4): Ground. Connect directly to local ground
plane.
SW (Pin 5): Switch Pin. Minimize trace area at this pin to
keep EMI down.
| VOUT | – 1.24
1.24
+ 4.5 • 10 – 6
R2
VIN (Pin 6): Supply Pin. Must have 1µF ceramic bypass
capacitor right at the pin, connected directly to ground.
VC (Pin 2): Compensation Pin for Error Amplifier. Connect a series RC from this pin to ground. Typical values
are 100kΩ and 1nF. Minimize trace area at VC.
LBI (Pin 7): Low-Battery Detector Input. 200mV reference. Voltage on LBI must stay between ground and
700mV. Float this pin if not used.
SHDN (Pin 3): Shutdown. Ground this pin to turn off
switcher. Must be tied to VIN (or higher voltage) to enable
switcher. Do not float the SHDN pin.
LBO (Pin 8): Low-Battery Detector Output. Open collector, can sink 10µA. A 1MΩ pull-up is recommended. Float
this pin if not used. The low-battery detector is disabled
when SHDN is low. LBO is high-Z in this state.
W
BLOCK DIAGRAM
VIN
6
VIN
R5
40k
R6
40k
+
SHDN
VC
gm
2
ERROR
AMPLIFIER
A1
+
SHUTDOWN
–
Q1
Q2
×10
LBI
–
R4
140k
NFB
LBO
8
–
200mV
A4
SW
COMPARATOR
–
1
VOUT
+
7
ENABLE
BIAS
R3
30k
RAMP
GENERATOR
R1
(EXTERNAL)
+
Σ
+
DRIVER
FF
A2
5
Q3
Q
R
+
S
+
NFB
R2
(EXTERNAL)
3
A=3
600kHz
OSCILLATOR
0.15Ω
–
4
GND
1614 BD
Figure 2. Block Diagram
5
LT1614
U
OPERATIO
The LT1614 combines a current mode, fixed frequency
PWM architecture with a –1.23V reference to directly
regulate negative outputs. Operation can be best understood by referring to the block diagram of Figure 2. Q1 and
Q2 form a bandgap reference core whose loop is closed
around the output of the converter. The driven reference
point is the lower end of resistor R4, which normally sits
at a voltage of –1.23V. As the load current changes, the
NFB pin voltage also changes slightly, driving the output
of gm amplifier A1. Switch current is regulated directly on
a cycle-to-cycle basis by A1’s output. The flip-flop is set at
the beginning of each cycle, turning on the switch. When
the summation of a signal representing switch current and
a ramp generator (introduced to avoid subharmonic oscillations at duty factors greater than 50%) exceeds the VC
signal, comparator A2 changes stage, resetting the flipflop and turning off the switch. Output voltage decreases
(the magnitude increases) as switch current is increased.
The output, attenuated by external resistor divider R1 and
R2, appears at the NFB pin, closing the overall loop.
Frequency compensation is provided externally by a series
RC connected from the VC pin to ground. Typical values
are 100k and 1nF. Transient response can be tailored by
adjustment of these values.
As load current is decreased, the switch turns on for a
shorter period each cycle. If the load current is further
decreased, the converter will skip cycles to maintain
output voltage regulation.
C2
1µF
L1
If D2 is replaced by an inductor, as shown in Figure 4, a
higher performance solution results. This converter topology was developed by Professor S. Cuk of the California
Institute of Technology in the 1970s. A low ripple voltage
results with this topology due to inductor L2 in series with
the output. Abrupt changes in output capacitor current are
eliminated because the output inductor delivers current to
the output during both the off-time and the on-time of the
LT1614 switch. With proper layout and high quality output
capacitors, output ripple can be as low as 1mVP–P.
The operation of Cuk’s topology is shown in Figures 5
and␣ 6. During the first switching phase, the LT1614’s
switch, represented by Q1, is on. There are two current
loops in operation. The first loop begins at input capacitor
C1, flows through L1, Q1 and back to C1. The second loop
flows from output capacitor C3, through L2, C2, Q1 and
back to C3. The output current from RLOAD is supplied by
L2 and C3. The voltage at node SW is VCESAT and at node
SWX the voltage is –(VIN + |VOUT|). Q1 must conduct both
L1 and L2 current. C2 functions as a voltage level shifter,
with an approximately constant voltage of (VIN + |VOUT|)
across it.
D2
C2
1µF
L1
L2
VIN
+
D1
VIN
C1
–VOUT
LT1614
R1
SHDN
NFB
VC
10Ok
GND
VIN
GND
C3
R2
10k
1nF
1614 F03
Figure 3. Direct Regulation of Negative Output
Using Boost Converter with Charge Pump
NFB
VC
10Ok
1nF
–VOUT
R1
SHDN
C3
R2
10k
SW
LT1614
C1
SHUTDOWN
+
SHUTDOWN
D1
+
SW
+
VIN
6
The LT1614 can work in either of two topologies. The
simpler topology appends a capacitive level shift to a
boost converter, generating a negative output voltage,
which is directly regulated. The circuit schematic is detailed in Figure 3. Only one inductor is required, and the
two diodes can be in a single SOT-23 package. Output
noise is the same as in a boost converter, because current
is delivered to the output only during the time when the
LT1614’s internal switch is on.
1614 F04
Figure 4. L2 Replaces D2 to Make Low Output Ripple
Inverting Topology. Coupled or Uncoupled Inductors Can
Be Used. Follow Phasing If Coupled for Best Results
LT1614
U
OPERATIO
When Q1 turns off during the second phase of switching,
the SWX node voltage abruptly increases to (VIN + |VOUT|).
The SW node voltage increases to VD (about 350mV). Now
current in the first loop, begining at C1, flows through L1,
C2, D1 and back to C1. Current in the second loop flows
from C3 through L2, D1 and back to C3. Load current
continues to be supplied by L2 and C3.
rents are dumped into the ground plane as drawn in
Figures 4, 5 and 6. This single layout technique can
virtually eliminate high frequency “spike” noise so often
present on switching regulator outputs.
Output ripple voltage appears as a triangular waveform
riding on VOUT. Ripple magnitude equals the ripple current
of L2 multiplied by the equivalent series resistance (ESR)
of output capacitor C3. Increasing the inductance of L1
and L2 lowers the ripple current, which leads to lower
output voltage ripple. Decreasing the ESR of C3, by using
ceramic or other low ESR type capacitors, lowers output
ripple voltage. Output ripple voltage can be reduced to
arbitrarily low levels by using large value inductors and
low ESR, high value capacitors.
An important layout issue arises due to the chopped
nature of the currents flowing in Q1 and D1. If they are both
tied directly to the ground plane before being combined,
switching noise will be introduced into the ground plane.
It is almost impossible to get rid of this noise, once present
in the ground plane. The solution is to tie D1’s cathode to
the ground pin of the LT1614 before the combined cur–(VIN + VOUT)
VCESAT
L1
SW
C2
L2
SWX
VIN
–VOUT
D1
Q1
+
C1
C3
RLOAD
+
1614 F05
Figure 5. Switch-On Phase of Inverting Converter. L1 and L2 Current Have Positive dI/dt
VIN + VOUT+ VD
L1
SW
VD
C2
L2
SWX
VIN
–VOUT
Q1
+
D1
C1
C3
RLOAD
+
1614 F06
Figure 6. Switch-Off Phase of Inverting Converter. L1 and L2 Current Have Negative dI/dt
7
LT1614
U
OPERATIO
Transient Response
The inverting architecture of the LT1614 can generate a
very low ripple output voltage. Recently available high
value ceramic capacitors can be used successfully in
LT1614 designs. The addition of a phase lead capacitor,
CPL, reduces output perturbations due to load steps when
lower value ceramic capacitors are used and connected in
parallel with feedback resistor R1. Figure 7 shows an
LT1614 inverting converter with resistor loads RL1 and
RL2. RL1 is connected across the output, while RL2 is
switched in externally via a pulse generator. Output voltage waveforms are pictured in subsequent figures, illustrating the performance of output capacitor type.
Figure 8 shows the output voltage with a 50mA to 200mA
load step, using an AVX TAJ “B” case 33µF tantalum
capacitor at the output. Output perturbation is approximately 250mV as the load changes from 50mA to 200mA.
Steady-state ripple voltage is 40mVP–P, due to L1’s ripple
current and C3’s ESR. Figure 9 pictures the output voltage
and switch pin voltage at 500ns per division. Note the
absence of high frequency spikes at the output. This is
easily repeatable with proper layout, described in the next
section.
In Figure 10, output capacitor C3 is replaced by a ceramic
unit. These large value capacitors have ESR of 2mΩ or less
and result in very low output ripple. A 1nF capacitor, CPL,
connected across R1 reduces output perburbation due to
load step. This keeps the output voltage within 5% of
steady-state value. Figure 11 pictures the output and
switch nodes at 500ns per division. Output ripple is about
5mVP-P. Again, good layout is essential to achieve this low
noise performance.
Layout
The LT1614 switches current at high speed, mandating
careful attention to layout for best performance. You will
not get advertised performance with careless layout. Figure␣ 12
shows recommended component placement. Follow this
closely in your printed circuit layout. The cut ground
copper at D1’s cathode is essential to obtain the low noise
achieved in Figures 10 and 11’s oscillographs. Input
bypass capacitor C1 should be placed close to the LT1614
as shown. The load should connect directly to output
capacitor C2 for best load regulation. You can tie the local
ground into the system ground plane at C3’s ground
terminal.
COMPONENT SELECTION
C2
1µF
L1
22µH
VIN
5V
Inductors
L2
22µH
D1
SHDN
+
R1
69.8k
LT1614
C1
CPL
1nF
NFB
VC
GND
RC
–VOUT
SW
RL1
100Ω
C3
R2
24.9k
RL2
33Ω
+
VIN
CC
C1: AVX TAJB226M010
C2: TAIYO YUDEN LMK212BJ105MG
C3: AVX TAJB336M006 OR MURATA (SEE TEXT)
D1: MBR0520
L1, L2: MURATA LQH3C220
Figure 7. Switching RL2 Provides 50mA to 200mA
Load Step for LT1614 5V to – 5V Converter
8
1614 F07
Each of the two inductors used with the LT1614 should
have a saturation current rating (where inductance is
approximately 70% of zero current inductance) of approximately 0.4A or greater. If the device is used in
“charge pump” mode, where there is only one inductor,
then its rating should be 0.75A or greater. DCR of the
inductors should be 0.4Ω or less. 22µH inductors are
called out in the applications schematics because these
Murata units are physically small and inexpensive. Increasing the inductance will lower ripple current, increasing available output current. A coupled inductor of 33µH,
such as Coiltronics CTX33-2, will provide 290mA at – 5V
from a 5V input. Inductance can be reduced if operating
from a supply voltage below 3V. Table 1 lists several
inductors that will work with the LT1614, although this is
not an exhaustive list. There are many magnetics vendors
whose components are suitable.
LT1614
U
OPERATIO
VOUT
100mV/DIV
AC COUPLED
ILOAD
VOUT
20mV/DIV
AC COUPLED
VSW
5V/DIV
200mA
50mA
500µs/DIV
500ns/DIV
1614 F08
Figure 8. Load Step Response of LT1614
with 33µF Tantalum Output Capacitor
Figure 9. 33µF “B” Case Tantalum Capacitor Has ESR Resulting
in 40mVP-P Voltage Ripple at Output with 200mA Load
VOUT
100mV/DIV
AC COUPLED
VOUT
10mV/DIV
AC COUPLED
200mA
VSW
5V/DIV
ILOAD
1614 F09
50mA
500µs/DIV
500ns/DIV
1614 F10
Figure 10. Replacing C3 with 22µF Ceramic Capacitor
Lowers Output Voltage Ripple. 1nF Phase-Lead Capacitor
in Parallel with R1 Lowers Transient Excursion
1614 F11
Figure 11. 22µF Ceramic Capacitor at
Output Reduces Output Ripple Voltage
C1
+
SHUTDOWN
R1
R2
RC
CC
1
8
2
7
3
6
4
5
VIN
L1
D1
+
GND
C3
C2
1614 F12
L2
VOUT
Figure 12. Suggested Component Placement. Note: Cut in Ground Copper at D1’s Cathode
9
LT1614
U
OPERATIO
Capacitors
As described previously, ceramic capacitors can be used
with the LT1614. For lower cost applications, small tantalum units can be used. A value of 22µF is acceptable,
although larger capacitance values can be used. ESR is the
most important parameter in selecting an output capacitor. The “flying” capacitor (C2 in the schematic figures)
should be a 1µF ceramic type. An X5R or X7R dielectric
should be used to avoid capacitance decreasing severely
with applied voltage. The input bypass capacitor is less
critical, and either tantalum or ceramic can be used with
little trade-off in circuit performance. Some capacitor
types appropriate for use with the LT1614 are listed in
Table 2.
Diodes
A Schottky diode is recommended for use with the LT1614.
The Motorola MBR0520 is a very good choice. Where the
input to output voltage differential exceeds 20V, use the
MBR0530 ( a 30V diode).
Table 1. Inductor Vendors
VENDOR
PHONE
URL
PART
COMMENT
Sumida
(847) 956-0666
www.sumida.com
CLS62-22022
CD43-470
22µH Coupled
47µH
Murata
(404) 436-1300
www.murata.com
LQH3C-220
22µH, 2mm Height
Coiltronics
(407) 241-7876
www.coiltronics.com
CTX20-1
20µH Coupled, Low DCR
Table 2. Capacitor Vendors
10
VENDOR
PHONE
URL
PART
COMMENT
Taiyo Yuden
(408) 573-4150
www.t-yuden.com
Ceramic Caps
X5R Dielectric
AVX
(803) 448-9411
www.avxcorp.com
Ceramic Caps
Tantalum Caps
Murata
(404) 436-1300
www.murata.com
Ceramic Caps
LT1614
U
U
W
U
APPLICATIONS INFORMATION
Shutdown Pin
3.3V
R1
The LT1614 has a Shutdown pin (SHDN) that must be
grounded to shut the device down or tied to a voltage equal
or greater than VIN to operate. The shutdown circuit is
shown in Figure 13.
VIN
LBI
LT1614
1M
+
LBO
R2
100k
–
200mV
INTERNAL
REFERENCE
GND
Note that allowing SHDN to float turns on both the startup current (Q2) and the shutdown current (Q3) for VIN >
2VBE. The LT1614 doesn’t know what to do in this situation
and behaves erratically. SHDN voltage above VIN is allowed. This merely reverse-biases Q3’s base emitter junction, a benign condition. The low-battery detector is disabled when SHDN is low.
VLB – 200mV
2µA
Figure 14. Setting Low-Battery Detector Trip Point
200k
VIN
2N3906
Q3
SHDN
R1 =
1614 F14
VIN
R2
400k
TO PROCESSOR
LBO
LT1614
VREF
200mV
SHUTDOWN
CURRENT
10k
200k
LBI
+
GND
10µF
1614 F15
START-UP
CURRENT
Figure 15. Accessing 200mV Reference
Q2
Q1
Figure 13. Shutdown Circuit
Low-Battery Detector
The LT1614’s low-battery detector is a simple PNP input
gain stage with an open collector NPN output. The negative input of the gain stage is tied internally to a 200mV
reference. The positive input is the LBI pin. Arrangement
as a low-battery detector is straightforward. Figure 14
details hookup. R1 and R2 need only be low enough in
value so that the bias current of the LBI pin doesn’t cause
large errors. For R2, 100k is adequate. The 200mV reference can also be accessed as shown in Figure 15. The lowbattery detect is not operative when the device is shut
down.
Coupled Inductors
The applications shown in this data sheet use two uncoupled inductors because the Murata units specified are
small and inexpensive. This topology can also be used
with a coupled inductor as shown in Figure 16. Be sure to
get the phasing right.
L1A
10µH
VIN
5V
+
VIN
C1
33µF
100k
C3
1µF
•
•
L1B
10µH
VOUT
– 5V
200mA
SW
SHDN
LT1614
VC
NFB
GND
69.8k
D1
24.9k
+
1614 F13
C2
33µF
1nF
C1, C2: AVX TAJB336M010
C3: AVX 1206CY106
D1: MBR0520
L1: COILTRONICS CTX10-1
1614 F16
Figure 16. 5V to – 5V Converter with Coupled Inductor
11
LT1614
U
TYPICAL APPLICATIO S
5V to – 15V/80mA DC/DC Converter
C1
1µF
L1
22µH
VIN
+
100k
VOUT
–15V
80mA
SW
SHDN
LT1614
NFB
VC
22µF
L2
22µH
GND
255k
D1
+
VIN
5V
24.9k
10µF
25V
1nF
C1: 25V, Y5V
D1: MBR0520
L1, L2: MURATA LQH3C220
1614 TA05
5V to – 15V Converter Efficiency
80
EFFICIENCY (%)
75
70
65
60
55
50
1
10
LOAD CURRENT (mA)
100
1614 TA06
12
LT1614
U
TYPICAL APPLICATIO S
3.3V to – 3.1V/200mA DC/DC Converter
C1
1µF
L1
22µH
VIN
22µF
100k
VOUT
– 3.1V
200mA
SW
SHDN
LT1614
VC
+
L2
22µH
GND
18.7k
D1
FB
22µF
+
VIN
3.3V
12.7k
1nF
C1: AVX1206CY106
D1: MBR0520
L1, L2: MURATA LQH3C220
1614 TA03
3.3V to – 3.1V Converter Efficiency
80
EFFICIENCY (%)
70
60
50
40
30
20
3
10
30
100
LOAD CURRENT (mA)
300
1614 TA04
13
LT1614
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.040 ± 0.006
(1.02 ± 0.15)
0.007
(0.18)
0.034 ± 0.004
(0.86 ± 0.102)
8
7 6
5
0° – 6° TYP
0.021 ± 0.006
(0.53 ± 0.015)
SEATING
PLANE 0.012
(0.30)
0.0256
REF
(0.65)
BSC
0.006 ± 0.004
(0.15 ± 0.102)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
14
0.118 ± 0.004*
(3.00 ± 0.102)
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
MSOP (MS8) 1098
1
2 3
4
LT1614
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2
3
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SO8 1298
15
LT1614
U
TYPICAL APPLICATIO S
5V to – 5V Converter Uses All Ceramic Capacitors
C3
1µF
L1
22µH
VIN
3V TO 5V
VIN
100k
VOUT
– 5V
200mA
SW
SHDN
LT1614
VC
NFB
GND
C1
4.7µF
L2
22µH
1nF
69.8k
D1
C2
10µF
24.9k
1nF
C1: TAIYO YUDEN LMK316BJ475ML
C2: TAIYO YUDEN JMK316BJ106ML
C3: TAIYO YUDEN EMK316BJ105MF
D1: MOTOROLA MBR0520
L1, L2: MURATA LQH3C220 OR SUMIDA CD43-220
1614 TA07
Efficiency vs Load Current
80
VIN = 3V
VOUT = –5V
75
EFFICIENCY (%)
70
65
60
55
50
45
40
1
10
LOAD CURRENT (mA)
100
1614 TA08
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1.2MHz Boost DC/DC Converter in 5-Lead SOT-23
5V at 480mA from 3.3V Input, VOUT Up to 34V
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–5V at 350mA from 5V Input, 1mVP-P Output Ripple
16
Linear Technology Corporation
sn1614 1614fs LT/TP 1000 4K • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 1998