ETC ANRG08SC

ANRG08
8-Ch Auto Sensitivity Calibration Capacitive Touch Sensor
SPECIFICATION V2.1
작성
JUNE, 2011
Confidential
검토
팀장
Marketing
QA
Approval
ADSemiconductor
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
 Revision History
Rev.
1.0
2.0
2.1
Description of change
Initial Release
Initial BF time option
To change chip ID by using OTPROM
24 SOP, 24 QFN(Full lead type) 추가
Sensing Channels : CS0 – CS7 → CS1 – CS8
Parallel output ports : D0 – D7 → D1 – D8
Marking description 추가 : 16 TSSOP, 24 SOP, 24 QFN type
package
Recommended Circuit Diagram : CS Pin 에 Rs 직렬저항 추가
Date
Originator
10.09.29
KD PARK
10.12.03
KD PARK
11.06.09
JY SONG
ADSemiconductor Confidential
1 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
1. Specification
1.1 General Feature









8-Channel capacitive sensor with auto sensitivity calibration
Available LED PWM drive up to 8 (ANRG08FB, ANRG08SC, ANRG08QL)
2
Multi interface - I C serial interface / Parallel outputs (ANRG08FB, ANRG08SC, ANRG08QL)
Selectable output operation mode (Single output / Multi output)
Adjustable 256 steps sensitivity
Almost no external component needed
Low current consumption
Embedded common and normal noise elimination circuit
RoHS compliant 16 TSSOP, 24 MLF(Punch type), 24 SOP, 24 QFN(Full lead type) package
1.2 Application





Home appliances (TV, Monitor keypads)
Mobile applications (PMP, MP3, Car navigation)
Membrane switch replacement
Sealed control panels, keypads
Touch screen replacement application
ADSemiconductor Confidential
2 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
1.3 Packages
ANRG08FB (24MLF)
ANRG08TA (16TSSOP)
ANRG08SC (24SOP)
ANRG08QL (24QFN)
※ Drawings not to scale
ADSemiconductor Confidential
3 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
2 Pin Description
VDD, GND
Supply voltage and ground pin.
R.N.D
Radio frequency Noise Detection pin. Normally, R.N.D pin does not connect to anywhere.
But, in radio frequency noise environment, this pin must form a pattern line on PCB.
CS1~CS8
Capacitive sensor input pins.
VPP
VPP is external supply voltage for OTP writing.
D1~D8
Parallel output ports of CS1~CS8 respectively / LED PWM drive output ports. The structure of these
parallel output ports is open drain NMOS for active low output level operation.
SCL, SDA
2
2
SCL is I C clock input pin and SDA is I C data input-output pin. These ports have internal pull-up resistor.
In case of not use, this pin must be not connected to any circuitry.
INT
Touch sensing interrupt output pin.
LDO
LDO on-off control output pin.
ADSemiconductor Confidential
4 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
2.1 ANRG08TA (16 TSSOP package)
Pin No.
Name
I/O
1
2
3
4
5
6
7
CS2
CS3
CS4
CS5
CS6
CS7
SCL
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
8
SDA
Capacitive sensor input 2
Capacitive sensor input 3
Capacitive sensor input 4
Capacitive sensor input 5
Capacitive sensor input 6
Capacitive sensor input 7
2
I C clock input
2
I C data input-output
Open drain NMOS structure
Supply ground
Radio frequency Noise Detection pin
VDD/GND
9
GND
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Digital Input
Digital
Input / Output
Ground
10
R.N.D
Analog Input
11
12
N.C.
N.C.
-
13
INT
Digital Output
14
15
16
VPP
VDD
CS1
Power
Power
Analog Input
Description
No Connection
No Connection
Touch sensing interrupt output
Open drain NMOS structure
External OTP writing Power (11.5V~12.5V)
Power (3.0V~5.5V)
Capacitive sensor input 1
ADSemiconductor Confidential
Protection
VDD/GND
VDD
VDD/GND
GND
GND
VDD/GND
5 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
2.2 ANRG08FB (24 MLF package)
Pin No.
Name
I/O
Description
1
2
3
4
5
6
CS4
CS5
CS6
CS7
CS8
SCL
SDA
8
9
GND
R.N.D
Capacitive sensor input 4
Capacitive sensor input 5
Capacitive sensor input 6
Capacitive sensor input 7
Capacitive sensor input 8
2
I C clock input
2
I C data input-output
Open drain NMOS structure
Supply ground
Radio frequency Noise Detection pin
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
7
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Digital Input
Digital
Input / Output
Ground
Analog Input
10
LDO
Digital Output
LDO on-off control output
VDD/GND
Parallel output of CS1
LED PWM drive output1
Open drain NMOS structure
Parallel output of CS2
LED PWM drive output2
Open drain NMOS structure
Parallel output of CS3
LED PWM drive output3
Open drain NMOS structure
Parallel output of CS4
LED PWM drive output4
Open drain NMOS structure
Parallel output of CS5
LED PWM drive output5
Open drain NMOS structure
Parallel output of CS6
LED PWM drive output6
Open drain NMOS structure
Parallel output of CS7
LED PWM drive output7
Open drain NMOS structure
Parallel output of CS8
LED PWM drive output8
Open drain NMOS structure
External OTP writing Power (11.5V~12.5V)
Touch sensing interrupt output
Open drain NMOS structure
Power (3.0V~5.5V)
Protection
VDD/GND
VDD
VDD/GND
11
D1
Digital Output
12
D2
Digital Output
13
D3
Digital Output
14
D4
Digital Output
15
D5
Digital Output
16
D6
Digital Output
17
D7
Digital Output
18
D8
Digital Output
19
VPP
Power
20
INT
Digital Output
21
VDD
Power
22
CS1
Analog Input
Capacitive sensor input 1
VDD/GND
23
24
CS2
CS3
Analog Input
Analog Input
Capacitive sensor input 2
Capacitive sensor input 3
VDD/GND
VDD/GND
ADSemiconductor Confidential
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
GND
VDD/GND
GND
6 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
2.3 ANRG08SC (24 SOP package)
Pin No.
Name
I/O
1
2
3
4
CS6
CS7
CS8
SCL
5
SDA
6
7
GND
R.N.D
Analog Input
Analog Input
Analog Input
Digital Input
Digital
Input / Output
Ground
Analog Input
8
D1
Digital Output
9
D2
Digital Output
10
D3
Digital Output
11
D4
Digital Output
12
D5
Digital Output
13
D6
Digital Output
14
D7
Digital Output
15
D8
Digital Output
16
VPP
Power
17
INT
Digital Output
18
VDD
Power
19
CS1
20
21
Description
Protection
Capacitive sensor input 6
Capacitive sensor input 7
Capacitive sensor input 8
2
I C clock input
2
I C data input-output
Open drain NMOS structure
Supply ground
Radio frequency Noise Detection pin
Parallel output of CS1
LED PWM drive output1
Open drain NMOS structure
Parallel output of CS2
LED PWM drive output2
Open drain NMOS structure
Parallel output of CS3
LED PWM drive output3
Open drain NMOS structure
Parallel output of CS4
LED PWM drive output4
Open drain NMOS structure
Parallel output of CS5
LED PWM drive output5
Open drain NMOS structure
Parallel output of CS6
LED PWM drive output6
Open drain NMOS structure
Parallel output of CS7
LED PWM drive output7
Open drain NMOS structure
Parallel output of CS8
LED PWM drive output8
Open drain NMOS structure
External OTP writing Power (11.5V~12.5V)
Touch sensing interrupt output
Open drain NMOS structure
Power (3.0V~5.5V)
VDD/GND
VDD/GND
VDD/GND
VDD/GND
Analog Input
Capacitive sensor input 1
VDD/GND
CS2
Analog Input
Capacitive sensor input 2
VDD/GND
CS3
Analog Input
Capacitive sensor input 3
VDD/GND
22
CS4
Analog Input
Capacitive sensor input 4
VDD/GND
23
N.C.
-
24
CS5
Analog Input
No Connection
VDD/GND
VDD
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
GND
VDD/GND
GND
-
Capacitive sensor input 5
ADSemiconductor Confidential
VDD/GND
7 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
2.4 ANRG08QL (24 QFN package)
Pin No.
Name
I/O
Description
1
2
3
4
5
6
CS4
CS5
CS6
CS7
CS8
SCL
SDA
8
9
GND
R.N.D
Capacitive sensor input 4
Capacitive sensor input 5
Capacitive sensor input 6
Capacitive sensor input 7
Capacitive sensor input 8
2
I C clock input
2
I C data input-output
Open drain NMOS structure
Supply ground
Radio frequency Noise Detection pin
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
7
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Digital Input
Digital
Input / Output
Ground
Analog Input
10
LDO
Digital Output
LDO on-off control output
VDD/GND
Parallel output of CS1
LED PWM drive output1
Open drain NMOS structure
Parallel output of CS2
LED PWM drive output2
Open drain NMOS structure
Parallel output of CS3
LED PWM drive output3
Open drain NMOS structure
Parallel output of CS4
LED PWM drive output4
Open drain NMOS structure
Parallel output of CS5
LED PWM drive output5
Open drain NMOS structure
Parallel output of CS6
LED PWM drive output6
Open drain NMOS structure
Parallel output of CS7
LED PWM drive output7
Open drain NMOS structure
Parallel output of CS8
LED PWM drive output8
Open drain NMOS structure
External OTP writing Power (11.5V~12.5V)
Touch sensing interrupt output
Open drain NMOS structure
Power (3.0V~5.5V)
Protection
VDD/GND
VDD
VDD/GND
11
D1
Digital Output
12
D2
Digital Output
13
D3
Digital Output
14
D4
Digital Output
15
D5
Digital Output
16
D6
Digital Output
17
D7
Digital Output
18
D8
Digital Output
19
VPP
Power
20
INT
Digital Output
21
VDD
Power
22
CS1
Analog Input
Capacitive sensor input 1
VDD/GND
23
24
CS2
CS3
Analog Input
Analog Input
Capacitive sensor input 2
Capacitive sensor input 3
VDD/GND
VDD/GND
ADSemiconductor Confidential
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
VDD/GND
GND
VDD/GND
GND
8 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
3 Absolute Maximum Rating
Battery supply voltage
6V
Maximum voltage on any pin VDD+0.3
Maximum current on any PAD 100mA
Power Dissipation
800mW
Storage Temperature
-50 ~ 150℃
Operating Temperature
-20 ~ 75℃
Junction Temperature
150℃
Note : Unless any other command is noted, all above are operated in normal temperature.
4 ESD & Latch-up Characteristics
4.1 ESD Characteristics
Mode
H.B.M
M.M
C.D.M
Polarity
Max
Reference
8000V
VDD
8000V
VSS
8000V
P to P
500V
VDD
500V
VSS
500V
P to P
1000V
Field Induced Charge
Polarity
Max
Reference
Positive
100mA
Negative
-100mA
Positive
8.5V
Pos / Neg
Pos / Neg
-
4.2 Latch-up Characteristics
Mode
I Test
V supply over 5.0V
JESD78A
ADSemiconductor Confidential
9 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
5 Electrical Characteristics
▪ Note : VDD=3.3V, Typical system frequency (Unless otherwise noted), TA = 25℃
Characteristics
Symbol
Test Condition
Min
Power supply requirement and current consumption
Operating voltage
VDD
3.0
OTP writing voltage
VPP
11.5
VDD =
Current consumption
IDD
Standby state @10MHz
3.3V
Reset and input level
Internal reset voltage
VDD_RST
TA = 25℃
Input high level
VIH
| IIH | ≤ +5μA
VDD*0.6
Input low level
VIL
| IIL | ≤ +5μA
–0.3
Slow calibration speed
Self calibration time after
TCAL
Normal calibration speed
system reset
Fast calibration speed
Internal P/U resister of
RP/U
SDA, SCL, INT and LDO
Touch sensing performance
Minimum detective
ΔCMIN
0.1
capacitance difference
Sense input
CS
1
capacitance range
ΔC > ΔCMIN
Output impedance
Zo
(open drain)
ΔC < ΔCMIN
System performance
Max. output current
IOUT
Per unit drive output port
(LED drive current)
2
LED PWM control
NPWM
3
Sensitivity control
2
Max. I C SCL clock speed
Touch expired time
LDO control output high
level
LDO control output low
level
Typ
Max
Units
12
5.5
12.5
V
V
0.75
-
㎃
-
V
V
V
2.6
VDD+0.3
VDD*0.3
100
80
60
-
msec
30
-
kΩ
-
-
㎊
-
50
㎊
12
30M
-
Ω
-
8.0
㎃
16
256
-
step
step
-
30
2
-
MHz
sec
VOH
VDD*0.9
-
-
V
VOL
-
-
VDD*0.1
V
fSCL_MAX
TEX
2
Maximum internal I C clock
Normal calibration speed
1
The sensitivity can be decreased with higher parallel capacitance of CS pin including parasitic capacitance made by
neighbor GND or other pattern. The series resistor(under 1kΩ) of CS can be used in noisy condition to avoid mal-function
from external surge and ESD.
2
Refer to the chapter 8.2.12. LED luminance control register
3
Refer to the chapter 8.2.9. Sensitivity register
ADSemiconductor Confidential
10 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
6 ANRG08 Implementation
6.1 Typical current consumption
ANRG08 uses internal bias circuit, so internal clock frequency and current consumption is fixed
and no external bias circuit is needed. Internal clock frequency and calibration speed can be
2
4
changed by I C register setting . Faster calibration speed needs more current consumption than
normal or slower calibration speed. Slow calibration speed isn’t recommended if it has not
problem of current consumption.
Internal bias circuit can make the circuit design simple and reduce external components.
6.2 CS implementation
ANRG08 has 256 step selections of sensitivity and internal surge protection resister. Sensitivity
of each sensing channel (CS) can be independently controlled on others. External components
of CS pin such as series resistor or parallel capacitor isn’t necessary. The parallel parasitic
capacitance of CS pins caused by touch line, touch pad and neighbor GND or other pattern
may affect sensitivity. The sensitivity will be decreased when bigger parallel parasitic
capacitance of CS pin is added.
Parallel capacitor (CS1~S8) of CS pin is useful in case of detail sensitivity mediation is required
such as for complementation sensitivity difference between channels. Same as above parallel
parasitic capacitance, sensitivity will be decreased when a big value of parallel capacitor
(CS1~S8) is used. Under 50pF capacitor can be used as sensitivity meditation capacitor and a
few pF is usually used. The RS, serial connection resistor of CS pins, may be used to avoid
mal-function from external surge and ESD. (It might be optional.) From 200Ω to 1kΩ is
recommended for RS. Refer to below CS pins application figure.
RS8
CS8<<
Touch PAD8
CS8
RS1
CS1<<
Touch PAD1
CS1
4
Refer to 8.2.5 Clock control register.
ADSemiconductor Confidential
11 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
The ANRG08 has eight independent touch sensor input from CS1 to CS8. The internal touch
decision process of each channel is separated from others. Therefore eight channel touch key
board application can be designed by using only one ANRG08 without coupling problems.
The size and shape of PAD might have influence on the sensitivity. The sensitivity will be optimal
when the size of PAD is approximately an half of the first knuckle (it’s about 10 ㎜ｘ 7 ㎜). The
connection line of CS to touch PAD is recommended to be routed as short as possible to
prevent from abnormal touch detect caused by connection line. The unused CS pin should not
be connected with the ground.
6.3 LED drive implementation (ANRG08FB, ANRG08SC, ANRG08QL)
ANRG08 has a function to control the LED using D1~D8 ports. For using D1~D8 as LED driver
5
ports, LEDs and resisters must be equipped as below figure, and write the ‘port_mode” register
6
as ‘1’. D1 ~ D8 ports can drive LEDs by ‘PWM_ctrlx’ register control. ANRG08 can drive up to 8
LED as below method.
VDD
VDD
LED1
LED8
RD1
RD8
D1 <<
D8 <<
6.4 Parallel output (D1~D8 implementation, ANRG08FB, ANRG08SC,
ANRG08QL)
ANRG08 acts as active low parallel output mode. Structures of D1~D8 are same. In case of
active low parallel output mode, parallel output ports (D1~D8) have an open drain NMOS
structure. For this reason, the parallel output mode of ANRG08 needs ROUT as below figures.
The maximum output drive current is 8mA, so over a few kΩ must be used as ROUT. Normally
10kΩ is used as ROUT.
5
6
Refer to the chapter 8.2.13. Port mode control register
Refer to the chapter 8.2.12. LED luminance control register
ADSemiconductor Confidential
12 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
VDD
ROUT1
ROUT2
OUTPUT1
D1
OUTPUT2
D2
ROUT8
OUTPUT8
D8
Active low parallel output mode circuit
6.5 INT (Interrupt output) Implementation
An INT pin is for the touch sensing interrupt output. The interrupt pulse is generated only during
short period of every each channel touch start point and touch end point. Interrupt pulse has
logical low level. INT has NMOS open drain structure and internal pull-up resister of which value
is 30kΩ typical.
6.6 LDO implementation (ANRG08FB, ANRG08QL)
LDO pin acts as LDO on-off control output pin. Because of internal pull-up resister of LDO,
external pull-up resister can be removed. Writing ‘1’ on ‘micom_sleep’ bit of ‘global_ctrl0’
7
register make LDO output low. This low LDO output can be used as LDO which offers MCU
power off signal. Any touch output writes ‘0’ on ‘micom_sleep’ bit of ‘global_ctrl0’ register, and
LDO output level becomes high again.
7
Refer to the chapter 8.2.2. Global option control 0.
ADSemiconductor Confidential
13 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
6.7 Change initial reset register values (OTP writing)
ANRG08 has eight integrated OTP (One Time Programmable) ROM cells. So, initial reset register
values can be rewritten up to eight times. One OTP ROM cell size is 64-byte. User can write the
data eight times to the OTP.
There are three operation modes about OTP read/write. These are automatically load operation
mode, writing operation mode and reading operation mode.
Automatically load operation mode
After power reset, ANRG08 start to read the LSB of 00H address in each OTP ROM cells from
8th to 1st. ANRG08 automatically loads the data of the first OTP ROM cell of which LSB of 00H
address has ‘0’ into the control register. And then ANRG08 is starting to work with control
register values that are loaded from OTP ROM cell. If there are no OTP ROM cell which has ‘0’ in
LSB of 00H address, ANRG08 is working with initial control register value.
Writing operation mode
OTP ROM cell writing provides the flexible reset register values that control all the operation
options of ANRG08. So, additional communication programs on MCU for operation option
select or register value setting are not required.
8
There are two writing operation modes. When the ‘write_all’ bit of ‘mtp_cmd’ register is ‘0’,
single byte writing mode is activated. User can select OTP ROM cell and address on which new
register value is wanted to be written. OTP ROM cell selection is enabled by writing ‘mtp_sel_en’
9
bit of ‘usr_mtp_sel’ register ‘1’. When ‘mtp_sel_en’ bit of ‘usr_mtp_sel’ register is ‘0’, OTM ROM
cell is automatically selected from 1st to 8th. And, ‘org_usr_mtp_sel’ bits of ‘usr_mtp_sel’
register are for the OTP ROM selection. Read or write command register is ‘mtp_cmd’ registers
and user can start writing by ‘wr_start’ bit of ‘mtp_cmd’ register setting as ‘1’. This ‘wr_start’ bit
of ‘mtp_cmd’ register is recovered as ‘0’ at ending of writing.
When the ‘write_all’ bit of ‘mtp_cmd’ register is ‘1’, all bytes writing operation mode is activated.
User can write all register frame data on selected OTP ROM cell. At this writing operation mode,
only OTP ROM cell has to be selected. Writing start is same as single byte writing mode.
OTP ROM writing needs another 11.5V power supply voltage. VPP pin is for this writing 11.5V
power.
Reading operation mode
When OTP ROM data is required to be read, user can read all the OTP ROM cell date by reading
operation. When the ‘read_all’ bit of ‘mtp_cmd’ register is ‘0’, user can read one byte data that
is written on selected address of selected OTP ROM cell. OTP ROM cell and address selection
are same as single byte writing operation mode. When ‘mtp_sel_en’ bit of ‘usr_mtp_sel’ register
is ‘0’, OTM ROM cell is automatically selected from 8th to 1st.
When the ‘read_all’ bit of ‘mtp_cmd’ register is ‘1’, user can read all data on selected OTP ROM
cell.
OTP ROM read start command bit is ‘rd_start’ bit of ‘mtp_cmd’ register. When the ‘rd_start’ bit
of ‘mtp_cmd’ register is ‘1’, ANRG08 starts to read. This ‘rd_start’ bit of ‘mtp_cmd’ register is
recovered as ‘0’ at ending of reading.
8
9
Refer to the chapter 8.2.18. OTP ROM control register.
Refer to the chapter 8.2.17. OTP ROM cell select register.
ADSemiconductor Confidential
14 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
6.8 SCL, SDA implementation
2
2
SCL is I C clock input and SDA is I C data input-output. These ports have internal pull-up
resistor. SCL has Schmitt trigger input structure to prevent clock signal from being broken.
2
Maximum supported I C clock frequency is 2MHz. SDA has NMOS open drain structure and
internal pull-up resister of which value is 30kΩ typical. So, according to communication speed
a few kΩ resister must be used as pull-up resister for proper data pulse rising time. For more
2
details refer to ‘Chapter 7. I C Interface’.
ADSemiconductor Confidential
15 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
7 I2C Interface
7.1 I2C Enable / Disable
2
If the SDA or SCL signal goes to low, I C control block is enabled automatically. And if the SDA
2
and SCL signal maintain high during about 2 us, I C control block is disabled automatically also.
7.2 Start & stop condition
 Start Condition (S)
 Stop Condition (P)
 Repeated Start (Sr)
7.3 Data validity
The SDA should be stable when the SCL is high and the SDA can be changed when the SCL is
low.
7.4 Byte format
The byte structure is composed with 8Bit data and an acknowledge signal.
ADSemiconductor Confidential
16 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
7.5 Acknowledge
It is a check bit whether the receiver gets the data from the transmitter without error or not. The
receiver will write ‘0’ when it received the data successfully and ‘1’ if not.
7.6 First byte
7.6.1 Slave address
It is the first byte from the start condition. It is used to access the slave device. The initial chip
2
address of ANRG08 is ‘48’ hex number and the chip address is possible to change with “I C
10
Address of ANRG08” register .
─
7.6.2 R/W
The direction of data is decided by the bit and it follows the address data.
MSB
10
LSB
─
Address
R/W
7 bit
1bit
Refer to the chapter 8.2.3. I2C address of ANRG08.
ADSemiconductor Confidential
17 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
7.7 Transferring data
7.7.1 Write operation
The
1.
2.
3.
4.
5.
byte sequence is as follows:
The first byte gives the device address plus the direction bit (R/W = 0).
The second byte contains the internal address of the first register to be accessed.
The next byte is written in the internal register. Following bytes are written in successive
internal registers.
The transfer lasts until stop conditions are encountered.
The ANRG08 acknowledges every byte transfer.
7.7.2 Read operation
The address of the first register to read is programmed in a write operation without data, and
terminated by the stop condition. Then, another start is followed by the device address and
R/W= 1. All following bytes are now data to be read at successive positions starting from the
initial address.
7.7.3 Read/Write Operation
ADSemiconductor Confidential
18 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
7.8 I2C write and read operations in normal mode
2
The following figure represents the I C normal mode write and read registers.
☞ Write register 0x00 to 0x01 with data AA and BB
Start
Device
Address 0x48
ACK
Register
Address 0x00
ACK
Data AA
ACK
Data BB
ACK
Stop
Read register 0x00 and 0x01
Start
Device
Address 0x48
ACK
Register
Address 0x00
ACK
Start
Device
Address 0x49
ACK
Data Read AA
ACK
From Master to Slave
Stop
Data Read BB
ACK
Stop
From Slave to Master
ADSemiconductor Confidential
19 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8 ANRG08 Control Register List
2
 Note: The unused bits (defined as reserved) in I C registers must be kept to zero.
 Note: The reset value of ANRG08 can be changed by MTP ROM writing.
8.1 I2C Register Map
Name
ch_enable
/soft_rst
Addr.
(Hex)
01H
Reset
Bit name of each bytes
Value
(Bin)
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1111 1111
ch8_en
ch7_en
ch6_en
ch5_en
ch4_en
ch3_en
ch2_en
ch1_en
1
-
-
-
micom_sleep
-
-
global_ctrl0
05H
1--- 0---
i2c_id
06H
0100 1000
-
i2c_id
o_ch8
o_ch7
o_ch6
wr_bit
output
2AH
0000 0000
clock_ctrl
34H
0000 0110
global_ctrl1
36H
0100 1100
state_count
37H
0101 1111
0
1
global_ctrl2
38H
0001 11-0
imp_sel
sin_multi_mode
sensitivity1
39H
0001 1100
sensitivity01
sensitivity2
3AH
0001 1100
sensitivity02
sensitivity3
3BH
0001 1100
sensitivity03
sensitivity4
3CH
0001 1100
sensitivity04
sensitivity5
3DH
0001 1100
sensitivity05
sensitivity6
3EH
0001 1100
sensitivity06
sensitivity7
3FH
0001 1100
sensitivity07
sensitivity8
40H
0001 1100
cal_speed
41H
0000 0000
rnd_bf_up
rnd_bf_down
sen_bf_up
sen_bf_down
cal_BS_speed
42H
0000 0000
rnd_bs_up
rnd_bs_down
sen_bs_up
sen_bs_down
PWM_ctrl1
43H
0000 0000
pwm_d2
pwm_d1
PWM_ctrl2
44H
0000 0000
pwm_d4
pwm_d3
PWM_ctrl3
45H
0000 0000
pwm_d6
pwm_d5
PWM_ctrl4
46H
0000 0000
pwm_d8
port_mode
4FH
0000 0000
rd_ch_H1
50H
0000 0000
init_cal_opt
o_ch5
o_ch4
sts_clr_en
response_off_ctrl
o_ch3
o_ch2
clk_sel
response_ctrl
0
o_ch1
rb_sel
bf_mode
software_rst
-
clk_off
cal_pre_scaler
cal_hold_time
sensitivity08
pmod_d8
pmod_d7
pwm_d7
pmod_d6
pmod_d5
pmod_d4
pmod_d3
pmod_d2
pmod_d1
-
-
rd_ch_L1
rd_ch_H1
rd_ch_L1
51H
---- ---0
Percent_H
52H
0000 0000
-
-
-
touch_percent[24:17]
-
-
Percent_M
53H
0000 0000
touch_percent[16:9]
Percent_L
54H
0000 0000
touch_percent[8:1]
rd_ch_H2
56H
0000 0000
rd_ch_L2
57H
---- ---0
RAM_ctrl
59H
---- 00r0
rd_ch_H2
-
-
-
-
-
clk_mtp_opt
RAM_data
5AH
0000 0000
usr_mtp_sel
5BH
0000 0000
0
0
0
mtp_sel_en
mtp_cmd
5CH
0000 0000
0
0
write_all
read_all
mtp_status
5DH
---- ----
0
-
rd_ch_L2
ram_chk_end
ram_chk_start
ram_check_data
org_usr_mtp_sel
0
org_mtp_sel
otp_add_sel
5EH
0000 0000
otp_wr_data
5FH
0000 0000
0
otp_wr_data
otp_rd_data
60H
---- ----
otp_rd_data
0
wr_start
rd_start
wr_done_sts
rd_done_sts
no_load_sts
otp_add_sel
ADSemiconductor Confidential
20 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2 Details
8.2.1 Channel enable / reset register
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
01h
ch_enable
/soft_rst
ch8_en
ch7_en
ch6_en
ch5_en
ch4_en
ch3_en
ch2_en
ch1_en
Description
Enable, disable and reset of each channel control register.
Bit name
Reset value
chx_en
1
Function
Channel enable / disable and Channel reset (chx_en is control bit for CSx channel)
0 : Channel disable and sensing channel reset
1 : Channel enable
8.2.2 Global option control register 0
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
05h
global_ctrl0
1
0
-
-
micom_
sleep
-
-
-
Bit1
Bit0
Description
Operation mode selection and LDO ON/OFF signal control register.
Bit name
Reset value
micom_
sleep
0
Function
LDO output control register. This signal can go out through LDO port.
0 : LDO ON
1 : LDO OFF
8.2.3 I2C address of ANRG08
Type: R/W
Address
Register Name
06h
i2c_id
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
i2c_id
wr_bit
Description
Chip address of ANRG08 control register. User can change this address value with OTP ROM write. During
reset period OTP ROM data is loaded to registers.
Bit name
Reset value
Function
wr_bit
0
Write/Read address selection - 0 : Write address, 1 : Read address
i2c_id
0100100
Chip address of ANRG08.
ADSemiconductor Confidential
21 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.4 Output data
Type: R
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
2Ah
output
o_ch8
o_ch7
o_ch6
o_ch5
o_ch4
o_ch3
o_ch2
o_ch1
Description
The output data register from channel 1 to channel 8.
Bit name
Reset value
o_chx
0
Function
o_chx is output bit for CSx channel
0 : No touch detected
1 : Touch detected
ADSemiconductor Confidential
22 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.5 Clock control register
Type: R/W
Address
Register Name
34h
clock_ctrl
Bit7
Bit6
Bit5
Bit4
Bit3
sts_clr_e
n
init_cal_opt
Description
This register controls the global options of ANRG08
Bit name
Reset value
Bit2
Bit1
clk_sel
rb_sel
Function
10
ANRG08 provides three internal calibration speeds with this register.
00, 01 : Fast
10 : Normal
11 : Slow
clk_sel
01
ANRG08 provides four internal calibration speeds with this register.
00 : Fast
01 : Normal
10 : Slow
11 : Slowest
sts_clr_en
0
Clear the „mtp_status‟ register (Address: 5DH) control bit.
0 : Not clear
1 : Clear
init_cal_opt
000
rb_sel
Bit0
To control the initial BF time.
init_cal_opt[2:0] * 5 + 5 (seconds)
8.2.6 Global option control register 1
Type: R/W
Address
Register Name
36h
global_ctrl1
Bit7
Bit6
Bit5
response_off_ctrl
Description
This register controls the global options of ANRG08
Bit name
Reset value
Bit4
Bit3
Bit2
response_ctrl
Bit1
Bit0
bf_mode
software
_rst
Function
software_rst
0
Software reset control bit.
0 : Not reset
1 : Reset
bf_mode
0
Operation mode selection
0 : Normal mode
1 : BF mode
response_ctrl
011
Numbers of continuous touch detections for touch decision.
response_ctrl[2:0] + 1 (Maximum time : 7)
response_off_ctrl
010
Numbers of continuous touch off detections for touch off decision.
response_off_ ctrl[2:0] + 1 (Maximum time : 7)
ADSemiconductor Confidential
23 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.7 State count control register
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
37h
state_count
0
1
0
Bit4
Bit3
Bit2
Bit1
Bit0
cal_pre_scaler
Description
Register to set the number of the continuous inputted noise through RND channel and to set the pre-scaler for
the calibration speed.
Bit name
Reset value
cal_pre_scaler
1 1111
Function
The pre-scaler for the calibration speed.
cal_pre_scaler[4:0] x 16ms (1-period)
8.2.8 Global option control register 2
Type: R/W
Address
Register Name
Bit7
Bit6
38h
global_ctrl2
imp_sel
sin_mult
i_mode
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
-
clk_off
cal_hold_time
Description
This register controls the global options of ANRG08.
Bit name
Reset value
Function
clk_off
0
cal_hold_tim
e
0111
sin_multi_mo
de
0
Single/Multi output operation mode selection bit.
0 : Single output mode
1 : Multi output mode
imp_sel
0
Impedance of the sensing wire of all channels control bit.
0 : High impedance
1 : Low impedance except sensing period.
System clock off control bit.
0 : Not clock off
1 : Clock off
Output expiration Time control.
cal_hold_time[3:0] x 4 ( seconds)
ADSemiconductor Confidential
24 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.9 Sensitivity register
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
39H
sensitivity1
sensitivity01
3AH
sensitivity2
sensitivity02
3BH
sensitivity3
sensitivity03
3CH
sensitivity4
sensitivity04
3DH
sensitivity5
sensitivity05
3EH
sensitivity6
sensitivity06
3FH
sensitivity7
sensitivity07
40H
sensitivity8
sensitivity08
Bit2
Bit1
Bit0
Description
This register controls the global options of ANRG08.
Bit name
Reset value
sensitivity0x
0001 1100
Function
Sensitivities of each channel.
Sensitivity of CSx channel: {(sensitivity0x[7:0] x 0.025)} (%).
ADSemiconductor Confidential
25 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.10 Calibration speed control register
Type: R/W
Address
Register Name
41H
cal_speed
Bit7
Bit6
rnd_bf_up
Bit5
Bit4
Bit3
rnd_bf_down
Bit2
Bit1
sen_bf_up
Bit0
sen_bf_down
Description
Calibration speed can be controlled by this „cal_speed‟ register at BF mode.
Bit name
sen_bf_down
sen_bf_up
rnd_bf_down
rnd_bf_up
Reset value
Function
00
Sense channel down calibration speed at BF mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
00
Sense channel up calibration speed at BF mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
00
RND channel down calibration speed at BF mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
00
RND channel up calibration speed at BF mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
ADSemiconductor Confidential
26 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.11 Calibration speed control register at BS mode
Type: R/W
Address
Register Name
42H
cal_BS_speed
Bit7
Bit6
Bit5
rnd_bs_up
Bit4
Bit3
rnd_bs_down
Bit2
Bit1
sen_bs_up
Bit0
sen_bs_down
Description
Calibration speed can be controlled by this „cal_BS_speed‟ register at BS mode.
Bit name
sen_bs_down
sen_bs_up
rnd_bs_down
rnd_bs_up
Reset value
Function
00
Sense channel down calibration speed at BS mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
00
Sense channel up calibration speed at BS mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
00
RND channel down calibration speed at BS mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
00
RND channel up calibration speed at BS mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
8.2.12 LED luminance control register
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
43h
PWM_ctrl1
pwm_d2
pwm_d1
44h
PWM_ctrl2
pwm_d4
pwm_d3
45h
PWM_ctrl3
pwm_d6
pwm_d5
46h
PWM_ctrl4
pwm_d8
pwm_d7
Bit0
Description
LED luminance can be controlled by “PWM_ctrlx” register.
Bit name
Reset value
pwm_dx
0000
Function
The LED PWM control bits of Dx port.
0000 : The minimum low duty
1111 : The maximum low duty
ADSemiconductor Confidential
27 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.13 Port mode control register
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
4Fh
port_mode
pmod_d
8
pmod_d
7
pmod_d
6
pmod_d
5
pmod_d
4
pmod_d
3
pmod_d
2
pmod_d
1
Description
This register controls the mode of output port.
Bit name
Reset value
pmod_dx
0
Function
Select the output port operation mode of each channels.
0 : Parallel output mode
1 : LED drive mode
ADSemiconductor Confidential
28 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.14 Sense, reference count read register
Type: R
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
50h
rd_ch_H1
51h
rd_ch_L1
52h
Percent_H
touch_percent[24:17]
53h
Percent_M
touch_percent[16:9]
54h
Percent_L
touch_percent[8:1]
56h
rd_ch_H2
rd_ch_H2
57h
rd_ch_L2
Bit2
Bit1
Bit0
-
-
rd_ch_L1
-
-
rd_ch_L2
rd_ch_H1
-
-
-
-
-
-
-
-
-
-
Description
ANRG08 provides the special function to read sense count of each channels or reference count.
Bit name
Reset value
Function
rd_ch_H1
Read only
Read channel indication register.
00000001 : R.N.D channel
00000010 : CS1 channel
00000100 : CS2 channel
00001000 : CS3 channel
00010000 : CS4 channel
00100000 : CS5 channel
01000000 : CS6 channel
10000000 : CS7 channel
rd_ch_L1
Read only
Read channel indication register.
1 : CS8 channel
touch_percent[24:17]
Read only
The percent data of RND channel and sense channels.
[24:17] bits of the touch percent data.
touch_percent[16:9]
Read only
The percent data of RND channel and sense channels.
[16:9] bits of the touch percent data.
touch_percent[8:1]
Read only
The percent data of RND channel and sense channels.
[8:1] bits of the touch percent data.
rd_ch_H2
Read only
Read channel confirm register.
00000001 : R.N.D channel
00000010 : CS1 channel
00000100 : CS2 channel
00001000 : CS3 channel
00010000 : CS4 channel
00100000 : CS5 channel
01000000 : CS6 channel
10000000 : CS7 channel
rd_ch_L2
Read only
Read channel confirm register.
1 : CS8 channel
ADSemiconductor Confidential
29 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.15 Ram control register
Type: R/W
Address
Register Name
59h
RAM_ctrl
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
ram_chk_en
d
clk_mtp_opt
Bit0
ram_chk_sta
rt
Description
These registers are the command register and status register for RAM access.
Bit name
Reset value
ram_chk_star
t
0
ram_chk_end
Read only
clk_mtp_opt
00
Function
RAM cells check start command bit
RAM cells check finish status bit
Clock division register for MTP reading and writing.
00 : Fast
01 : Normal
10 : Slow
11 : Slowest
8.2.16 Ram check data register
Type: R/W
Address
Register Name
5Ah
RAM_data
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
ram_check_data
Description
This register is the data register for RAM check.
Bit name
Reset value
ram_check_d
ata
0000 0000
Function
The data register to test the RAM interface and RAM cells.
ADSemiconductor Confidential
30 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.17 OTP ROM cell select register
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
5Bh
usr_mtp_sel
0
0
0
mtp_sel_en
Bit3
Bit2
Bit1
Bit0
org_usr_mtp_sel
Description
The OTP ROM cells of ANRG08 are made up of eight memory cells of 64 bytes. ANRG08 provides the way to
access OTP ROM cells with this register. User can select the OTP ROM cell with „org_usr_mtp_sel‟ bits and if
user doesn‟t want to select the OTP ROM cell directly, „mtp_sel_en‟ bit leaves „0‟, then OTP ROM cell is
selected the automatically.
Bit name
Reset value
org_usr_mtp_
sel
0000
mtp_sel_en
0
Function
OTP ROM cell selection bits.
0000, 0001 : 1st OTP ROM cell
0010 : 2nd OTP ROM cell
0011 : 3rd OTP ROM cell
0100 : 4th OTP ROM cell
0101 : 5th OTP ROM cell
0110 : 6th OTP ROM cell
0111 : 7th OTP ROM cell
1000 : 8th OTP ROM cell
OTP ROM cell selection enable bit.
0 : Select OTP ROM cell automatically
1 : Select OTP ROM cell by user
8.2.18 OTP ROM control register (OTP ROM command)
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
5Ch
mtp_cmd
0
0
write_all
read_all
0
0
wr_start
rd_start
Description
OTP ROM commands to access.
Bit name
Reset value
Function
rd_start
0
Reading selected OTP ROM cell start command bit.
0 : Don‟t start
1 : Start to read
wr_start
0
Writing on selected OTP ROM cell start command bit.
0 : Don‟t write
1 : Start to write
read_all
0
Unit of reading the selected OTP ROM cell control bit.
0 : 1-Byte reading
1 : All bytes of selected OTP ROM cell reading
write_all
0
Unit of writing on selected OTP ROM cell control bit.
0 : 1-Byte writing
1 : All bytes of selected OTP ROM cell writing
ADSemiconductor Confidential
31 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.19 OTP ROM status register
Type: R
Address
Register Name
Bit7
5Dh
mtp_status
-
Bit6
Bit5
Bit4
Bit3
org_mtp_sel
Bit2
Bit1
Bit0
wr_done
_sts
rd_done
_sts
no_load_
sts
Description
This register indicates the status of operation of selected one OTP ROM cell.
Bit name
Reset
no_load_sts
-
This bit indicates whether some data are loaded from OTP ROM cells.
0 : There is some data loaded from OTP ROM cells
1 : No data loaded from OTP ROM cells
rd_done_sts
-
This bit indicates the end of reading.
0:
1 : End of reading
wr_done_sts
-
This bit indicates the end of writing.
0:
1 : End of writing
-
These bits indicate that OTP ROM cell is loaded at initial time.
0000 : No loaded
0001 : 1st OTP ROM cell
0010 : 2nd OTP ROM cell
0011 : 3rd OTP ROM cell
0100 : 4th OTP ROM cell
0101 : 5th OTP ROM cell
0110 : 6th OTP ROM cell
0111 : 7th OTP ROM cell
1000 : 8th OTP ROM cell
org_mtp_sel
Function
8.2.20 OTP ROM data address select register
Type: R/W
Address
Register Name
Bit7
Bit6
5Eh
otp_add_sel
0
0
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
otp_add_sel
Description
Register for the specific address of selected OTP ROM cell. User can access OTP ROM data of specific address
by leaving „read_all‟ and „write_all‟ bits in the „mtp_cmd‟ register „0‟, selecting the OTP ROM cell with
„usr_mtp_sel‟ register and selecting the specific address with this register.
Bit name
Reset
otp_add_sel
000000
Function
Select specific address of selected OTP ROM cell.
otp_add_sel[5:0] : Address
ADSemiconductor Confidential
32 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.21 OTP ROM data register to write
Type: R/W
Address
Register Name
5Fh
otp_wr_data
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit2
Bit1
Bit0
otp_wr_data
Description
The data register to write on specific address of selected OTP ROM cell.
Bit name
Reset
otp_wr_data
00000000
Function
Data register to write.
otp_wr_data[7:0] : Data
8.2.22 OTP data register to read
Type: R
Address
Register Name
60h
otp_rd_data
Bit7
Bit6
Bit5
Bit4
Bit3
otp_rd_data
Description
The data register for reading data from specific address of selected OTP ROM cell.
Bit name
Reset
otp_rd_data
---- ----
Function
Data register for reading OTP ROM data.
otp_rd_data [7:0] : Data
ADSemiconductor Confidential
33 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
9 Recommended Circuit Diagram
9.1 ANRG08TA (16 TSSOP)
ANRG08TA (16TSSOP) Application Example Circuit for parallel output
ANRG08TA is reset by internal reset circuit. VDD voltage rising time should be shorter than 100msec
for proper operation.
The VDD periodic voltage ripple over 50mV and the ripple frequency is lower than 10 kHz can cause
wrong sensitivity calibration. To prevent above problem, power (VDD, GND) line of touch circuit
should be separated from other circuit. Especially LED driver power line or digital switching circuit
power line certainly should be treated to be separated from touch circuit.
The CS patterns also should be routed as short as possible and the width of line might be about 0.25mm.
Parallel capacitor of CS pin could be useful in case detail sensitivity mediation is required such as for
complementation sensitivity difference between channels.
Serial connection resistor of CS pins may be used to avoid mal-function from external surge and ESD.
The capacitor that is between VDD and GND is an obligation. It should be located as close as possible
from ANRG08TA.
The CS pattern routing should be formed by bottom metal (opposite metal of touch PAD).
The empty space of PCB must be filled with GND pattern to strengthen GND pattern and to prevent
external noise from interfere with sensing frequency.
„VPP‟ pin for 12V voltage input is needed at MTP ROM writing only.
ADSemiconductor Confidential
34 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
9.2 ANRG08FB (24 MLF)
ANRG08FB (24 MLF) Application Example Circuit
ANRG08FB is reset by internal reset circuit. VDD voltage rising time should be shorter than 100msec
for proper operation.
Normally, R.N.D pin dose not connection to anywhere. But, in radio frequency noise environment,
R.N.D pin must form a pattern line on PCB.
The VDD periodic voltage ripple over 50mV and the ripple frequency is lower than 10 kHz can cause
wrong sensitivity calibration. To prevent above problem, power (VDD, GND) line of touch circuit
should be separated from other circuit. Especially LED driver power line or digital switching circuit
power line certainly should be treated to be separated from touch circuit.
The CS patterns also should be routed as short as possible and the width of line might be about 0.25mm.
Parallel capacitor of CS pin could be useful in case detail sensitivity mediation is required such as for
complementation sensitivity difference between channels.
Serial connection resistor of CS pins may be used to avoid mal-function from external surge and ESD.
The capacitor that is between VDD and GND is an obligation. It should be located as close as possible
from ANRG08FB.
The CS pattern routing should be formed by bottom metal (opposite metal of touch PAD).
The empty space of PCB must be filled with GND pattern to strengthen GND pattern and to prevent
external noise from interfere with sensing frequency.
„VPP‟ pin for 12V voltage input is needed at MTP ROM writing only.
ADSemiconductor Confidential
35 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
9.3 ANRG08SC (24 SOP)
ANRG08SC (24 SOP) Application Example Circuit
ANRG08SC is reset by internal reset circuit. VDD voltage rising time should be shorter than 100msec
for proper operation.
Normally, R.N.D pin dose not connection to anywhere. But, in radio frequency noise environment,
R.N.D pin must form a pattern line on PCB.
The VDD periodic voltage ripple over 50mV and the ripple frequency is lower than 10 kHz can cause
wrong sensitivity calibration. To prevent above problem, power (VDD, GND) line of touch circuit
should be separated from other circuit. Especially LED driver power line or digital switching circuit
power line certainly should be treated to be separated from touch circuit.
The CS patterns also should be routed as short as possible and the width of line might be about 0.25mm.
Parallel capacitor of CS pin could be useful in case detail sensitivity mediation is required such as for
complementation sensitivity difference between channels.
Serial connection resistor of CS pins may be used to avoid mal-function from external surge and ESD.
The capacitor that is between VDD and GND is an obligation. It should be located as close as possible
from ANRG08SC.
The CS pattern routing should be formed by bottom metal (opposite metal of touch PAD).
The empty space of PCB must be filled with GND pattern to strengthen GND pattern and to prevent
external noise from interfere with sensing frequency.
„VPP‟ pin for 12V voltage input is needed at MTP ROM writing only.
ADSemiconductor Confidential
36 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
9.4 ANRG08QL (24 QFN)
ANRG08QL (24 QFN) Application Example Circuit
ANRG08QL is reset by internal reset circuit. VDD voltage rising time should be shorter than 100msec
for proper operation.
Normally, R.N.D pin dose not connection to anywhere. But, in radio frequency noise environment,
R.N.D pin must form a pattern line on PCB.
The VDD periodic voltage ripple over 50mV and the ripple frequency is lower than 10 kHz can cause
wrong sensitivity calibration. To prevent above problem, power (VDD, GND) line of touch circuit
should be separated from other circuit. Especially LED driver power line or digital switching circuit
power line certainly should be treated to be separated from touch circuit.
The CS patterns also should be routed as short as possible and the width of line might be about 0.25mm.
Parallel capacitor of CS pin could be useful in case detail sensitivity mediation is required such as for
complementation sensitivity difference between channels.
Serial connection resistor of CS pins may be used to avoid mal-function from external surge and ESD.
The capacitor that is between VDD and GND is an obligation. It should be located as close as possible
from ANRG08QL.
The CS pattern routing should be formed by bottom metal (opposite metal of touch PAD).
The empty space of PCB must be filled with GND pattern to strengthen GND pattern and to prevent
external noise from interfere with sensing frequency.
„VPP‟ pin for 12V voltage input is needed at MTP ROM writing only.
ADSemiconductor Confidential
37 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
9.5 Example – Power Line Split Strategy PCB Layout
A. Not split power Line (Bad power line design)
The noise that is generated by AC load or relay can be loaded at 5V power line.
A big inductance might be appeared in case of the connection line between main board and
display board is too long, moreover the voltage ripple could be generated by LED (LCD)
display driver at VDD (5V).
B. Split power Line (One 5V regulator used) – Recommended
C. Split power Line (Separated 5V regulator used) – Strongly recommended
ADSemiconductor Confidential
38 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
10 MECHANICAL DRAWING
10.1 Mechanical Drawing of ANRG08TA (16 TSSOP)
DIM
A
A1
A2
A3
b
b1
c
c1
D
E1
E
e
L
L1
θ
MIN
0.05
0.90
0.39
0.20
0.19
0.13
0.12
4.86
4.30
6.20
0.45
0
NOM
1.00
0.44
0.22
0.13
4.96
4.40
6.40
0.65BSC
1.00BSC
-
MAX
1.20
0.15
1.05
0.49
0.30
0.25
0.19
0.14
5.06
4.50
6.60
NOTES
1. ALL DIMENSIONS ARE IN MILLIMETERS.
ANGLES ARE IN DEGREES.
2. DIMENSION b APPLIES TO METALLIZED
TERMINAL AND IS MEASURED
BETWEEN 0.25mm AND 0.30mm FROM
TERMINAL TIP.
DIMENSION L1 REPRESENTS TERMINAL
FULL BACK FROM PACKAGE EDGE UP
TO 0.1mm IS ACCEPTABLE.
3. COPLANARITY APPLIES TO THE
EXPOSED HEAT SLUG AS WELL AS THE
TERMINAL.
4. RADIUS ON TERMINAL IS OPTIONAL.
0.75
8˚
ADSemiconductor Confidential
39 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
10.2 Mechanical Drawing of ANRG08FB (24 MLF Punched type)
ADSemiconductor Confidential
40 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
10.3 Mechanical Drawing of ANRG08SC (24 SOP)
DIM
MIN
NOM
MAX
A
-
-
2.64
A1
0.10
-
-
D
15.24
-
15.70
E
7.42
7.52
7.59
H
10.29
10.46
10.64
L
0.53
0.79
1.04
θ˚
0
4
8
NOTES
1. JEDEC OUTLINE : N/A.
2. DIMENSIONS “D” DOES NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS.MOLD FLASH, PROTRUSIONS AND
GATE BURRS SHALL NOT EXCEED .25mm
(.010in) PER SIDE.
3. DIMENSIONS “E” DOES NOT INCLUDE
INTER-LEAD FLASH, OR PROTRUSIONS.
INTER-LEAD FLASH AND PROTRUSIONS
SHALL NOT EXCEED .25mm (.010in) PER
SIDE.
UNIT : MM
ADSemiconductor Confidential
41 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
10.4 Mechanical Drawing of ANRG08QL (24 QFN Full lead type)
ADSemiconductor Confidential
42 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
11 MARKING DESCRIPTION
11.1 Marking Description of ANRG08TA (16 TSSOP)
Device Code
: ANRG 08
Channel Number
Touch Switch Group
Year / Week Code
: YY WW
Manufacturing Week
Manufacturing Year
11.2 Marking Description of ANRG08FB (24 MLF), ANRG08QL (24 QFN)
Company Code
: ADS
AD Semiconductor
Device Code
: ANRG 8
Channel Number
Touch Switch Group
Customer / Assembly Lot Code
: CC TTT
Assembly Lot Code
Customer Code
Year / Week Code
: YY WW
Manufacturing Week
Manufacturing Year
ADSemiconductor Confidential
43 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
11.3 Marking Description of ANRG08SC (24 SOP)
Company Code
: ADS
AD Semiconductor
Device Code
: ANRG 08
Channel Number
Touch Switch Group
Year / Week Code
: YY WW
Manufacturing Week
Manufacturing Year
ADSemiconductor Confidential
44 / 45
ADSemiconductor®
ANRG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
NOTES:
LIFE SUPPORT POLICY
AD SEMICONDUCTOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN
LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE
PRESIDENT AND GENERAL COUNSEL OF AD SEMICONDUCTOR CORPORATION
The ADS logo is a registered trademark of ADSemiconductor
ⓒ 2006 ADSemiconductor – All Rights Reserved
www.adsemicon.com
www.adsemicon.co.kr
ADSemiconductor Confidential
45 / 45