MP4652 HIGH PERFORMANCE OFF-LINE TV LED DRIVER The Future of Analog IC Technology DESCRIPTION FEATURES The MP4652 is a high-performance, off-line LED driver designed to power LEDs for highpower isolated applications, such as LCD TV backlighting. It is available in a 16-pin SOIC package. • • The MP4652 can operate at a fixed operating frequency or a variable frequency controlled externally. It outputs two 180-degree phaseshifted driver signals for various external power stages, like LLC, half bridge and flyback. Its enhanced 9V gate driver can sufficiently drive the external MOSFETs and directly drives the external gate drive transformer. The MP4652 implements fast and continuous PWM dimming for LEDs. It outputs a driver signal to directly dim the LED current through a dimming MOSFET and achieves fast PWM dimming. It provides continuous gate driver signals to the power stage to the whole PWM dimming cycle that eliminates the audible noise: the MP4652 can achieve 1000:1 PWM dimming ratio without any audible noise issue. The PWM dimming is controlled by either a DC input voltage or a direct PWM signal. The DC input PWM dimming frequency can be synchronized by an external signal. The built-in fault management features include open LED protection, short LED protection, protection against shorts along any point of the LED string to ground, and over temperature protection. The protection interface is flexible and is easy to use. At fault protection, system can be set up with auto-recovery or latch up. MP4652 Rev.1.01 9/23/2011 • • • • • • • • • • • • • LLC, Half Bridge or Flyback Controller Fast and Continuous PWM Dimming with Audible Noise Elimination 1000:1 PWM Dimming Ratio Input Voltage Range from 9V to 30V 9V Enhanced Gate Driver Fixed or Externally Programmable Operating Frequency DC or PWM Input Dimming Control DC Input PWM Dimming Frequency Synchronization Smart Fault Protection Interface Open and Short LED String Protection Protection Against Shorts Along the LED String to Ground Built-In Fault Management System Auto Recovery or Latch Up at Fault Protection Available in SOIC 16 Package Pin-to-Pin with MP4651 APPLICATIONS • • Flat-Panel Video Displays Street Lighting For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. The MP4652 is covered by US Patents 6,683,422, 6,316,881, and 6,114,814. Other Patents Pending. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 1 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER SIMPLIFIED TYPICAL APPLICATION 400V 400V GND OVP1 . . . MP4652 OVP1 1 OVP2 2 3 REF OVP GR SYNC GND 15 14 GL SSD OCP 16 REF 4 OCP 5 6 7 PWMOUT 8 FB COMP VIN FT EN 12 OVP2 400V GND 11 10 PWMOUT PWMIN FSET . . . 13 VCC 9 BFS REF PWMOUT FCOMP PWM FCOMP IREF EN 5V* (See Note) VIN MP4652 LLC Application: Recommended for PWM dimming frequencies from 100Hz to 2kHz *Note: The 5V could be an accurate reference voltage generated from a TL431. 400V 400V GND MP4652 REF OVP SYNC 1 OVP 2 SYNC 3 SSD OVP GR GND GL 16 . . . 15 14 REF FB 4 OCP 5 6 PWM OUT 7 8 FB COMP FT 13 VCC VIN EN PWMOUT PWMIN FSET BFS OCP PWM OUT 12 11 10 400V GND FB 9 Dim EN VIN SYNC SYNC Half Bridge Application: Recommended for PWM Dimming Frequencies Greater Than 2kHz MP4652 Rev.1.01 9/23/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 2 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) MP4652ES SOIC16 MP4652ES -20°C to +85°C * For Tape & Reel, add suffix –Z (e.g. MP4652ES–Z) For RoHS compliant packaging, add suffix –LF (e.g. MP4652ES–LF–Z) PACKAGE REFERENCE PIN 1 ID TOP VIEW OVP 1 16 GR SYNC 2 15 GND SSD 3 14 GL FB 4 13 VCC COMP 5 12 VIN FT 6 11 EN PWMOUT 7 10 PWMIN FSET 8 9 BFS ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance Input Voltage VIN .......................................... 35V VCC, GL, GR .............................-0.3V to +10.7V FB, SSD ....................................... -5.8V to +5.8V Other Pins .................................... -0.3V to +6.5V Continuous Power Dissipation (TA = 25°C) (2) ……………………………………………….1.56W Junction Temperature ...............................150°C Lead Temperature (Solder).......................260°C Operating Frequency .............. 20kHz to 150kHz Storage Temperature............... -55°C to +150°C SOIC16 ...................................80 ...... 35 ... °C/W Recommended Operating Conditions (3) Input Voltage VIN .................................9V to 30V Maximum Junction Temp. (TJ) ..................125°C MP4652 Rev.1.01 9/23/2011 (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX) = (TJ(MAX)-TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 3 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER ELECTRICAL CHARACTERISTICS VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Symbol Condition Gate Driver GL, GR Gate Pull-Down Resistance RGD Gate Pull-Up Resistance RGU Output Source Current ISOURCE Output Sink Current ISINK Maximum Duty Cycle DMAX En EN Turn On Threshold VEN-ON EN Turn Off Threshold VEN-OFF Internal Pull-Down Resistor REN-IN Brightness Dimming Control Range (PWMIN) PWM Full Scale VPWM DC input PWM dimming PWM Logic Input Threshold VTH-PWM PWM dimming PWM Logic Input Hysteresis VTH-PWM-Hyst PWM dimming Burst Frequency Set (BFS) Source Current ISRC(BFS) VBFS = 2V Lower Threshold VV(BFS) Upper Threshold VP(BFS) Supply Current Supply Current (Enabled) IIN-EN No driver output Supply Current (Disabled) IIN-OFF VIN = 30V fO 25kΩ FSET to GND Operating Frequency Frequency Set Voltage VFSET Output PWM Dimming Signal For LED (PWMOUT) Logic High Voltage VH-PWMOUT Normal Operation At Fault Condition, Logic Low Voltage VL-PWMOUT 25kΩ FSET to GND Output PWM Source Current ISOURCE_PWMOUT 100pF on PWMOUT pin Output PWM Sink Current ISINK_PWMOUT 100pF on PWMOUT pin Led Current Feedback (FB) Magnitude |VFB| Input Resistance RFB_IN Over Voltage Protection (OVP) Over Voltage Protection VTH(OVP) Threshold MP4652 Rev.1.01 9/23/2011 Min Typ Max 2 4 1 2 46% Units Ω Ω A A 2 1 60 V V kΩ 1.1 1.6 1.2 1.9 0.1 1.3 2.2 V V V 120 2.2 3.3 140 2.4 3.55 170 2.6 3.8 µA V V 1.5 mA µA kHz V 46.5 1.14 50 1.2 2.5 1 53.5 1.25 5 6 6.5 V 0.1 0.6 V 3 20 mA mA 0.57 0.6 30 0.63 V kΩ 2.22 2.38 2.55 V www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 4 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER ELECTRICAL CHARACTERISTICS (continued) VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Symbol Fault Timer (FT) Threshold Vth(FT) Source Current ISOURCE(FT) Comp Clamp Voltage VCOMP Reference Current ICOMP+ Pull Down Current At Fault ICOMP-FAULT Condition Burst Frequency Synchronization (SYNC) High Logic Level VSYNC-H Low Logic Level VSYNC-L Pulse Width tsync FB = 0V Synchronizing Frequency DC input PWM dimming, Compared to the frequency fBFS set by BFS pin R and C fSYNC Fault Detection Threshold (SSD, FB) SSD Threshold VSSD SSD Detection Delay Time TD_SSD FB Threshold VFB FB Detection Delay Time TD_FB VCC Voltage VVCC Current IVCC MP4652 Rev.1.01 9/23/2011 Condition Min Typ Max Units 2.2 2.4 8 2.6 V µA 0.60 20 Fault Mode is triggered V µA µA 30 1.4 0.7 20 6 No load fBFS 110% 120% 2.22 2.36 7 1.2 7 2.55 9.7 20 10.5 1.1 8.7 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. V V µs 1.3 V µs V µs V mA 5 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER PIN FUNCTIONS Pin # 1 2 3 4 5 6 7 8 9 10 Name Description Over Voltage Protection. The output voltage is sensed by this pin through a voltage divider. If OVP the voltage at OVP exceeds 2.38V for 7µs, the Fault Mode is triggered. Synchronization. For burst dimming frequency. Application of a narrow-pulse synchronizing SYNC signal on this pin will synchronize the burst frequency on BFS pin. The frequency of the synchronizing signal should be higher than the frequency set by BFS pin. Short String Detection. A comparator is integrated in this pin for short string protection. If the SSD voltage on this pin falls below 2.36V for 7µs, the Fault Mode is triggered. LED Current Feedback Input. The average voltage at this pin is regulated to 0.6V by an internal error amplifier. The voltage on this pin is also used for short string detection. When the voltage on this pin goes higher than 1.2V for 7µs, the IC recognizes this as short string condition and triggers the Fault Mode. FB For fixed-operating–frequency PWM-controlled applications—such as half-bridge, flyback or other topologies—shunt a current-sensing resistor from the cathode of the LED to ground and use a sample-hold circuit to feed the LED current to FB pin. The sample-hold circuit should hold the sensed current value on FB pin at PWM off interval. For frequency controlled applications, like the LLC topology, the LED current is regulated through an external amplifier, pull FB to ground and let IC operate with maximum duty cycle. Feedback Compensation Node. For fixed-operating–frequency PWM-controlled applications, COMP connect a compensation capacitor or an R-C network from this pin to GND. For frequency controlled applications, like the LLC topology, connect a 1nF cap on this pin. Fault Timer. Connect a timing capacitor from this pin to GND to set the fault timer to recover the system. When the voltage on this pin goes higher than the 2.38V threshold, the IC recovers. FT If the system requires a latch up for Fault Mode, connect a resistor smaller than 250kΩ to this pin. PWM Dimming Control Output. This pin outputs the PWM dimming driver signal to the LED PWMOUT dimming MOSFET for fast PWM dimming. In Fault Mode PWMOUT is pulled low. Frequency Set. The source current through this pin determines the operating frequency of the MP4652. For fixed-operating–frequency PWM-controlled applications, connect a resistor from this pin to GND to set the operating frequency. For typical applications, a 25kΩ resistor sets the FSET operating frequency at 50kHz. For frequency controlled applications (like LLC), apply the control voltage (the output of the regulation loop) to this pin through a resistor. This control voltage programs the source current through the FSET pin and thus controls the operating frequency. Burst Frequency Set. For DC input PWM dimming. Connect a resistor in parallel with a capacitor from BFS to GND. The resistor and capacitor programs the burst frequency. BFS For direct PWM input PWM dimming, pull up BFS to VCC with a 20kΩ resistor and apply the PWM signal to the PWMIN pin. PWM Dimming Control Input. For DC input PWM dimming, the voltage range from 0 V to 1.2V at PWMIN linearly sets the PWM dimming duty cycle from 0 to 100%. PWMIN For direct PWM input PWM dimming, directly apply the PWM signal on this pin. The MP4652 has positive dimming polarity. MP4652 Rev.1.01 9/23/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 6 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER PIN FUNCTIONS (Continued) Pin # 11 12 Name EN VIN 13 VCC 14 15 16 GL GND GR MP4652 Rev.1.01 9/23/2011 Description Enable Input. Pull EN high to turn on the chip, and pull EN low to turn it off. Supply voltage input. Linear Regulator Output and Bias Supply of the Gate Driver. It provides the supply for the gate driver and also the external control circuit, the typical value is 9.7V. Bypass VCC with a 1μF or larger ceramic capacitor. Driver signal output, 180 degree phase shifted from GR Ground. Driver signal output, 180 degree phase shifted of GL www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 7 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER BLOCK DIAGRAM GR 16 L/R 8 FSET Pulse Width Modulation 5 COMP DC Gate Driver GL 14 4 FB 0.6V VCC 13 GM VIN 12 Regulator 1.2V EN 11 2.36V 3 SSD Fault Management SYNC 2 Burst Dimming signal generator 2.38V 1 OVP BFS 9 PWMIN 10 2.38V 6 FT driver PWMOUT 7 Figure 1—MP4652 Block Diagram MP4652 Rev.1.01 9/23/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 8 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER OPERATION Steady State and Enable Control The MP4652 is a high-performance, off-line LED driver specifically designed for high-power isolated applications such as LED backlighting for TVs. Powered by a 9V to 30V input supply, the MP4652 outputs two 180-degree phaseshifted gate driver signals for external power stages. Its enhanced 9V gate driver provides adequate driver capability to the external MOSFETs and directly drives the external MOSFETs through a gate drive transformer. The MP4652 can be used to control LLC, half-bridge, flyback, and other power stages. The MP4652 can accurately regulate the LED output current using both PWM control and a compensation network on the COMP pin. PWM control uses an external resistor connected from FSET pin to GND to set the operating frequency. The LED current feeds back to the FB pin with a sample-hold circuit and compared against an internal 0.6V reference voltage. The compensation network on the COMP pin, which connects to the output of the error amplifier, then accurately regulates the output LED current. The voltage on COMP pin is compared with the internal oscillator and generates duty cycle modulated signals to control the external power switches. This PWM control makes MP4652 suitable for half-bridge, flyback, and other power stages. The MP4652 FSET pin can also take voltage feedback from a frequency-controlled external circuit to adjust the device frequency. Connect this feedback circuit to FSET using a resistor. This frequency control makes MP4652 suitable for LLC and other frequency-controlled power stages. The system power is controlled by EN pin. When the chip is enabled, the built-in regulator for VCC powers up the internal circuit. When VCC exceeds its UVLO point, IC starts to operate and outputs the gate drive signals. Brightness Control MP4652 implements PWM dimming on the LED current by using either a DC input voltage or a direct PWM input signal. The MP4652 has a built-in burst oscillator that can generate a triangle waveform on the BFS pin. When using a DC input voltage for PWM dimming, connect a capacitor in parallel to a resistor on BFS pin to set the burst frequency and apply the DC voltage to the PWMIN pin to program the PWM dimming duty cycle. The burst frequency can also be synchronized to an external frequency by applying a synchronizing narrow-pulse signal on the SYNC pin. The synchronizing frequency should be higher than the burst frequency set by the BFS pin. Please refer to SYNC pin description for details. When using a direct PWM input signal for PWM dimming, use a 20kΩ pull-up resistor between the BFS pin to VCC and apply the PWM signal on PWMIN pin. Continuous Fast PWM Dimming The MP4652 implements fast and continuous PWM dimming on the LED current, as shown in Figure 2. The PWM dimming signal (controlled by a DC input voltage or a direct PWM signal) outputs from the PWMOUT pin to drive the external dimming MOSFET in series with the LED string. Therefore, the LED current quickly rises when the PWM dimming signal goes high, and quickly falls when PWM dimming signal falls. This fast PWM dimming feature helps the MP4652 achieve a high PWM dimming ratio. The MP4652 provides continuous PWM dimming to the system. It outputs continuous gate driver signals to the power stage during both PWM on and PWM off intervals. This makes the power flow continuous for magnetic components—such as transformers and inductors—which can eliminate audible noise. With this fast and continuous PWM dimming feature, the MP4652 can achieve 1000:1 high MP4652 Rev.1.01 9/23/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 9 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER PWM dimming ratio at a 120Hz PWM dimming frequency without any audible noise issue (or 500:1 PWM dimming ratio at 300Hz PWM dimming frequency). PWMIN PWMOUT COMP Gate ILED Figure 2— Fast and Continuous PWM Dimming Fault Protection System fault management features include open LED protection, short LED protection if at any point the LED string shorts to ground, protection against shorts along the LED string, and a delay timer for system recovery. MP4652 Rev.1.01 9/23/2011 The output voltage is monitored by the OVP pin through a voltage divider. Once the open LED condition occurs and the voltage on the OVP pin exceeds 2.38V for 7μs, the MP4652 recognizes this as open condition and triggers the Fault Mode. The SSD pin monitors the secondary side current. If any point of the LED string is shorted to ground, the secondary side current increases. When the voltage on SSD pin falls below 2.36V for 7μs, the MP4652 triggers the Fault Mode. The FB pin can also function as short LED string protection. When the voltage on FB pin is higher than 1.2V for 7μs, the IC triggers the Fault Mode. In Fault Mode, the outputs of the gate drivers GL and GR are disabled, the PWMOUT signal is pulled low, and the COMP capacitor is discharged by a 30μA current source. The fault timer then starts. An 8μA current source charges the FT capacitor, and when FT voltage hits 2.38V, the system recovers. The IC enables the output driver signals, releases the COMP, resets the fault flag, and pulls down the FT pin. If the design requires a latch up for the IC at Fault Mode, connect a 200kΩ resistor on the FT pin. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 10 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER APPLICATION INFORMATION Pin 1 (OVP): This pin is used for over-voltage protection. When the output voltage to this pin exceeds 2.38V for 7μs, the Fault Mode is triggered. For applications involving multiple LED strings, apply the maximum output voltage of the LED strings to this pin. Pin 3 (SSD): This short string detection pin is used for protection against shorts along any point of the LED string to ground. The SSD pin monitors the secondary side current. When the voltage on this pin falls below 2.36V for 7μs, the IC treats the condition as a short and triggers the Fault Mode. Pin 4 (FB): This pin is used for LED current regulation. The voltage on this pin is regulated by an external circuit with a 0.6V average value. Use a samplehold circuit to sense the LED current when the PWM goes high, and hold the value when the PWM goes low. The FB pin also functions as short string protection. When the voltage on FB exceeds 1.2V for 7μs, the IC triggers the Fault Mode. For frequency-controlled application like an LLC power stage, the LED current is regulated with an external-frequency control loop. Connect FB to ground and set the IC to operate at the maximum duty cycle. Pin 5 (COMP): This pin is used for compensation purposes. For PWM-controlled applications, such as half-bridge and flyback power stages, connect an X7R ceramic capacitor with a value between 47nF and 470nF from COMP to GND. The value of this capacitor determines the stability of the LED current regulation. TFT = 2.38V × C FT 8μA A 10nF capacitor on FT sets the delay time to around 3ms If the circuit requires a latch-up for Fault Mode, connect this pin to a 200kΩ resistor. Pin 8 (FSET): This pin is used to set the operating frequency. The source current through this pin determines the operating frequency. For fixed-operating–frequency PWM-controlled applications—like half-bridge and flyback power stages—connect a resistor from this pin to GND to set the operating frequency (fo). The value for this resistor RFSET is calculated by RFSET = 1.25 × 10 9 fo For an operating frequency of 50kHz, RFSET = 25kΩ. For frequency-controlled applications like LLC, connect the control voltage to FSET pin through a resistor, as shown in Figure 3. This control voltage programs the source current through this pin to control the operating frequency. MP4652 IRef Vcontrol ILED FSET Figure 3—FSET Set Up for Frequency Controlled Application. For frequency-controlled applications like the LLC power stage, connect a 1nF capacitor to the COMP pin. Pin 6 (FT): Connect a capacitor from this pin to GND to set the fault timer. This sets the system recovery time after detecting a fault condition. MP4652 Rev.1.01 9/23/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 11 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER Pin 7 (PWMOUT): This pin outputs the PWM dimming signal to drive the dimming MOSFET in series with the LED string for fast PWM dimming. Connect this pin to the gate of the dimming MOSFET through a driver resistor. Pin 10 (PWMIN): This pin is used for PWM-dimming brightness control. For DC-input PWM dimming, the DC voltage controls the PWM dimming duty cycle on the output. The signal should be filtered for optimal operation. A voltage in the range of 0V to 1.2V on PWMIN programs the PWM dimming duty cycle from 0 to 100%. For direct PWM input PWM dimming, pull BFS high to VCC through a 20kΩ resistor, and connect the PWMIN pin directly to the PWM source. Logic High is PWM On and Logic Low is PWM Off. Pin 9 (BFS): BFS pin is used to set the burst frequency for DC input PWM dimming, using the waveform shown in Figure 4. Connect a resistor (RBFS) in parallel with a capacitor (CBFS) on this pin to set the burst frequency. These values are determined as follows: Set a percentage of the rising time, where: Drise = t rise × f Burst RBFS and CBFS are determined by: ⎞ ⎛ 1 RBFS ≈ 21.16k ⎜⎜ − 1⎟⎟ + 21.43k ⎠ ⎝ Drise C BFS = f Burst For Drise = 0.1, fBurst = 200Hz, then RBFS = 212kΩ, CBFS = 52nF. Drise is recommended between 0.1 and 0.2. For direct PWM input PWM dimming, pull BFS high to VCC through a 20kΩ resistor and apply the PWM signal to PWMIN pin. Pin 2 (SYNC): This pin is used for burst frequency synchronization to synchronize the DC input PWM dimming frequency. Application of a smallpulse synchronizing frequency signal will synchronize the burst frequency. MP4652 1 SYNC Signal A 2 3 Rising time Burst Dimming Frequency 4 5 6 3.55V 7 8 BFS 1 − Drise × R BFS × 0.405 OVP SYNC SSD GR GND GL 16 15 14 REF FB VCC 13 COMP VIN FT EN PWMOUT PWMIN 12 11 10 9 FSET BFS 2.4V SYNC Signal Burst dimming signal 1.2V A 3.55V Gate BFS 2.4V ILED Burst dimming signal I LED Figure 4—PWM Dimming with DC Input Voltage at PWMIN Pin MP4652 Rev.1.01 9/23/2011 Figure 5—Synchronized DC Input PWM Dimming and Schematic www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 12 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER Figure 5 shows synchronized PWM dimming with DC input. The synchronizing signal is filtered by a high pass filter. Its rising edge is caught and used to synchronize the triangle waveform on the BFS pin. The synchronizing frequency should be higher than that set by BFS pin and the amplitude of the synchronizing signal should be higher than 1.4V. Table 1—Function Mode Pin Connection PWMIN BFS SYNC Function PWM dimming with DC Input Voltage *0V to 1.2V CBFS, RBFS GND PWM dimming with DC Input Voltage and Synchronizing frequency *0V to 1.2V CBFS, RBFS R,C,D network PWM To VCC through 20kΩ resistor GND PWM dimming with direct PWM input Pin 12 (VIN): Supply voltage input. Bypass the supply voltage with a 0.1μF or larger ceramic capacitor Pin 13 (VCC): This pin provides the gate driver supply voltage. Its typical value is 9.7V. Connect a 1μF or greater ceramic capacitor to this pin to bypass the supply voltage. This voltage is also used to supply the external control circuit. Pin 14(GL), Pin 16 (GR): Gate driver signals output. GL and GR are 180degree phase-shifted driver signals. GL and GR can directly drive the external MOSFETs in the off-line system through a gate driver transformer with enhanced driver capability. Connect two 5.1Ω resistors in series with GL and GR to reduce the EMI noise. Place a 2.2nF Y capacitor between the primary reference ground and the secondary reference ground. Note: *:Burst Brightness Polarity: 100% duty cycle at PWM voltage 1.2V. Pin 11 (EN): Pull this pin high to enable the chip, and pull it low to disable the chip. MP4652 Rev.1.01 9/23/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 13 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER EXAMPLE APPLICATION TV LED Backlight This application example introduces a high performance 2-stage LLC TV LED driver that is designed to power the LED backlights for a 40inch TV. The total system power structure is shown in Figure 6. It uses a 2-stage structure with high efficiency and low cost. The PFC stage outputs around 390V and is controlled by the MPS PFC controller MP44010, which works in BCM (Boundary Conduction Mode). The MP4652 acts as the LED driver stage: it controls a LLC power stage to drive the LED strings. Another flyback DC/DC stage outputs the 13V power supply for the system: it uses the MPS quasiresonant flyback controller HFC0100. LED Driver stage PFC_390V AC input PFC stage LED strings MP4652 LLC . . . MP44010 Flyback DC/DC . . . 13V/3A HFC0100 Figure 6—System Power Structure The following introduces the detailed circuit of the LED driver stage based on MP4652. The specifications for this LED driver are listed below. PWM dimming frequency: 320Hz Protection: Open LED protection, short LED string protection, short LED+ to GND protection Specification: Schematics: Input: typically 390V, PFC Output. Output: 4 strings at 55V/260mA per string, connecting 2 strings in series. It could also output 2 strings at 110V/260mA per string. Operating frequency: ~110kHz Figure 7 shows the schematic of the LED driver stage. The parameters of the power transformer T2 are as follow: MP4652 Rev. 1.01 9/23/2011 NP: NS = 65:35, Leakage inductance = 450μH, magnetic inductance = 1.6mH. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 14 System error signal Short protection MP4652 LED current regulation LLC power stage Open protection MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER Figure 7—MP4652based 2-stage LLC TV LED Drive MP4652 Rev. 1.01 9/23/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 15 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER Power Stage The power stage is a half-bridge LLC topology. The primary side is composed of Q4, Q3, C19 and T2. The LLC resonant network is composed of the leakage inductance of T2, the magnetic inductance of T2, and C19. Q4 and Q3 should be chosen to handle the input voltage and the LLC current. Consider the operating frequency, the input condition and the output condition when selecting the resonant cap, the leakage inductance, and the magnetic inductance. Refer to MP4652 LLC design notes for details. On the secondary side, the diodes D6, D8, D9, and D10 rectify the LLC current. These diodes must be able to handle the output voltage and the output current: they are 200V/3A diodes in this circuit. The balance cap C23 blocks the different voltage of the 2 LED strings and balances the currents through them. The value of C23 is usually between 0.22μF and 1μF. Its voltage must be higher than the output voltage because of the LED string short condition. The output capacitors C28 and C29 filter the ripple current of the LLC output current to obtain a DC current for the LED strings. C28 and C29 also store the energy from the primary side at the PWM off interval, as MP4652 implements continuous gate driver at PWM off interval to eliminate the audible noise. The value of C28 and C29 must be large enough to handle this energy to prevent excessive output voltage spikes: Capacitor values from 4.7μF to 22μF are typical for this application. The voltage stress of these output capacitors should be higher than the maximum output voltage. Control Circuit MP4652 controls the power MOSFETs Q3 and Q4 in the power stage through the gate driver transformer T1. As MP4652 outputs regulated 9V gate driver signals, the turn ratio of T1 goes from 1:1:1 to 1:1.5:1.5. With its enhanced gate driver capability and regulated driver voltage, MP4652 can directly drive the MOSFETs through the gate driver transformer. MP4652 Rev. 1.01 9/23/2011 Because an LLC is a frequency-controlled power stage, MP4652 uses an external amplifier U3 to regulate the LED current and output the frequency control voltage. During the PWM ON interval, PWMOUT is high and the dimming MOSFET Q8 turns on. The LED current feeds back to the inverting input of U3. With the compensation network, U3 outputs the frequency control voltage and regulates the LED current. During the PWM OFF interval, the dimming MOSFET turns off, and LED current feedback goes low. An external voltage applied to the inverting input of U3 through D5 pulls the output of U3 low. This design helps the circuit work at a high frequency during the PWM OFF interval and limits the output energy delivered from the primary side to the secondary side. Together with the output capacitors C28 and C29, this circuit helps to eliminate current overshot during PWM ON. The signal MOSFETs Q6 and Q7 are turned off during the PWM OFF interval, and C21 and C24 can hold their value during this time. This helps the control loop to respond quickly during the PWM ON interval and to achieve fast PWM dimming. R35 and C12 on the FSET pin form a frequency soft-start circuit at start up. The maximum output voltage is fed back to OVP pin through the voltage dividers. MP4652 can protect the open LED condition through the OVP pin. When the voltage on OVP pin is higher than 2.38V for 7μs, IC enters Fault Mode. The secondary side current is fed back to SSD pin through R47, R46 and C25. When short condition occurs, the secondary side current grows and the SSD voltage falls. When SSD voltage falls below 2.36V for 7μs, the IC enters fault mode. In Fault Mode, the PWMOUT pulls low. The device then outputs an error signal to the system with the addition of an external logic circuit,. Please refer to the design notes for details of the components selection. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 16 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER Circuit Performance GL GL VLED 1.13ILED 1.13ILED VLED IPri IPri Steady State Start Up GL GL VLED VLED 1.13ILED 1.13ILED IPri IPri 90% PWM Dimming GL GL VLED VLED 1.13ILED 1.13ILED IPri IPri 1% PWM Dimming MP4652 Rev. 1.01 9/23/2011 50% PWM Dimming 0.2% PWM Dimming www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 17 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER LED Current vs. PWM Duty Cycle GL 300 LED Current(mA) 250 VLED 200 Error 150 100 IPri 50 0 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% PWM Duty Cycle PWM Dimming Linearity Open LED Protection GL GL SSD SSD Error Error Ishort Ishort Short LED+ to LED- Protection MP4652 Rev. 1.01 9/23/2011 Short LED+ to GND Protection www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 18 MP4652—HIGH PERFORMANCE OFF-LINE TV LED DRIVER PACKAGE INFORMATION SOIC16 0.386( 9.80) 0.394(10.00) 0.024(0.61) 9 16 0.063 (1.60) 0.150 (3.80) 0.157 (4.00) PIN 1 ID 0.050(1.27) 0.228 (5.80) 0.244 (6.20) 0.213 (5.40) 8 1 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) SEATING PLANE 0.050(1.27) BSC 0.013(0.33) 0.020(0.51) 0.004(0.10) 0.010(0.25) 0.0075(0.19) 0.0098(0.25) SEE DETAIL "A" SIDE VIEW FRONT VIEW NOTE: 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0o-8o 0.016(0.41) 0.050(1.27) 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AC. 6) DRAWING IS NOT TO SCALE. DETAIL "A" NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP4652 Rev. 1.01 9/23/2011 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. 19