深圳市美芯微电子有限公司麦肯单片机授权一级代理商 电话：０７５５－３６８５７６０９／２７９４５５５１／２９４９１８８２ 地址：深圳市宝安区宝源路名优产品采购中心Ｂ１区７２１室 1. General Description This EPROM-Based 8-bit micro-controller uses a fully static CMOS design technology to achieve high speed, small size, low power and high noise immunity. On chip memory includes 2K words EPROM and 80 bytes static RAM. Four comparator inputs with external Vref (not for 18 pin package) are also provided. MDT10P223 Disable Sleep Mode for power saving 8-bit real time clock/counter(RTCC) with 8-bit programmable prescaler 4 types of oscillator can be selected by programming option: RC－Low cost RC oscillator LFXT－Low frequency crystal oscillator XTAL－Standard crystal oscillator EXT-R－Low cost R oscillator 2 oscillator start-up time can be selected by programming option: 2. Features EXT-R、RC：150 μs,20ms Fully CMOS static design 8-bit data bus On chip EPROM size : 2 K words Internal RAM size : 80 bytes (72 general purpose registers, 8 special registers) 36 single word instructions 14-bit instructions 2-level stacks Operating voltage : 2.3V ~ 5.5 V Operating frequency : 0 ~ 20 MHz The most fast execution time is 200 ns under 20 MHz in all single cycle instructions except the branch instruction Addressing modes include direct, indirect and relative addressing modes Power-on Reset (POR), 4 Channel comparator Power edge-detector Reset 4 types of power edge-detector reset: 1.8v , 2.1v , always enable 1.8v and XT、LF ：20ms,80ms On-chip RC oscillator based Watchdog Timer(WDT) can be operated freely 12 I/O(for 18 pins package),14 I/O(for 20 pins package),16 I/O(for 22/24 pins package) pins with their own independent direction control 16 I/O pins own independent weak pull-high and can be enabled by software. WDT can be enabled by software if WDT Disable is selected in user option. 3. Applications This MDT10P223 can be used in appliance motor control, high speed automotive, remote transmitters/receivers, pointing devices, telecommunications, small instruments, chargers, toys, automobile and PC peripheral … etc This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.1 2010/06 Ver. 1.0 MDT10P223 4. Pin Assignment MDT10P223P11 MDT10P223S11 PA5 1 20 PA4/VREF PA2/CIC2 2 19 PA1/CIC1 PA3/CIC3 3 18 PA0/CIC0 RTCC 4 17 OSC1 /MCLR 5 16 OSC2 Vss 6 15 Vdd PB0 7 14 PB7 PB1 8 13 PB6 PB2 9 12 PB5 PB3 10 11 PB4 MDT10P223K11 PA7 PA5 PA2/CIC2 PA3/CIC3 RTCC /MCLR Vss PB0 PB1 PB2 PB3 1 2 3 4 5 6 22 21 20 19 18 17 PA6 PA4/VREF PA1/CIC1 PA0/CIC0 OSC1 OSC2 7 8 9 10 11 16 15 14 13 12 Vdd PB7 PB6 PB5 PB4 MDT10P223S21 NC PA7 PA5 PA2/CIC2 PA3/CIC3 RTCC /MCLR Vss PB0 PB1 PB2 PB3 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 NC PA6 PA4/VREF PA1/CIC1 PA0/CIC0 OSC1 OSC2 Vdd PB7 PB6 PB5 PB4 This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.2 2010/06 Ver. 1.0 MDT10P223 5.Ordering Informations MARK ROM (Words) RAM (Bytes) I/O Comparators Timer (8 bit) Package Mil MDT10P223S21 2.0K 80 16 4 1 24-SOP 300 mil MDT10P223K11 2.0K 80 16 4 1 22-SKINNY 300 mil MDT10P223P11 2.0K 80 14 4 1 20-DIP 300 mil MDT10P223S11 2.0K 80 14 4 1 20-SOP 300 mil This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.3 2010/06 Ver. 1.0 MDT10P223 6. Block Diagram Two Levels Stack EPROM 2KX14 RAM 72X8 Port B 11 bits (Pull hi) 14 bits 11 bits Program Counter Port PB0~PB7 8 bits Instruction Register Special Register OSC1 OSC2 MCLR D0~D7 Port PA0~PA7 (22,24 pins) PA0~PA5 (20 pins) PA0~PA3 (18 pins) Port A 8 bits (pull hi) Oscillator Circuit Instruction Decoder Control Circuit CMR0~CMR5 Data 8-bit Comparator mode Register Power on Reset PED Working Register Status Register ALU 8-bit Timer/Counter WDT/OST Timer Prescaler RTCC This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.4 2010/06 Ver. 1.0 MDT10P223 7. Pin Function Description Pin Name I/O Function Description PA0~PA7 I/O PA0~PA3 : TTL input level or comparator input PA4 : TTL input level or comparator VREF input PA5~PA7 : TTL input level PB0~PB7 I/O Port B, TTL input level RTCC I Real Time Clock/Counter, Schmitt Trigger input levels /MCLR I Master Clear, Schmitt Trigger input levels OSC1 I Oscillator Input OSC2 O Oscillator Output Vdd Power supply Vss Ground NC Unused ,do not connect 8. Memory Map (A) Register Map Address Description 00 Indirect Addressing Register 01 RTCC 02 PC 03 STATUS 04 MSR 05 Port A 06 Port B 07 Control register for comparators 08~0F Internal RAM, General Purpose Register 10~1F Internal RAM, Memory bank 0 30~3F Internal RAM, Memory bank 1 50~5F Internal RAM, Memory bank 2 70~7F Internal RAM, memory bank 3 This specification are subject to be changed without notice. Any latest information Please visit ple ase http;//www.mdtic.com.tw visit http;//www.mx mcu.com.cn P.5 2010/06 Ver. 1.0 MDT10P223 (1) IAR ( Indirect Address Register) : R0 (2) RTCC (Real Time Counter/Counter Register) : R1 (3) PC (Program Counter) : R2 Write PC, CALL --- always 0 LJUMP, JUMP, LCALL --- from instruction word RTWI, RET --- from STACK A10 A9 A8 A7~A0 Write PC, JUMP, CALL --- from STATUS b6-b5 LJUMP, LCALL --- from instruction word RTWI, RET --- from STACK Write PC --- from ALU LJUMP, JUMP, LCALL, CALL --- from instruction word RTWI, RET --- from STACK (4) STATUS (Status register) : R3 Bit Symbol Function 0 C Carry bit 1 HC Half Carry bit 2 Z Zero bit 3 PF Power loss Flag bit 4 TF Time overflow Flag bit page ROM Page select bit : 5-6 00 : 000H --- 1FFH 01 : 200H --- 3FFH 10 : 400H --- 5FFH 11 : 600H --- 7FFH 7 —— General purpose bit This specification are subject to be changed without notice. Any latest information Please pleasevisit visithttp;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.6 2010/06 Ver. 1.0 MDT10P223 (5) MSR (Memory Select Register) : R4 Memory Select Register : 00 : 10~1F 01 : 30~3F 10 : 50~5F 11 : 70~7F b7 b6 b5 b4 b3 b2 b1 Read only “1” Indirect Addressing Mode (6) PORT A : R5 PA7~PA0, I/O Register for 22, 24 pins PA5~PA0, I/O Register for 20 pins PA3~PA0, I/O Register for 18 pins (7) PORT B : R6 PB7~PB0, I/O Register (8) CMR(Comparator Mode Register) : R7 Bit Function 0 0: Define PA0 as TTL input 1: Define PA0 as comparator input 1 0: Define PA1 as TTL input 1: Define PA1 as comparator input 2 0: Define PA2 as TTL input 1: Define PA2 as comparator input 3 0: Define PA3 as TTL input 1: Define PA3 as comparator input 5:4 Reference Voltage select 00: 1/4 VDD 01: 1/2 VDD 10: 3/4 VDD 11: VREF (External pin and PA4 must be set to input 7:6 Register bits This specification are subject to be changed without notice. Any latest information Please visitsehttp;//www.mdtic.com.tw plea visit http;//www.mx mcu.com.cn P.7 2010/06 Ver. 1.0 b0 MDT10P223 (9) TMR (Time Mode Register) Bit Symbol 2—0 PS2—0 3 PSC 4 TCE 5 TCS 6 PHEN Function Prescaler Value RTCC rate WDT rate 0 0 0 1:2 1:1 0 0 1 1:4 1:2 1:8 0 1 0 1:4 1 : 16 0 1 1 1:8 1 0 0 1 : 16 1 : 32 1 0 1 1 : 64 1 : 32 1 1 0 1 : 128 1 : 64 1 1 1 1 : 256 1 : 128 Prescaler assignment bit : 0 — RTCC 1 — Watchdog Timer RTCC signal Edge : 0 — Increment on low-to-high transition on RTCC pin 1 — Increment on high-to-low transition on RTCC pin RTCC signal set : 0 — Internal instruction cycle clock 1 — Transition on RTCC pin Global Pull High Enable set： 0 — Enable weak internal Pull High 1 — Disable weak internal Pull High This bit will be ignored if the “I/O pull-hi” is disable in user option. 7 WDTEN Watchdog timer Enable set : 0 — Enable WDT 1 — Disable WDT (10) CPIO A, CPIO B (Control Port I/O Mode Register) The CPIO register is “write-only” ＝“0”, I/O pin in output mode; ＝“1”, I/O pin in input mode. (11)Set Pull hi mode The Pull hi register is “write-only” ＝“0”, Disable I/O pin Pull hi ＝“1”, Enable I/O pin Pull hi Do the CPIO instructions twice within three instructions on the same I/O port, the second CPIO instruction will enable the corresponding I/O pins pull-hi when global pull high Enable. Correct instruction sequence to enable pull-high Ex1: LDWI 0FFH CPIO 06H ←First：set PortB I/O LDWI 0FFH ←Second CPIO 06H ←Third：set PortB Pull hi This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.8 2010/06 Ver. 1.0 MDT10P223 Ex2： LDWI 0FFH CPIO 06H CPIO 06H ←First：set PortB I/O ←Second：set PortB Pull hi Incorrect instruction sequence to enable pull-high Ex1: (over three instructions) LDWI 0FFH CPIO 06H ←First：set PortB I/O LDWI 0FFH ←Second NOP ←Third CPIO 06H ←Fourth：set PortB I/O Ex2： LDWI CPIO CPIO (Different port) 0FFH 06H ←First：set PortB I/O 05H ←set PortA I/O (11) User Options by writer programming : OSC Type Description Ext-R Low cost external R oscillator XT Crystal oscillator LF Low frequency crystal oscillator RC Low cost RC oscillator OST Description 150 us\ 20 ms OST= 150 us (for RC) or 20ms (for crystal) 20 ms\80 ms OST= 20 ms (for RC) or 80ms (for crystal) WDT Disable Enable Description Watchdog timer disable all the time (can be enabled by software,if software WDT enable) Watchdog timer enable all the time (always enable) PED Disable Low level Mid level L(all on) Description PED disable 1.8V (disable during sleep) 2.1V (disable during sleep) always Enable 1.8V Security Disable Enable Security Disable Security Enable Description This specification are subject to be changed without notice. Any latest information Please pleasevisit visithttp;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.9 2010/06 Ver. 1.0 MDT10P223 Software WDT Enable Disable Freq x 2 Enable Disable Description WDT can be enabled by software WDT can’t be enabled by software Description System clock is doubled System clock is the oscillation frequency I/O pull-hi Enable Description Allow software to enable independent I/O pin pull-high Disable all pull-high resistors Disable CLKOUT Enable Disable Description Allow OSC2 to output CLKOUT signal OSC2 will be floating Reset on Err Enable Disable Comparators Enable Disable Description The MCU will be reset if two illegal instructions are executed continuously. Disable the illegal instruction reset function Description Allow software to enable comparators Disable all comparators (B) Program Memory Address Description 000- 7FF Program memory The starting address of the power on, external reset or WDT 7FF 9. Reset Condition for all Registers Register Address Power-On Reset /MCLR Reset WDT Reset CPIO A －－ 1111 1111 1111 1111 1111 1111 CPIO B －－ 1111 1111 1111 1111 1111 1111 TMR －－ 1111 1111 1111 1111 --11 1111 IAR 00h － － － RTCC 01h xxxx xxxx uuuu uuuu uuuu uuuu PC 02h 1111 1111 1111 1111 1111 1111 This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.10 2010/06 Ver. 1.0 MDT10P223 Register Address Power-On Reset /MCLR Reset WDT Reset STATUS 03h 0001 1xxx 000# #uuu 000# #uuu MSR 04h 100x xxxx 100u uuuu 1uuu uuuu PORT A 05h xxxx xxxx uuuuuuuu uuuu uuuu PORT B 06h xxxx xxxx uuuu uuuu uuuu uuuu CMR 07h 0000 0000 uuuu uuuu uuuu uuuu Note : u＝unchanged, x＝unknown, - ＝unimplemented, read as “0” #＝value depends on the condition of the following table Condition Status: bit 4 Status: bit 3 /MCLR reset (not during SLEEP) U u /MCLR reset during SLEEP 1 0 WDT reset (not during SLEEP) 0 1 WDT reset during SLEEP 0 0 10. Instruction Set Mnemonic Function Operands 010000 00000000 NOP No operation None 010000 00000001 CLRWT Clear Watchdog timer 0→WT 010000 00000010 SLEEP Sleep mode 0→WT, stop OSC TF, PF 010000 00000011 TMODE Load W to TMODE register W→TMODE None 010000 00000100 RET Return Stack→PC None Control I/O port register W→CPIO Store W to register W→R Load register R→t Z Instruction Code Status TF, PF 010000 00000rrr CPIO 010001 1rrrrrrr STWR 011000 trrrrrrr LDR 111010 iiiiiiii LDWI I Load immediate to W I→W None 010111 trrrrrrr SWAPR R, t Swap halves register None 011001 trrrrrrr INCR Increment register [R(0~3)↔R(4~7)] →t R + 1→t 011010 trrrrrrr R + 1→t None 011011 trrrrrrr INCRSZ R, t Increment register, skip if zero ADDWR R, t Add W and register W + R→t C, HC, Z 011100 trrrrrrr SUBWR R, t Subtract W from register C, HC, Z 011101 trrrrrrr DECR R ﹣W→t (R+/W+1→t) R ﹣1→t 011110 trrrrrrr DECRSZ R, t Decrement register, skip if zero ANDWR R, t AND W and register 010010 trrrrrrr R Operating R R, t R, t R, t Decrement register r None None Z Z R ﹣1→t None R ∩ W→t Z This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.11 2010/06 Ver. 1.0 MDT10P223 110100 iiiiiiii Mnemonic Function Operands ANDWI i AND W and immediate i ∩ W→W Z 010011 trrrrrrr IORWR R, t Inclu. OR W and register R ∪ W→t Z 110101 iiiiiiii IORWI i Inclu. OR W and immediate i ∪ W→W Z 010100 trrrrrrr XORWR R, t Exclu. OR W and register R ♁ W→t Z 110110 iiiiiiii XORWI i i ♁ W→W Z 011111 trrrrrrr COMR /R→t Z 010110 trrrrrrr RRR R, t Rotate right register C 010101 trrrrrrr RLR R, t Rotate left register Clear working register R(n) →R(n-1), C→R(7), R(0)→C R(n)→r(n+1), C→R(0), R(7)→C 0→W Clear register 0→R Z Instruction Code Operating Exclu. OR W and immediate R, t Complement register 010000 1xxxxxxx CLRW C Z 010001 0rrrrrrr CLRR 0000bb brrrrrrr BCR R, b Bit clear 0→R(b) None 0010bb brrrrrrr BSR R, b Bit set 1→R(b) None 0001bb brrrrrrr BTSC R, b Bit Test, skip if clear Skip if R(b)=0 None 0011bb brrrrrrr BTSS R, b Bit Test, skip if set Skip if R(b)=1 None 100nnn nnnnnnnn LCALL n Long CALL subroutine None 101nnn nnnnnnnn LJUMP n Long JUMP to address n→PC, PC+1→Stack n→PC 110000 nnnnnnnn CALL n Call subroutine None 110001 iiiiiiii i Return, place immediate to W JUMP to address n→PC, PC+1→Stack Stack→PC,i→W None n→PC None RTWI 11001n nnnnnnnn JUMP R Status n None Note : W WT TMODE CPIO TF PF PC OSC Inclu. Exclu. AND n : : : : : : : : : : : : Working register Watchdog timer TMODE mode register Control I/O port register Timer overflow flag Power loss flag Program Counter Oscillator Inclusive ‘∪’ Exclusive ‘♁’ Logic AND ‘∩’ Immediate address b t : : 0 1 R : C : HC : Z : / : x : i : Bit position Target : Working register : General register General register address Carry flag Half carry Zero flag Complement Don’t care Immediate data ( 8 bits ) This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.12 2010/06 Ver. 1.0 MDT10P223 11. Electrical Characteristics (Operating temperature at 25℃). Sym Description Condition Vdd Operating voltage Min Typ Max Unit 2.3 6.0 V VIL Input Low Voltage PA, PB RTCC, /MCLR Vdd=5V Vdd=5V -0.6 -0.6 1.0 1.0 V V VIH Input high Voltage PA, PB RTCC, /MCLR Vdd=5V Vdd=5V 2.0 3.3 Vdd Vdd V V IIL Vdd=5V +/-1 µA Input leakage current VOL Output Low Voltage PA, PB Vdd=5V, IOL=20mA Vdd=5V, IOL=5mA 0.5 0.2 V V 3.4 4.5 V V Islp Sleep current (WDT disable) Vdd=5V, IOH= -20mA Vdd=5V, IOH= -5mA Vdd＝2.3 ~ 6.0 V Islp Sleep current (WDT enable) Vdd＝2.3 V 1 1.2 3.0 5.0 10 VOH Output High Voltage PA, PB 0.1 Vdd＝3.0 V Vdd＝4.0 V Vdd＝5.0 V Vdd＝6.0 V Vpr Power Edge-detector Reset Voltage Low level Mid level Twdt The basic WDT time-out cycle Vdd＝2.3 V Vdd＝3.0 V time Vdd＝4.0 V Vdd＝5.0 V Vdd＝6.0 V 1.6 1.9 1.0 μA μA μA μA μA μA 1.8 2.1 V V 28.5 25.0 21.9 20.3 19.1 mS mS mS mS mS TFLT /MCLR filter Vdd＝5.0 V 600 nS Icc Comparator Supply current (one comparator) Vdd=5.0v 15 μA Vref Input reference voltage Vdd=2.5v ~6.0v --- Comparator Response time V-=Vdd/4, V+=V- ± 0.2v V-=Vdd/2, V+=V- ± 0.2v Vdd=5.0v , V- = Vref V+ = (PA0~PA3) Vdd-0.8 v 8 8 V μS μS This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.13 2010/06 Ver. 1.0 MDT10P223 V-=Vdd3/4, V+=V- ± 0.2v V-=VDD-0.8,V+=V± 0.2v 8 8 μS μS 12. Operating Current Temperature＝25 ℃, the typical value as followings : 12.1 OSC Type＝RC; WDT=Enable; @Vdd＝5.0 V PED=Disable Cext. (F) 3P 20P 100P 300P Rext. (Ohm) Frequency (Hz) Current (A) 4.7 K 9.16 M 1.40mA 10.0 K 5.6 M 1.00mA 47.0 K 1.44 M 350 μA 100.0 K 718.4 K 250 μA 300.0 K 245.2 K 200 μA 470.0 K 154.8 K 180 μA 4.7 K 4.72 M 820µA 10.0 K 2.73 M 550μA 47.0 K 649.6 K 250 μA 100.0 K 318.4 K 200 μA 300.0 K 107.2 K 170 μA 470.0 K 67.6 K 160 μA 4.7 K 1.68 M 400 μA 10.0 K 934 K 300 μA 47.0 K 212.8 K 200 μA 100.0 K 103.2 K 175 μA 300.0 K 34.6 K 160 μA 470.0 K 21.8 K 150 μA 4.7 K 716 K 300 μA 10.0 K 392.4 K 220 μA 47.0 K 87.6 K 170 μA 100.0 K 42.4 K 160 μA 300.0 K 14.2 K 155 μA 470.0 K 8.8 K 145 μA This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.14 2010/06 Ver. 1.0 MDT10P223 12.2 OSC Type＝LF (OSC1&OSC2 External Cap about 10P); WDT－Disable ﹔ PED=Disable Voltage/Frequency 32 K (Ext 50P) 455 K [email protected] μA 1M Sleep 40.0 μA ＜1.0 μA 2.3 V 5.6 μA 3.0 V 13.0 μA 50.0 μA 70.0 μA ＜1.0 μA 4.0 V 30.0 μA 93.0 μA 125.0 μA ＜1.0 μA 5.0 V 50.0 μA 150 μA 190.0 μA ＜1.0 μA 6.0 V 135.0 μA 230.0 μA 270.0 μA ＜1.0 μA 12.3 OSC Type＝XT (OSC1&OSC2 External Cap about 10P); WDT－ Enable ;PED=Disable Voltage/Frequency 1M 4M 10 M Sleep 2.1 V 39.0 μA 120.0 μA 280.0 μA ＜1.0 μA 3.0 V 85.0 μA 240.0 μA 480.0 μA 1.2 μA 4.0 V 160.0 μA 400.0 μA 660.0 μA 3.0 μA 5.0 V 260.0 μA 600.0 µA 1.1 mA 5.0 μA 6.0 V 400.0 μA 840.0 µA 1.5 mA 10.0 μA 12.4 OSC Type＝EXTR ; WDT－Enable; @ Vdd＝5.0 V PED=Enable Rext. (Ohm) 6.2 K 15.0 K Frequency (Hz) Current (A) 2.3V 6.56 M 1.7 m 3.0V 7.10M 1.8 m 4.0V 7.62M 2.8 m 5.0V 7.93 M 3.8 m 5.5V 8.02M 4.3 m 2.3V 3.62 M 750 u 3.0V 3.90M 1.1 m 4.0V 4.09M 1.7 m 5.0V 4.19 M 2.4 m 5.5V 4.22M 2.7 m This specification are subject to be changed without notice. Any latest information Please pleasevisit visithttp;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.15 2010/06 Ver. 1.0 MDT10P223 Rext. (Ohm) 75.0 K 180.0 K 510.0 K 1.1 M 2.4 M Frequency (Hz) Current (A) 2.3V 965.7 K 220 u 3.0V 995.7 K 330 u 4.0V 1.01 M 600 u 5.0V 1.02 M 880 u 5.5V 1.02 M 1.1 m 2.3V 417.7 K 100 u 3.0V 424.9 K 185 u 4.0V 428.9 K 380 u 5.0V 431.3 K 640 u 5.5V 432.4 K 790 u 2.3V 154.2 K 45 u 3.0V 155.5 K 110 u 4.0V 156.3 K 280 u 5.0V 157 K 510 u 5.5V 157.3 K 640 u 2.3V 72.8 K 30 u 3.0V 73.2 K 90 u 4.0V 73.6 K 250 u 5.0V 73.9 K 480 u 5.5V 74 K 615 u 2.3V 33.4 K 20 u 3.0V 33.5 K 80 u 4.0V 33.7 K 240 u 5.0V 33.8 K 470 u 5.5V 33.9 K 600 u This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.16 2010/06 Ver. 1.0 MDT10P223 12.5 Power Edge-detector Reset Voltage (Not in Sleep Mode), @ Vdd＝5.0 V (PED: Enable) Vpr(Low level)≦1.6~1.8 V Vpr(Mid level)≦1.9~2.1 V Vpr ﹕Vdd (Power Supply) PS. If PED_Enable then Internal Power_on_reset will be off 13. Port A Equivalent Circuit PA0-PA3 C o n tro l P u ll-h ig h P u ll h ig h R e s is to r D I/O C o n tro l C K Q I/O C o n tro l L a tc h Q B P o rt I/O P in D D a ta O /P L a tc h W rite G QB In p u t R e s is to r D a ta Bus 0 QB R ea d G T T L in p u t le v e l D D a ta I/P L a tc h S 1 + - VREF c o m p a ra to r le v e l C o m p a rto r C o n tro l This specification are subject to be changed without notice. Any latest information Please pleasevisit visithttp;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.17 2010/06 Ver. 1.0 MDT10P223 PA4 Control Pull-high Pull high Resistor Q D I/O Control C K I/O Control Latch Q B Port I/O Pin D Data O/P Latch W rite G Q B Input Resistor Data Bus Rea d G com parator enable D QB Data I/P Latch TTL Input Level 3 2 Vref 1 S0 S1 CM R_4 CM R_5 0 3/4 VDD 1/2 VDD 1/4 VDD PA5-PA7 Control Pull-high Pull high Resistor Q D I/O Control C K I/O Control Latch Q B Port I/O Pin D Data O/P Latch Write G Data Bus Q B D QB Rea d G Data I/P Latch TTL Input Level Input Resistor This specification are subject to be changed without notice. Any latest information Please pleasevisit visithttp;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.18 2010/06 Ver. 1.0 MDT10P223 Port B Equivalent Circuit Control Pull-high Pull high Resistor D I/O Control C K Q I/O Control Latch Q B Port I/O Pin D Data O/P Latch Write G Data Bus Q B D QB Rea d G Data I/P Latch TTL Input Level Input Resistor This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.19 2010/06 Ver. 1.0 MDT10P223 14. MCLRB and RTCC Input Equivalent Circuit R≒1K MCLRB Schmitt Trigger R≒1K RTCC Schmitt Trigger This specification are subject to be changed without notice. Any latest information Please pleasevisit visithttp;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.20 2010/06 Ver. 1.0 MDT10P223 15. External Capacitor Selection For Crystal Oscillator @ Vdd＝5.0 V Osc. Type Resonator Freq. Capacity Range 10 MHz 10 pF ~ 50 pF 4 MHz 10 pF ~ 50 pF 1 MHz 20 pF ~50 pF 1 MHz 20 pF ~ 30 pF 455 KHz 20 pF ~30 pF 32 KHz 20 pF ~30 pF XT LF XT Oscillator Mode LF Oscillator Mode Ext-R Oscillator Mode MDT10P223 OSC1 MDT10P223 OSC2 OSC1 OSC2 RC Oscillator Mode MDT10P223 OSC1 OSC2 Fosc/4 C1 C2 The above values of the external capacitor are for reference only, but the higher capacitance also increases the start-up time. This specification are subject to be changed without notice. Any latest information Please visit please visit http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.21 2010/06 Ver. 1.0