深圳市美芯微电子有限公司 麦肯单片机授权一级代理商 MDT10P5701 电话；０７５５－３６８５７６０９／２７９４５５５１／２９４９１８８２ 地址：深圳市宝安区宝源路名优产品采购中心Ｂ１区７２１室 1. General Description 3. IC Characteristic This EPROM-Based 8-bit micro-controller uses a fully ◆Small volume,Less PIN,Easy control,Suitable for any static CMOS technology process to achieve higher small controlled. speed and smaller size with the low power ◆Have 8 level stack,easy for writing program consumption and high noise immunity．On chip controlled. memory includes 1K*14 words of ROM,and 128*8 ◆Possession of A/D_10BIT, showing analogy data. bytes of static RAM. 4. 2. Features Applications The application areas range from appliance motor The followings are some of the features on hardware control and high speed automotive to low power and software: remote transmitters/receivers,small ◆8-bit data bus and fully CMOS static design. instruments,chargers,toy,automobile and PC ◆On chip EPROM size:1K words and 14-bit pe-ripheral...etc. instructions long. ◆Internal RAM size:128 Bytes. 5. Pin Assignment ◆37 single word instructions. A1/A3 PINS I/O Package ◆8-level stacks. 10P5701_MS11 A1 10 8 MSOP ◆Operating voltage: 10P5701_SS11 A1 10 8 SSOP 2.5V ~ 5.5V (PED Select with LOW) 10P5701_MS13 A3 10 7 MSOP 4.5V ~ 5.5V (PED Select with HIGH) 10P5701_SS13 A3 10 7 SSOP ◆Operating frequency:4MHz / 8MHz. ◆The most fast execution time is 500ns under 8 MHz in all single cycle instructions except the branch instruction. ◆Addressing modes include direct,indirect and relative addressing modes. PA6 1 10 PA7 VDD 2 9 VSS PA5 3 8 PA0/AIC0 PA4/AIC3 4 7 PA1/AIC1/VREF PA3 5 6 PA2/T0CKI/AIC2 ◆Power –on Reset. 10P5701_MS11 ◆Power edge-detector Reset,LOW、MIDDLE、HIGH. 10P5701_SS11 ◆Sleep Mode for Power saving. ◆IRC－Inside Oscillator 4MHz/8MHz. ◆TMR0:8-Bit real time clock/counter. ◆A/D Transform mode: -4 Channel,using all in one A/D transform model. -10-bit transform result. ◆Interrupt source: -external INT pin、TMR0. -A/D transform、PA pin change. PA6 1 10 PA7 VDD 2 9 VSS PA5 3 8 PA0/AIC0 PA4/AIC3 4 7 PA1/AIC1/VREF MCLRB 5 6 PA2/T0CKI/AIC2 10P5701_MS13 10P5701_SS13 ◆Automatic watchdog clock(WDT). ◆8/7 personal controller I/O pin. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.1 2010/09 VER 1.1 MDT10P5701 6. Pin Function Description Pin Name I/O Function Description PA7~PA5 I/O Port A, TTL input level. PA4/AIC3 I/O Port A, TTL input level. PA3 I Port A, TTL input level. Input only. PA2/T0CKI/AIC2/INT I/O Port A, Schmitt Trigger input levels. PA1/AIC1/VREF I/O Port A, TTL input level / Schmitt Trigger input levels. PA0/AIC0 I/O Port A, TTL input level / Schmitt Trigger input levels. MCLRB I Master Clear. VDD Power supply VSS Ground 7. Configurable options Address Oscillator Type Description 8MHz Watchdog Timer 8. Description HIGH 4MHz Oscillator start timer Address Power-edge Detect PED 75ms 0ms MID LOW DISABLE ENABLE Security state DISABLE ENABLE DISABLE Program Memory ROM 000H-3FFH 1K Page PAGE_0 Address 000H-3FFH 1K Description 000H:reset vector 004H:Interrupt vector This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.2 2010/09 VER 1.1 MDT10P5701 9. Register Map Address Description Address BANK0 Description BANK1 00H IAR 01H RTCC 02H PCL 03H STATUS 04H MSR 05H Port A 0AH PCHLAT 0BH INTS 0CH PIFB1 81H TMR 85H CPIO A 8CH PIEB1 8EH PSTA 1EH ADRES 9EH ADRESL 1FH ADS0 9FH ADS1 20H~7FH General purpose register A0H~BFH General purpose register 10. Reset condition for all registers Register Address POR or PED reset /MCLR or WDT reset Wake-up from sleep IAR 00h N/A N/A N/A RTCC 01h xxxx xxxx uuuu uuuu uuuu uuuu PC 0Ah,02h 0000 0000 0000 0000 0000 0000 PC+1 STATUS 03h 0001 1xxx 000# #uuu 000# #uuu MSR 04h xxxx xxxx uuuu uuuu uuuu uuuu PORT A 05h xxxx xxxx uuuu uuuu uuuu uuuu INTS 0Bh 0000 000x 0000 000u uuuu uuuu PIFB1 0Ch -0-- ---- -0-- ---- -u-- ---- ADRES 1Eh xxxx xxxx uuuu uuuu uuuu uuuu ADS0 1Fh 0000 00-0 0000 00-0 uuuu uu-u TMR 81h 1111 1111 1111 1111 uuuu uuuu CPIOA 85h 1111 1111 1111 1111 uuuu uuuu PIEB1 8Ch -0-- 0000 -0-- 0000 -u—uuuu PSTA 8Eh ---- --0- ---- --u- ---- --u- ADRESL 9Eh xxxx xxxx uuuu uuuu uuuu uuuu ADS1 9Fh 0--- -000 0--- -000 u--- -uuu Note : u＝unchanged, x＝unknown, - ＝unimplemented, read as “0” This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.3 2010/09 VER 1.1 MDT10P5701 #＝value depends on the condition of the following table Condition Status: bit 4 Status: bit 3 PSTA: bit 1 /MCLR reset (not during SLEEP) u u u /MCLR reset during SLEEP 1 0 u WDT reset (not during SLEEP) 0 1 u WDT reset during SLEEP 0 0 u POR : Power-on reset 1 1 0 PED : Power-edge-detector 1 1 u Note : u＝unchanged, x＝unknown, - ＝unimplemented, read as “0” 11. Register Description IAR:00H RTCC:01H PC (Program Counter): R02, R0A. PC A11 A[10:8] Write PC --- from PCHLAT Write PC --- A[7:0] Write PC --- from ALU LJUMP, LCALL --- from instruction word LJUMP, LCALL --- from instruction word from PCHLAT RTIW, RET --- from STACK RTIW, RET, RTFI --- from STACK STATUS(Status register):03H Bit Symbol Function 0 C Carry bit 1 HC Half Carry bit 2 Z Zero bit 3 /PF Power loss Flag bit 4 /TF WDT Timer overflow Flag bit Register Bank Select bit 5 RBS0 0: 00H~7FH (Bank0) 1: 80H~FFH (Bank1) MSR(Memory Bank Select Register):04H PORT A:05H PA7~PA0,I/O Register. This specification are subject to be changed without notice. Any latest information please preview http;//www.mx mcu.com.cn http;//www.mdtic.com.tw P.4 2010/09 VER 1.1 MDT10P5701 INTS(Interrupt Status Register):0BH Bit Symbol Function 0 RAIF PA0.1.3 change interrupt flag. Set when PA0.1.3 inputs change. 1 INTF Set when INT interrupt occurs. INT interrupt flag. 2 TIF Set when TMR0 overflows. 3 RAIE 4 INTS 5 TIS 6 PEIE 7 GIS 0: disable PA013 change interrupt. 1: enable PA013 change interrupt. 0: disable INT interrupt. 1: enable INT interrupt. 0: disable TMR0 interrupt. 1: enable TMR0 interrupt. 0: disable all peripheral interrupt. 1: enable all peripheral interrupt. 0: disable global interrupt. 1: enable global interrupt. PIFB1(Peripheral Interrupt Flag Bit):0CH Bit Symbol Function A/D interrupt flag 6 ADIF 0: A/D conversion is not complete 1: A/D conversion completed ADRES:1EH A/D result register high byte. ADS0(A/D Status Register):1FH Bit Symbol Function 0 ADRUN 2 GO/DONEB 4~3 CHS[1:0] 00: AIC0, 01: AIC1, 10: AIC2, 11: AIC3 7~6 ASCS[1:0] 01: fosc/8, 10: fosc/32, 11: fosc/32 0: A/D converter module is shut off and consumes no operating current 1: A/D converter module is operating 0: A/D conversion not in progress 1: A/D conversion in progress This specification are subject to be changed without notice. Any latest information please preview http;//www.mx mcu.com.cn http;//www.mdtic.com.tw P.5 2010/09 VER 1.1 MDT10P5701 TMR(Time Mode Register):81H Bit 2~0 Symbol Function Prescaler Value RTCC rate WDT rate 000 1:2 1:1 001 1:4 1:2 010 1:8 1:4 011 1:16 1:8 100 1:32 1:16 101 1:64 1:32 110 1:128 1:64 111 1:256 1:128 PS[2:0] 3 PSC 4 TCE 5 TCS 6 IES 7 PAPH 0: RTCC 1: Watchdog Timer 0: Increment on low-to-high transition on T0CKI pin 1: Increment on high-to-low transition on T0CKI pin 0: Internal instruction cycle clock 1: Transition on T0CKI pin 0: Interrupt on falling edge on PA2 1: Interrupt on rising edge on PA2 0: PA0.1.2.4.5.6.7 pull-hi are enable 1: PA0.1.2.4.5.6.7 pull-hi are disable CPIO A(Control Port I/O Mode Register):85H 【0】output mode.【1】input mode. PIEB1:8CH Bit Symbol 6 ADIE Function 0: disable A/D interrupt 1: enable A/D interrupt PSTA:8EH Bit Symbol 1 PORB Function 0: Power on Reset occurred 1: No Power on Reset occurred ADRESL:9EH A/D result register low byte This specification are subject to be changed without notice. Any latest information please preview http;//www.mx mcu.com.cn http;//www.mdtic.com.tw P.6 2010/09 VER 1.1 MDT10P5701 ADS1(A/D Status Register):9FH Bit Symbol Function 0 0 0:PA0124 analog input,VREF=VDD. 0 0 1:PA024 analog input,VREF=PA1. 0 1 0:PA012 analog input,VREF=VDD. 2~0 0 1 1:PA02 analog input,VREF=PA1. PAVM[2:0] 1 0 0:PA01 analog input,VREF=VDD. 1 0 1:PA0 analog input,VREF=PA1. 1 1 0:PA0 analog input,VREF=VDD. 1 1 1:PA0.1.2.3.4 digital I/O. 7 0: Align to the left, Bit5~bit0 of ADRESL are read as “0” ADFM 1: Align to the right, Bit7~bit2 of ADRES are read as “0” 12. Instruction Set Instruction Code Instruction Function Operating Status 010000 00000000 NOP No operation None 010000 00000001 CLRWT Clear Watchdog timer 0→WT TF, PF 010000 00000010 SLEEP Sleep mode 0→WT, stop OSC TF, PF 010000 00000011 TMODE W→TMODE None 010000 00000100 RET Stack→PC None 010000 00000rrr CPIO R W→CPIO R None 010001 1rrrrrrr STWR R Store W to register W→R None 011000 trrrrrrr LDR R, t Load register R→t Z 111010 iiiiiiii LDWI i Load immediate to W i→W None 010111 trrrrrrr SWAPR R, t Swap halves register [R(0~3)<->R(4~7)]→t None 011001 trrrrrrr INCR R, t Increment register R + 1→t Z 011010 trrrrrrr INCRSZ R, t Increment register, skip if zero R + 1→t None 011011 trrrrrrr ADDWR R, t Add W and register W + R→t C,HC,Z 011100 trrrrrrr SUBWR R, t Subtract W from register R-W→t or (R+/W+1→t) C,HC,Z 011101 trrrrrrr DECR R, t Decrement register R ﹣1→t Z 011110 trrrrrrr DECRSZ R, t Decrement register, skip if zero R ﹣1→t None 010010 trrrrrrr ANDWR R, t AND W and register R ∩ W→t Z 110100 iiiiiiii ANDWI i AND W and immediate i ∩ W→W Z 010011 trrrrrrr IORWR R, t Inclu. OR W and register R ∪ W→t Z 110101 iiiiiiii IORWI i Inclu. OR W and immediate i ∪ W→W Z 010100 trrrrrrr XORWR R, t Exclu. OR W and register R ♁ W→t Z 110110 iiiiiiii XORWI i Exclu. OR W and immediate i ♁ W→W Z 011111 trrrrrrr COMR R, t Complement register /R→t Z Return from subroutine This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.7 2010/09 VER 1.1 MDT10P5701 Instruction Code Instruction Function Operating R(n) →R(n-1), Status C 010110 trrrrrrr RRR R, t Rotate right register 010101 trrrrrrr RLR R, t Rotate left register 010000 1xxxxxxx CLRW Clear working register 0→W Z 010001 0rrrrrrr CLRR R Clear register 0→R Z 0000bb brrrrrrr BCR R, b Bit clear 0→R(b) None 0010bb brrrrrrr BSR R, b Bit set 1→R(b) None 0001bb brrrrrrr BTSC R, b Bit Test, skip if clear Skip if R(b)=0 None 0011bb brrrrrrr BTSS R, b Bit Test, skip if set Skip if R(b)=1 None 100nnn nnnnnnnn LCALL n Long CALL subroutine 101nnn nnnnnnnn LJUMP n Long JUMP to address n→PC None 110111 iiiiiiii ADDWI i Add immediate to W W+i→W C,HC,Z 110001 iiiiiiii RTWI i Return, place immediate to W Stack→PC,i→W None 111000 iiiiiiii SUBWI i Subtract W from immediate i-W→W C,HC,Z RTFI Return from interrupt Stack→PC,1→GIS None 010000 00001001 Note : W WT TMODE CPIO TF PF PC OSC Inclu. Exclu. AND : : : : : : : : : : : C→R(7), R(0)→C R(n)→r(n+1), C→R(0), R(7)→C Working register Watchdog timer TMODE mode register Control I/O port register Timer overflow flag Power loss flag Program Counter Oscillator Inclusive ‘∪’ Exclusive ‘♁’ Logic AND ‘∩’ n→PC, PC+1→Stack b t : : 0 1 R C HC Z / x i n : : : : : : : : : : C None Bit position Target Working register General register General register address Carry flag Half carry Zero flag Complement Don’t care Immediate data ( 8 bits ) Immediate address 13. Electrical Characteristics *Note: Temperature=25°C 1. Operation Current: INRC, WDT – disable, PRD – disable 4M 8M Sleep 2.5V 400uA 600uA 1uA 3.0V 500uA 700uA 1uA 4.0V 700uA 1.0mA 1uA 5.0V 900uA 1.3mA 1uA 5.5V 1.0mA 1.6mA 1uA This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.8 2010/09 VER 1.1 MDT10P5701 These parameters are for reference only. 2. Input Voltage (VDD = 5V): PA Min Max TTL VSS 0.8V Schmitt trigger VSS 0.6V TTL 3.0V VDD Schmitt trigger 3.8V VDD PA Min Max TTL VSS 0.4V Schmitt trigger VSS 0.2V TTL 2.0V VDD Schmitt trigger 2.6V VDD Vil Vih These parameters are for reference only. Input Voltage (VDD = 3V): Vil Vih These parameters are for reference only. 3. Output Voltage (VDD = 5V): PA Condition Voh 3.2V Ioh = -20mA Vol 0.9V Iol = 20mA Voh 4.2V Ioh = -5mA Vol 0.6V Iol = 5mA These parameters are for reference only. Output Voltage (VDD = 3V): PA Condition Voh 1.6V Ioh = -10mA Vol 0.6V Iol = 10mA Voh 2.1V Ioh = -5mA Vol 0.6V Iol = 5mA These parameters are for reference only. 4. Output Current (Max.) (VDD = 5V): Current Source current 25mA Sink current 40mA These parameters are for reference only. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw http;//www.mx mcu.com.cn P.9 2010/09 VER 1.1 MDT10P5701 Output Current (Max.) (VDD = 3V): Current Source current 8mA Sink current 18mA These parameters are for reference only. 5. The basic WDT time-out cycle time: Time 2.5V 24ms 3.0V 22ms 4.0V 20ms 5.0V 18ms 5.5V 17ms These parameters are for reference only. 6. PED reset voltage: Level Voltage High 4.0V+/-20% Middle 2.4V+/-20% Low 2.1V+/-20% These parameters are for reference only. 7. Pull high resistor: VDD 5V 3V PA0124567 50KΩ+/-20% 100KΩ+/-20% These parameters are for reference only. This specification are subject to be changed without notice. Any latest information please preview http;//www.mx mcu.com.cn http;//www.mdtic.com.tw P.10 2010/09 VER 1.1