ZXCD1000 HIGH FIDELITY CLASS D AUDIO AMPLIFIER SOLUTION DESCRIPTION The ZXCD1000 provides complete control and modulation functions at the heart of a high efficiency high performance Class D switching audio amplifier solution. In combination with custom output magnetics (ZXFN1000) and Zetex HDMOS MOSFET devices, the ZXCD1000 provides a high performance Class D audio amplifier with all the inherent benefits of Class D. applications. This lack of crossover distortion, sets the ZXCD1000 solutions quite apart from most other presently available low cost solutions, which in general suffer from severe crossover distortion problems. FEATURES The ZXCD1000 solution uses proprietary circuitry and magnetic technology to realise the true benefits of Class D without the traditional drawback of poor distortion performance. The combination of circuit design, magnetic component choice and layout are essential to realising these benefits. The ZXCD1000 reference designs give output powers up to 50W rms with typical open loop (no feedback) distortions of less than 0.2% THD + N over the entire audio frequency range at 90% full output power. This gives an extremely linear system. The addition of a minimum amount of feedback (10dB) further reduces distortion figures to give < 0.1 % THD + N typical at 1kHz. • 90% efficiency • 4 / 8 Ω drive capability • Noise Floor -115dB for solution • Flat response 20Hz - 20kHz • High gate drive capability ( 2200pF) • Very low THD + N 0.1% typical full power full band ( for the solution) • Complete absence of crossover artifacts • OSC output available for sync in multi-channel applications • Available in a 16 pin eQSOP package APPLICATIONS From an acoustic point of view, even more important than the figures above, is that the residual distortion is almost totally free of any crossover artifacts. This allows the ZXCD1000 to be used in true hi-fi • Automotive audio systems • Home Theatre • Multimedia • Wireless speakers • Portable audio • Sub woofer systems • Public Address system THD + N (%) Distortion v Power 8Ω open loop at 1kHz. 10W 1W 5W Output Power The plot shows Distortion v Power into an 8Ω load at 1kHz. This plot clearly demonstrates the unequalled performance of the Zetex solution. Typical distortion of 0.05% at 1W can be seen with better than 0.15% at 10W. Truly world class performance. ISSUE 1 -MARCH 2001 1 ZXCD1000 ABSOLUTE MAXIMUM RATINGS Terminal Voltage with respect to GND VCC Power Dissipation Operating Temperature Range Storage Temperature Range 20V 1W -40°C to 70°C -50°C to 85°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS TEST CONDITIONS (unless otherwise stated) VCC = 16V, TA = 25°C SYMBOL PARAMETER CONDITIONS LIMITS MIN V CC Operating Voltage Range 12 I ss Operating Quiescent Current V CC = 12V V CC = 18V V CC = 16V F osc Switching Frequency C osc = 330pF F osc(tol) Frequency Tolerance Vol OutA/B UNITS TYP MAX 16 18 40 40 40 V mA mA mA 150 200 250 kHz C osc = 330pF +/-25 % Low level output voltage No load 100 mV Voh OutA/B High level output voltage No load T Drive Output Drive Capability (OUT A / B Rise/Fall) Load Capacitance = 2200pF 5V5tol Internal Rail Tolerance 1µF Decoupling 5.23 5.5 5.77 9VA/Btol Internal Rail Tolerance 1µF Decoupling 8.32 8.75 9.18 V Audio A / B Input Impedence 1.35k 1.8k 2.3k Ohms Triangle A/B Input Impedence 1.35k 1.8k 2.3k Ohms 7.5 V 50 ns V Audio A / B Bias Level 2.95 3.1 3.25 V Triangle A/B Bias Level 2.95 3.1 3.25 V Osc A / B Amplitude 0.89 1.05 1.2 V ISSUE 1 - MARCH 2001 2 ZXCD1000 Pin number Pin Name Pin Description 1 Audio A Audio Input for Channel A 2 Triangle A Triangle Input for Channel A 3 Osc A Triangle Output 4 Dist No connection 5 C osc External timing capacitor node (to set the switching frequency) 6 Osc B Triangle Output (for slave ZXCD1000 in stereo application) 7 Triangle B Triangle Input for Channel B 8 Audio B Audio Input for Channel B 9 Gnd Small Signal GND 10 OUT B Channel B PWM Output to drive external Bridge MOSFETs 11 Gnd2 Power GND (for Output Drivers) 12 9VB Internal Supply Rail (Decouple with 1µF Cap) 13 VCC Input Supply Pin (Max = 18V) 14 9VA Internal Supply Rail (Decouple with 1µF Cap). 15 OUT A Channel A PWM Output to drive external Bridge MOSFETs 16 5V5 Internal Supply Rail (Decouple with 1µF Cap) Audio A Triangle A Osc A Dist Cosc Osc B Triangle B Audio B 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 5V5 Out A 9VA VCC 9VB Gnd2 Out B Gnd Figure 1 Pin Connection Diagram ISSUE 1 -MARCH 2001 3 ZXCD1000 ZXCD1000 Class D controller IC 4 5 3 Oscillator & Ramp Generator Triangle B Osc B Osc A Cosc Dist A triangular waveform is generated on chip and is brought out at the OscA and OscB outputs. The frequency of this is set (to ~200kHz) by an external capacitor (Cosc) and on chip resistor. The triangular waveform must be externally AC coupled back into the ZXCD1000 at the TriangleA and TriangleB inputs. AC 6 7 Triangle A coupling ensures symmetrical operation resulting in minimal system DC offsets. TriangleA is connected to one of the inputs of a comparator and TriangleB is connected to one of the inputs of a second comparator. The other inputs of these two comparators are connected to the AudioA and AudioB inputs, which are anti-phase signals externally derived from the audio input. The triangular wave is an order higher in frequency than the audio input (max 20kHz). The outputs of the comparators toggle every time the TriangleA/B and the (relatively slow) AudioA/B signals cross. A functional block diagram of the ZXCD1000 is shown in Figure 2. The on chip series regulators drop the external VCC supply (12V-18V) to the approximate 9V (9VA/9VB) and 5.5V (5V5) supplies required by the internal circuitry. 2 Osc Buffers Audio A 1 PWM Comp A 8 PWM Comp B Audio B O/P Driver PreDriver O/P Driver Out A 15 Out B 10 Internal 5V5 12 16 9 11 Gnd2 14 Gnd Internal 9V 5V5 13 9VA 9VB VCC PreDriver Figure 2. Functional Block Diagram ISSUE 1 - MARCH 2001 4 ZXCD1000 Triangle A/B PWM Comparator Audio A/B Audio A/B O/P Triangle A/B Comparator O/P (Duty Cycle = 50%) Figure 3a. Figure 3b. Triangle A/B Triangle A/B Audio A/B Audio A/B O/P Comparator O/P (Duty Cycle = 25%) Comparator O/P (Duty Cycle = 75%) Figure 3c. Figure 3d. Figures 3a,3b,3c and 3d The audio input Pulse Width Modulates the comparator output. load (with the audio information contained in the PWM signal) via the off chip output bridge and single stage L-C filter network. With no audio input signal applied, the AudioA/B inputs are biased at the mid-point of the triangular wave, and the duty cycle at the output of the comparators is nominally 50%. As the AudioA/B signal ascends towards the peak level, the crossing points with the (higher frequency) triangular wave also ascend. The comparator monitoring these signals exhibits a corresponding increase in output duty cycle. Similarly, as the AudioA/B signal descends, the duty cycle is correspondingly reduced. Thus the audio input Pulse Width Modulates the comparator outputs. This principle is illustrated in Figures 3a, b, c and d. The comparator outputs are buffered and used to drive the OutA and OutB outputs. These in turn drive the speaker The ramp amplitude is approximately 1V. The AudioA, AudioB, TriangleA and TriangleB inputs are internally biased to a DC voltage of approximately VCC/5. The mid - point DC level of the OscA and OscB triangular outputs is around 2V. The triangular wave at the Cosc pin traverses between about 2.7Vand 3.8V and the dist pin exhibits a roughly square wave from about 1.4V to 2V. (The above voltages may vary in practice and are included for guidance only). ISSUE 1 -MARCH 2001 5 ZXCD1000 VCC D2 R4 A1a 47k R5 56R Q1 ZXM64P03X D2 C18 100n C10 A1b L1 ZXFN1000 68µF AUDIO INPUT C2 22µF C3 R1 22µF 100R R16 U2 C8 2n2 2 C4 3 47n R13 4 2k7 6 5 R10 10k 6 C6 R14 270pF 7 C5 47n 2k7 8 1/2 NE5532 12V REG C7 22µF R12 C22 C21 22µF 100n Triangle A 5V5 Out A 15 OscA 9VA Dist VCC 22µF 100n R3 100µF Cosc 9VB OscB Gnd2 Triangle B Out B Audio B 20uH Q2 ZXM64N03X 56R C27 C23 C24 470n 470n 470n R2 D1 14 47k SPEAKER A A4a 13 R17 12V REG **** 12 VCC 11 10 D3 R6 A1a 47k 9 Gnd R7 C12 C14 C16 100n R15 22µF 56R 100µF C35 **** Q3 ZXM64P03X SPEAKER B D3 C19 L2 100n 2k7 U2 2k7 Audio A 16 U1 R11 2k7 100n A4b ZXCD1000 1 2n2 C17 C13 C15 C34 100n 2k7 C1 Gnd INPUT D1 C11 1/2 NE5532 A1b ZXFN1000 D4 20uH C9 2n2 C20 A4b 100n R8 56R Q4 ZXM64N03X C28 C25 C26 470n 470n 470n 78L12 C32 C33 100µF 100n 2 ISSUE 1 - MARCH 2001 C29 2200µF VI GND U3 1 VCC VO D4 3 12V REG C30 C31 100n 22µF R9 47K A4a R17 / C35 are optional components Figure 4 Zetex Class D 25W Mono Open Loop Solution ZXCD1000 switching PWM signal that comes from the bridge. Thus the lower frequency audio signal is recovered and is available at the speakerA and speakerB outputs across which the speaker should be connected. The ZXFN1000 magnetics form an integral part of, and are specially designed for, the Zetex solution. Class D 25W Mono Open Loop (Bridge Tied Load - BTL) Solution – Circuit Description Proprietary circuit design and high quality magnetics are necessary to yield the high THD performance specified. Deviation from the Zetex recommended solution could significantly degrade performance. The optional components R17 and C3 form a Zobel network. The applicability of these depends upon the application and speaker characteristics. Suggested values are 47nF and 10 ohms The speaker is connected as a Bridge Tied Load (BTL). This means that both sides of the speaker are driven from the output bridge and therefore neither side of the speaker connects to ground. This allows maximum power to be delivered to the load, from a given supply voltage. The supply voltage for this solution is nominally 16V. Efficiency The following plots show the measured efficiency of the Zetex solution at various power levels into both 4Ω and 8Ω loads. As a comparison, typical efficiency is plotted for a class A-B amplifier. They clearly demonstrate the major efficiency benefits available from the Zetex class D solution. A schematic diagram for the solution is shown in Figure 4. The audio input is AC coupled and applied to a simple R-C (R1 and C1) low pass filter and a phase splitter built around the NE5532 dual op-amp. One of these op-amps is configured as a voltage follower and the other as a X1 inverting amplifier. This produces in phase and inverted signals for application to the ZXCD1000. The op-amp outputs are AC coupled into the ZXCD1000 Audio A and Audio B inputs via simple R-C low pass filters (R16/C8 and R15/C9). The op-amps are biased to a DC level of approximately 6V by R11 and R12. The Pulse Width Modulated (PWM) outputs, OutA and OutB, which contain the audio information, are AC coupled and DC restored before driving the Zetex ZXM64P03X and ZXM64N03X PMOS and NMOS output bridge FET’s. AC coupling is via C17, C18, C19 and C20. DC restoration is provided by the D2(A1a)/R4, D1(A4a)/R2 and D3(A1a)/R6, D4(A4a)/R9 components. This technique allows the output stage supply voltage to be higher than the high level of the OutA and OutB outputs (approximately 8.5V), whilst still supplying almost the full output voltage swing to the gates of the bridge FET’s (thereby ensuring good turn on). This can be exploited to yield higher power solutions with higher supply voltages – this is discussed later. The resistor/diode combinations (R5/D2(A16), R3/D1(A46), R7/D3(A16) and R8/D4(A46)) in series with the bridge FET gates, assist in controlling the switching of the bridge FET’s. This design minimises shoot through currents whilst still achieving the low distortion characteristics of the system. The purpose of the (ZXFN1000) inductors in conjunction with the output capacitors C23, C24, C25 and C26 is to low pass filter the high frequency ISSUE 1 -MARCH 2001 7 ZXCD1000 Class D 25W Mono Open Loop (Bridge Tied Load - BTL) Solution – PCB description and Operation. The top copper, the bottom copper and the silk screen (top) are shown in Figures 5, 6 & 7 respectively, for the double sided PCB implementation of the applications circuit of Figure 4. A component listing is given in the BOM (Bill of Materials) table. Gerber files for this solution are available from Zetex Plc. The board operates from a 16V (nom.) supply which should be applied to the underside of the supply decoupling capacitor C29. The audio input and speaker connections should be made to the solder pads indicated on Figure 7. The audio input should have a maximum amplitude of approximately 1V pk-pk. For diagnostic purposes, the speaker outputs can be monitored single-endedly with respect to ground with an oscilloscope (or other instrument) if desired. However remember that the speaker is connected as a Bridge Tied Load, therefore any results obtained in this manner, are not valid for assessing performance. The true performance depends upon some differential cancellation across the speaker load. To view the differential output across speakerA and speakerB, a floating monitor must be used i.e. neither side of the speaker should be grounded! For example, this can be achieved with a two channel oscilloscope by monitoring the speakerA and speakerB outputs, and using the invert and add functions. Figure 6. Class D 25W Mono O.L. PCB Bottom Copper (Actual Size) The exposed pad on the underside of the ZXCD1000 eQSOP package should be soldered down to the PCB. This in conjunction with vias and top and bottom copper areas, functions as a heat sink. Speaker Outputs Audio Input Figure 7. Class D 25W Mono O.L. PCB Silk Screen (Actual Size) Plots of typical performance for the solution are shown in the included graphs. As previously stated, a very important feature of the Zetex solution is that the residual distortion is almost totally free of any crossover artifacts. This lack of crossover distortion sets the ZXCD1000 solutions quite apart from most other presently available low cost solutions, which in general suffer from severe crossover distortion problems. Figure 5. Class D 25W Mono O.L. PCB Top Copper (Actual Size) ISSUE 1 - MARCH 2001 8 ZXCD1000 It is well known that this kind of distortion is particularly unpleasant to the listener. The two scope traces clearly show the lack of such artifacts with the Zetex solution Other Solutions - Stereo, Closed Loop and Higher Powers. STEREO It is possible to duplicate the above solution to give a 2 channel stereo solution. However if the oscillator frequencies are not locked together, a beat can occur which is acoustically audible. This is undesirable. A stereo solution which avoids this problem can be achieved by synchronising the operating frequencies of both ZXCD1000’s class D controller IC’s, by slaving one device from the other. This is illustrated in Figure 8. ZXCD1000 CX1 Audio A Triangle A RX1 1.5k ZETEX Class D Solution. (10W into 4Ω) Note lack of Crossover Artifacts Osc A 9VA Dist VCC Cosc 9VB Osc B Gnd2 Triangle B Out B Audio B RX2 5V5 Out A MASTER Gnd 1.5k CX2 ZXCD1000 Audio A Triangle A O/C O/C 5V5 Out A Osc A 9VA Dist VCC Cosc 9VB Osc B Gnd2 Triangle B Out B Audio B Gnd SLAVE Figure 8. Frequency sync for Stereo Apps. Here OscA on the master is used to drive both TriangleA and TriangleB inputs on the master. OscB on the master is used to drive both TriangleA and TriangleB inputs on the slave. In order to achieve the increased drive capabilty required by the OscA/B outputs on the master, 1.5kΩ pull down resistors are added from these pins to ground. The slave oscillator is disabled by connecting pin 4 (dist) to ground. Great care must be taken when linking the triangle from the master to the slave. Any pickup can cause slicing errors and result in increased distortion. The best connection method is to run two tracks, side by side, from the master to the slave. One of these tracks would be the triangle itself, and the other would be the direct local ground linking the master pin9 ground to the slave pin 9 ground. Typical Class D Solution. Note Large Crossover Artifacts ISSUE 1 -MARCH 2001 9 10 AUDIO INPUT 3.3µF C21 10k 1k 1.5k R21 R20 0.1u C42 2.4K R11 R43 10K R10 10K R9 10K R12 220R 10k R32 47µF C18 10µF R24 R31 1.5k 3 C12 2 6 5 47µF C20 7 10k 3.9K C2 Audio B R18 8.2k 3 2 4.7k R19 1 5 6 3.9k R27 680pF 5V5 Gnd Out B Gnd2 9VB VCC 9VA Out A 16 10k R26 10k R25 9 10 11 12 13 14 15 C5 1µF 1µF C4 C8 D8 1N4148 C9 1µF 47n C40 47K R8 47K 1N4148 1µF R5 47K R4 D5 1N4148 D4 1µF C7 1µF C6 R1 47K D1 1N4148 Figure 9. 25W Mono with Feedback 1/2 RC4558D 7 R29 2.7k 1.6k C22 ZXCD1000 Triangle B OscB Cosc Dist OscA R28 8 7 6 5 4 3 Audio A Triangle A R16 1/2 RC4558D 2.2nF C14 330pF C3 1µF 1 2 IC1 15k 560R R15 2.2nF C13 560R R14 C1 1µF R22 3.9K R23 R13 1/2 LM358D 1 1/2 LM358D C27 22µF R30 10R 47n C41 430R R41 430R R40 1N4148 75R R7 D7 1N4148 D6 75R R6 75R R3 1N4148 D3 1N4148 D2 75R R2 VCC VCC ZXM64N03X Q4 BRIDGE O/P B ZXM64P03X Q2 ZXM64N03X Q3 BRIDGE O/P A ZXM64P03X Q1 C17 20µH ZXFN1000 20uH ZXFN1000 2200µF 20V C10 1µF C11 1µF SPEAKER B ***** R17 ***** C24 SPEAKER A ZXCD1000 ISSUE 1 - MARCH 2001 ZXCD1000 Class D 25W Mono Bridge Tied Load (BTL) Solution with Feedback – Circuit Description With the addition of feedback (hence closed loop solution) it is possible to obtain even better THD performance. A schematic diagram for this is shown in Figure 9. Again proprietary circuit and special magnetic design is necessary to yield the high THD performance and deviation from this could significantly reduce performance. Much of the circuitry is the same as described for the open loop solution. The main differences being a consequence of using the feedback circuitry. The input and feedback circuitry is shown separately in Figure 10 and is now described. The audio input is ac coupled and applied to an op-amp (1/2 of RC4558D) configured as a non–inverting amplifier with a gain of approximately 2.8. The op-amp input is tied to a DC level of approximately VCC/2. Feedback is applied differentially from the bridge outputs via the other half of the RC4558D op-amp. A portion of the single ended output from this op-amp is subtracted from the output of the non-inverting op-amp output above. Overall negative feedback is applied due to the polarity and connection of the signals involved. The audio signal from the above circuitry is applied to a phase splitter (see Figure 11) as was done for the open loop solution. This is built around the other LM3580 dual op-amp. One of these op-amps is configured as a voltage follower and the other as a X1 inverting amplifier. This produces in phase and inverted signals for application to the ZXCD1000 Audio A and Audio B inputs respectively. The output circuitry downstream of the ZXCD1000 is as described for the open loop solution, but the components may be slightly different (and have different numbering). ISSUE 1 -MARCH 2001 11 Higher Power Solutions With some modifications the applications solutions can be extended to give 50W or even higher output powers. A 50W solution can be implemented with a circuit very similar to the 25W solution. The main differences being the supply voltage and the output magnetics. The magnetics for 50W are necessarily larger than required for 25W in order to handle the higher load currents. For 50W operation the supply voltage to the circuit is nominally 25V. However the maximum supply voltage to the ZXCD1000 class D controller IC is 20V, hence a voltage dropper is required. This could be done, for example, as in the open loop solution described previously. In addition, for the closed loop solution, slightly modified feedback resistor ratios are required. The ZXCD1000 class D controller IC is inherently capable of driving even higher power solutions, with the appropriate external circuitry. However as stated above the maximum supply voltage to the ZXCD1000 class D controller IC is 20V and the higher supply voltages must therefore be dropped. Also due consideration must be given to the ZXCD1000 output drive levels and the characteristics of the bridge MOSFET’s. The latter must be sufficiently enhanced by the OutA and OutB outputs to ensure the filter and load network is driven properly. If the gate drive of the ZXCD1000 is too low for the chosen MOSFET then the OUTA and OUTB signal must be buffered using an appropriate MOSFET driver circuit. Additionally, suitable magnetics are essential to achieve good THD performance. Package details The ZXCD1000 is available in a 16 pin eQSOP package. The exposed pad on the underside of the package should be soldered down to an area of copper on the PCB, to function as a heatsink. The PCB should have plated through vias to the underside of the board, again connecting to an area of copper. ZXCD1000 VCC R31 1.5k C21 3.3µF 1/2 RC4558D R32 Audio IN 3 1 10k R20 2 10k R21 C18 1.5k 47µF R16 15k C20 47µF R18 8.2k R24 220R R19 4.7k R26 FROM BRIDGE O/P A (via R41/C41) 1/2 RC4558D 5 7 10k R43 1k 6 R29 R25 FROM BRIDGE O/P B (via R40/C40) C22 2.7k 680pF R27 10k 3.9k To Phase Splitter R28 1.6k Figure 10. Feedback and Input Circuitry. VCC R9 10k R10 1/2 LM358D 3 R14 1 10k To AudioA input (In Phase Signal) 560R R11 2.4k 2 C12 R22 C13 10µF 3.9k 2.2nF 1/2 LM358D 5 Audio Signal From Input / Feedback Circuitry R15 7 R12 560R 10k To AudioB input (Inverted Signal) 6 R13 R23 C14 3.9k 2.2nF 10k Figure 11. Phase Splitter ISSUE 1 - MARCH 2001 12 ZXCD1000 dB THD + N (%) Typical performance graphs for the Zetex 25W open loop solution are shown here for both 4 and 8Ω loads. These graphs further demonstrate the true high fidelity performance achieved by the Zetex solutions. 10W 5W 1W Output Power THD v Power into 8 at 1kHz FFT of distortion and noise floor at 1W (8 load) dB dB f(Hz) f(Hz) f(Hz) FFT of distortion and noise floor at 10W (8 load) Frequency response (8 load) ISSUE 1 -MARCH 2001 13 dB THD + N (%) ZXCD1000 20W 1W 5W 10W Output Power THD v Power into 4 at 1kHz FFT of distortion and noise floor at 1W (4 load) dB dB f(Hz) f(Hz) f(Hz) FFT of distortion and noise floor at 20W (4 load) Frequency response (4 load) Note roll off. This can be corrected by using an alternative values for output filter components. ISSUE 1 - MARCH 2001 14 ZXCD1000 B.O.M. Table for 25W Mono Open Loop Solution PCB ID Value R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 100R 47K 56R 47K 56R 47K 56R 56R 47K 10K 2K7 2K7 2K7 2K7 2K7 2K7 2n2 COG 22µF 10V 22µF 6V3 47n X7R 47n X7R 270pF COG 22µF 6V3 2n2 COG 2n2 COG 68µF 6V3 100n X7R 100n X7R 100n X7R 22µF 10V 22µF 16V 100µF 10V C17 C18 C19 C20 C21 100n 100n 100n 100n 100n X7R X7R X7R X7R X7R Case SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD Tant B SMD Tant B SMD 0805 SMD 0805 SMD 0805 SMD Tant B SMD 0805 SMD 0805 SMD Tant B SMD 1206 SMD 0805 SMD 0805 SMD Tant B SMD Tant B std. Dia 6.3mm SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 Notes PCB ID Value Case C22 C23 C24 C25 C26 C27 C28 C29 22µF 6V3 470n 470n 470n 470n 470n 470n 2200µF 16V C30 C31 C32 100n X7R 22µF 16V 100µF 16V C33 C34 100n X7R 100µF 16V U1 U2 U3 Q1 Q2 Q3 Q4 D1 ZXCD1000 NE5532 78L12 ZXM64P03X ZXM64N03X ZXM64P03X ZXM64N03X BAV70 SMD SO 8 TO92 SMD MSOP 8 SMD MSOP 8 SMD MSOP 8 SMD MSOP 8 SMD SOT23 D2 BAW56 SMD SOT23 D3 BAW56 SMD SOT23 Notes SMD Tant B SMD 1812 SMD 1812 SMD 1812 SMD 1812 SMD 1812 SMD 1812 std. Dia 12.5mm SMD 1206 SMD Tant B std. Dia 6.3mm SMD 1206 std. Dia 6.3mm A4-Common Cathode A1-Common Anode A1-Common Anode A4-Common Cathode D4 BAV70 SMD SOT23 L1 20µH (ZXFN1000) std. Custom core L2 20µH (ZXFN1000) std. Custom core ISSUE 1 -MARCH 2001 15 ZXCD1000 PACKAGE DIMENSIONS EXPOSED PAD C S h x 45 3 2 S Y M B O L 1 H E SEE DETAIL "A" BOTTOM VIEW END VIEW TOP VIEW e .010 b A2 DIMENSIONS IN INCHES MIN. NOM. MAX. A .058 .061 .066 A1 .001 .003 .005 A2 .055 .058 .061 .012 b .008 .010 c .007 D .189 .194 .196 E .150 .154 .157 e .025 BSC H .228 .236 .244 h .010 .016 .013 .035 .025 L .016 .005 .007 SC .002 OC 0 5 8 A SEATING PLANE L C OC DETAIL "A" D A1 SEATING PLANE SIDE VIEW Zetex part ordering information (per channel) Qty per Device channel Description Package T&R Suffix eQSOP16 TA, TC 1 ZXCD1000EQ16 Class D modulator 2 ZXFN1000 Custom magnetics 2 ZXM63N03X N Channel MOSFET MSOP8 TA, TC 2 ZXM63P03X P Channel MOSFET MSOP8 TA, TC TA, TC Zetex plc. Fields New Road, Chadderton, Oldham, OL9-8NP, United Kingdom. Telephone: (44)161 622 4422 (Sales), (44)161 622 4444 (General Enquiries) Fax: (44)161 622 4420 Zetex GmbH Streitfeldstraße 19 D-81673 München Germany Telefon: (49) 89 45 49 49 0 Fax: (49) 89 45 49 49 49 Zetex Inc. 47 Mall Drive, Unit 4 Commack NY 11725 USA Telephone: (631) 543-7100 Fax: (631) 864-7630 Zetex (Asia) Ltd. 3701-04 Metroplaza, Tower 1 Hing Fong Road, Kwai Fong, Hong Kong Telephone:(852) 26100 611 Fax: (852) 24250 494 These are supported by agents and distributors in major countries world-wide © Zetex plc 2000 Internet:http://www.zetex.com This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service. ISSUE 1 - MARCH 2001 16