LTC6900 Low Power, 1kHz to 20MHz Resistor Set SOT-23 Oscillator U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ One External Resistor Sets the Frequency 1kHz to 20MHz Frequency Range 500µA Typical Supply Current, VS = 3V, 3MHz Frequency Error ≤1.5% Max, 5kHz to 10MHz (TA = 25°C) Frequency Error ≤ 2% Max, 5kHz to 10MHz (TA = 0°C to 70°C) ±40ppm/°C Temperature Stability 0.04%/V Supply Stability 50% ±1% Duty Cycle 1kHz to 2MHz 50% ±5% Duty Cycle 2MHz to 10MHz Fast Start-Up Time: 50µs to 1.5ms 100Ω CMOS Output Driver Operates from a Single 2.7V to 5.5V Supply Low Profile (1mm) ThinSOTTM Package U APPLICATIO S ■ ■ ■ ■ ■ ■ ■ ■ Portable and Battery-Powered Equipment PDAs Cell Phones Low Cost Precision Oscillator Charge Pump Driver Switching Power Supply Clock Reference Clocking Switched Capacitor Filters Fixed Crystal Oscillator Replacement Ceramic Oscillator Replacement The LTC6900 operates with a single 2.7V to 5.5V power supply and provides a rail-to-rail, 50% duty cycle square wave output. The CMOS output driver ensures fast rise/fall times and rail-to-rail switching. The frequency-setting resistor can vary from 10kΩ to 2MΩ to select a master oscillator frequency between 100kHz and 20MHz (5V supply). The three-state DIV input determines whether the master clock is divided by 1, 10 or 100 before driving the output, providing three frequency ranges spanning 1kHz to 20MHz (5V supply). The LTC6900 features a proprietary feedback loop that linearizes the relationship between RSET and frequency, eliminating the need for tables to calculate frequency. The oscillator can be easily programmed using the simple formula outlined below: fOSC 100, DIV Pin = V + 20k = 10MHz • , N = 10, DIV Pin = Open N • RSET 1, DIV Pin = GND , LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. U ■ The LTC®6900 is a precision, low power oscillator that is easy to use and occupies very little PC board space. The oscillator frequency is programmed by a single external resistor (RSET). The LTC6900 has been designed for high accuracy operation (≤1.5% frequency error) without the need for external trim components. TYPICAL APPLICATIO RSET vs Desired Output Frequency 10000 Clock Generator 1 0.1µF 2 10k ≤ RSET ≤ 2M 3 ( OUT V+ LTC6900 1kHz ≤ fOSC ≤ 20MHz 5 5V, N = 100 GND SET 20k fOSC = 10MHz • N • RSET DIV ) 1000 4 OPEN, N = 10 N=1 RSET (kΩ) 5V ÷100 ÷10 ÷1 100 10 6900 TA01 1 1k 100k 1M 10M 10k DESIRED OUTPUT FREQUENCY (Hz) 100M 6900 F02 6900f 1 LTC6900 W W W AXI U U U W PACKAGE/ORDER I FOR ATIO U ABSOLUTE RATI GS (Note 1) ORDER PART NUMBER Supply Voltage (V +) to GND ........................– 0.3V to 6V DIV to GND .................................... – 0.3V to (V + + 0.3V) SET to GND ................................... – 0.3V to (V + + 0.3V) Operating Temperature Range (Note 8) LTC6900C .......................................... – 40°C to 85°C LTC6900I ............................................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C TOP VIEW V+ 1 LTC6900CS5 LTC6900IS5 5 OUT GND 2 SET 3 4 DIV S5 PART MARKING S5 PACKAGE 5-LEAD PLASTIC SOT-23 LTZM TJMAX = 150°C, θJA = 256°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 2.7V to 5.5V, RL= 5k, CL = 5pF, Pin 4 = V + unless otherwise noted. All voltages are with respect to GND. SYMBOL ∆f PARAMETER CONDITIONS Frequency Accuracy (Notes 2, 3) V+ = 5V V+ = 3V MIN 5kHz ≤ f ≤ 10MHz 5kHz ≤ f ≤ 10MHz, LTC6900C 5kHz ≤ f ≤ 10MHz, LTC6900I 1kHz ≤ f < 5kHz 10MHz < f ≤ 20MHz 5kHz ≤ f ≤ 10MHz 5kHz ≤ f ≤ 10MHz, LTC6900C 5kHz ≤ f ≤ 10MHz, LTC6900I 1kHz ≤ f < 5kHz TYP MAX UNITS ±0.5 ±1.5 ±2.0 ±2.5 % % % % % ±1.5 ±2.0 ±2.5 % % % % 400 400 kΩ kΩ ● ● ±2 ±2 ±0.5 ● ● ±2 RSET Frequency-Setting Resistor Range ∆f < 1.5% ∆f/∆T Freq Drift Over Temp (Note 3) RSET = 63.2k ● ±0.004 ∆f/∆V Freq Drift Over Supply (Note 3) V+ = 3V to 5V, RSET = 63.2k ● 0.04 Timing Jitter (Note 4) Pin 4 = V +, 20k ≤ R V + = 5V V + = 3V 20 20 SET ≤ 400k Pin 4 = Open, 20k ≤ RSET ≤ 400k Pin 4 = 0V, 20k ≤ RSET ≤ 400k Long-Term Stability of Output Frequency Duty Cycle (Note 7) V+ IS Pin 4 = V + or Open (DIV Either by 100 or 10) Pin 4 = 0V (DIV by 1), RSET = 20k to 400k Operating Supply Range Power Supply Current RSET = 400k, Pin 4 = fOSC = 5kHz V +, R L=∞ RSET = 20k, Pin 4 = 0V, RL = ∞ fOSC = 10MHz V + = 5V ● ● 49 45 ● 2.7 0.1 0.2 0.6 % % % 300 ppm/√kHr 50 50 51 55 % % 5.5 V ● ● 0.32 0.29 0.42 0.38 mA mA V + = 5V V + = 3V ● ● 0.92 0.68 1.20 0.86 mA mA High Level DIV Input Voltage ● V+ – 0.4 VIL Low Level DIV Input Voltage ● DIV Input Current (Note 5) %/V V + = 3V VIH IDIV %/°C 0.1 Pin 4 = V + V + = 5V Pin 4 = 0V V + = 5V ● ● –4 V 2 –2 0.5 V 4 µA µA 6900f 2 LTC6900 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 2.7V to 5.5V, RL= 5k, CL = 5pF, Pin 4 = V+ unless otherwise noted. All voltages are with respect to GND. SYMBOL PARAMETER CONDITIONS VOH High Level Output Voltage (Note 5) V + = 5V IOH = – 1mA IOH = – 4mA ● ● 4.8 4.5 4.95 4.8 V V V + = 3V IOH = – 1mA IOH = – 4mA ● ● 2.7 2.2 2.9 2.6 V V V + = 5V IOL = 1mA IOL = 4mA ● ● 0.05 0.2 0.15 0.4 V V V + = 3V IOL = 1mA IOL = 4mA ● ● 0.1 0.4 0.3 0.7 V V V + = 5V Pin 4 = V+ or Floating, RL = ∞ Pin 4 = 0V, RL = ∞ 14 7 ns ns V + = 3V Pin 4 = V+ or Floating, RL = ∞ Pin 4 = 0V, RL = ∞ 19 11 ns ns V + = 5V Pin 4 = V+ or Floating, RL = ∞ Pin 4 = 0V, RL = ∞ 13 6 ns ns V + = 3V Pin 4 = V+ or Floating, RL = ∞ Pin 4 = 0V, RL = ∞ 19 10 ns ns VOL tr tf Low Level Output Voltage (Note 5) OUT Rise Time (Note 6) OUT Fall Time (Note 6) Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: Frequencies near 100kHz and 1MHz may be generated using two different values of RSET (see the Selecting the Divider Setting Resistor paragraph in the Applications Information section). For these frequencies, the error is specified under the following assumption: 20k < RSET ≤ 200k. Note 3: Frequency accuracy is defined as the deviation from the fOSC equation. Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to the mean of the period. This specification is based on characterization and is not 100% tested. Also, see the Peak-to-Peak Jitter vs Output Frequency curve in the Typical Performance Characteristics section. Note 5: To conform with the Logic IC Standard convention, current out of a pin is arbitrarily given as a negative value. MIN TYP MAX UNITS Note 6: Output rise and fall times are measured between the 10% and 90% power supply levels. These specifications are based on characterization. Note 7: Guaranteed by 5V test. Note 8: The LTC6900C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6900C is designed, characterized and expected to meet specified performance from – 40°C to 85°C but is not tested or QA sampled at these temperatures. The LTC6900I is guaranteed to meet specified performance from – 40°C to 85°C. 6900f 3 LTC6900 U W TYPICAL PERFOR A CE CHARACTERISTICS Frequency Variation Over Temperature Frequency Variation vs RSET 4 1.00 TA = 25°C GUARANTEED LIMITS APPLY OVER 20kΩ ≤ RSET ≤ 400kΩ 2 0.75 VARIATION (%) 0 –1 0.9 0.8 0.50 TYPICAL HIGH 1 1.0 RSET = 63.4k ÷1 OR ÷10 OR ÷100 TYPICAL LOW –2 0.25 0 TYPICAL LOW –0.25 ÷1, VA = 5V 0.7 TYPICAL HIGH JITTER (%P-P) 3 VARIATION (%) Peak-to-Peak Jitter vs Output Frequency 0.6 ÷1, VA = 3V 0.5 0.4 0.3 –0.50 ÷10 0.2 –3 –0.75 –4 10k 1k 100k RSET (Ω) 1M –1.00 –40 –20 0 20 40 60 TEMPERATURE (°C) 80 6900 G01 140 OUTPUT RESISTANCE (Ω) SUPPLY CURRENT (mA) ÷1, 5V 1.5 ÷10, 5V ÷100, 5V 1.0 0.5 0 1k 10k 100k 1M OUTPUT FREQUENCY (Hz) 10M 6900 G03 Output Resistance vs Supply Voltage 2.0 ÷100, 3V 0 6900 G02 Supply Current vs Output Frequency TA = 25°C CL = 5pF ÷100 0.1 LTC6900 Output Operating at 20MHz, VS = 5V V + = 5V, RSET = 10k, CL = 10pF TA = 25°C 120 OUTPUT SOURCING CURRENT 1V/DIV 100 80 0V 60 ÷10, 3V ÷1, 3V 12.5ns/DIV 6900 G06 OUTPUT SINKING CURRENT 40 0 1k 10k 100k 1M OUTPUT FREQUENCY (Hz) 2.5 10M 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 6900 G04 5.5 6.0 6900 G05 LTC6900 Output Operating at 10MHz, VS = 3V V + = 3V, RSET = 20k, CL = 10pF 1V/DIV 0V 25ns/DIV 6900 G07 6900f 4 LTC6900 U U U PI FU CTIO S V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This supply must be kept free from noise and ripple. It should be bypassed directly to a ground plane with a 0.1µF capacitor. GND (Pin 2): Ground. Should be tied to a ground plane for best performance. SET (Pin 3): Frequency-Setting Resistor Input. The value of the resistor connected between this pin and V+ determines the oscillator frequency. The voltage on this pin is held by the LTC6900 to approximately 1.1V below the V+ voltage. For best performance, use a precision metal film resistor with a value between 10kΩ and 2MΩ and limit the capacitance on this pin to less than 10pF. DIV (Pin 4): Divider-Setting Input. This three-state input selects among three divider settings, determining the value of N in the frequency equation. Pin 4 should be tied to GND for the ÷1 setting, the highest frequency range. Floating Pin 4 divides the master oscillator by 10. Pin 4 should be tied to V+ for the ÷100 setting, the lowest frequency range. To detect a floating DIV pin, the LTC6900 attempts to pull the pin toward midsupply. Therefore, driving the DIV pin high requires sourcing approximately 2µA. Likewise, driving DIV low requires sinking 2µA. When Pin 4 is floated, it should preferably be bypassed by a 1nF capacitor to ground or it should be surrounded by a ground shield to prevent excessive coupling from other PCB traces. OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ and/or 10pF loads. Heavier loads may cause inaccuracies due to supply bounce at high frequencies. Voltage transients, coupled into Pin 5, above or below the LTC6900 power supplies will not cause latchup if the current into/ out of the OUT pin is limited to 50mA. W BLOCK DIAGRA VRES = (V+ – VSET) = 1.1V TYPICALLY 1 RSET V+ + GAIN = 1 IRES 3 SET PROGRAMMABLE DIVIDER (N) (÷1, 10 OR 100) – OUT V 5 + MASTER OSCILLATOR ƒMO = 10MHz • 20kΩ • IRES (V + – VSET) DIVIDER SELECT + – 2µA VBIAS 2 GND IRES DIV THREE-STATE INPUT DETECT + – 4 2µA GND 6900 BD PATENT PENDING 6900f 5 LTC6900 U THEORY OF OPERATIO As shown in the Block Diagram, the LTC6900’s master oscillator is controlled by the ratio of the voltage between the V+ and SET pins and the current (IRES) is entering the SET pin. The voltage on the SET pin is forced to approximately 1.1V below V+ by the PMOS transistor and its gate bias voltage. This voltage is accurate to ±8% at a particular input current and supply voltage (see Figure 1). A resistor RSET, connected between the V+ and SET pins, “locks together” the voltage (V + – VSET) and current, IRES, variation. This provides the LTC6900’s high precision. The master oscillation frequency reduces to: 20kΩ ƒ MO = 10MHz • RSET The LTC6900 is optimized for use with resistors between 10k and 2M, corresponding to master oscillator frequencies between 100kHz and 20MHz. To extend the output frequency range, the master oscillator signal may be divided by 1, 10 or 100 before driving OUT (Pin 5). The divide-by value is determined by the state of the DIV input (Pin 4). Tie DIV to GND or drive it below 0.5V to select ÷1. This is the highest frequency range, with the master output frequency passed directly to OUT. The DIV pin may be floated or driven to midsupply to select ÷10, the intermediate frequency range. The lowest frequency range, ÷100, is selected by tying DIV to V+ or driving it to within 0.4V of V+. Figure 2 shows the relationship between RSET, divider setting and output frequency, including the overlapping frequency ranges near 100kHz and 1MHz. The CMOS output driver has an on resistance that is typically less than 100Ω. In the ÷1 (high frequency) mode, the rise and fall times are typically 7ns with a 5V supply and 11ns with a 3V supply. These times maintain a clean square wave at 10MHz (20MHz at 5V supply). In the ÷10 and ÷100 modes, where the output frequency is much lower, slew rate control circuitry in the output driver increases the rise/fall times to typically 14ns for a 5V supply and 19ns for a 3V supply. The reduced slew rate lowers EMI (electromagnetic interference) and supply bounce. 10000 1.4 1.3 1000 RSET (kΩ) VRES = V + – VSET V + = 5V ÷100 1.2 V + = 3V 1.1 ÷10 ÷1 100 1.0 10 0.9 0.8 0.1 1 10 IRES (µA) 100 1000 6900 F01 Figure 1. V + – VSET Variation with IRES 1 1k 10k 100k 1M 10M DESIRED OUTPUT FREQUENCY (Hz) 100M 6900 F02 Figure 2. RSET vs Desired Output Frequency 6900f 6 LTC6900 U W U U APPLICATIO S I FOR ATIO SELECTING THE DIVIDER SETTING AND RESISTOR The LTC6900’s master oscillator has a frequency range spanning 0.1MHz to 20MHz. However, accuracy may suffer if the master oscillator is operated at greater than 10MHz with a supply voltage lower than 4V. A programmable divider extends the frequency range to greater than three decades. Table 1 describes the recommended frequencies for each divider setting. Note that the ranges overlap; at some frequencies there are two divider/resistor combinations that result in the desired frequency. In general, any given oscillator frequency (fOSC) should be obtained using the lowest master oscillator frequency. Lower master oscillator frequencies use less power and are more accurate. For instance, fOSC = 100kHz can be obtained by either RSET = 20k, N = 100, master oscillator = 10MHz or RSET = 200k, N = 10, master oscillator = 1MHz. The RSET = 200k approach is preferred for lower power and better accuracy. Table 1. Frequency Range vs Divider Setting DIVIDER SETTING ÷1 ⇒ DIV (Pin 4) = GND ÷10 ⇒ DIV (Pin 4) = Floating ÷100 ⇒ FREQUENCY RANGE DIV (Pin 4) = V+ ALTERNATIVE METHODS OF SETTING THE OUTPUT FREQUENCY OF THE LTC6900 The oscillator may be programmed by any method that sources a current into the SET pin (Pin 3). The circuit in Figure 3 sets the oscillator frequency using a programmable current source and in the expression for fOSC, the resistor RSET is replaced by the ratio of 1.1V/ICONTROL. As already explained in the “Theory of Operation,” the voltage difference between V + and SET is approximately 1.1V, therefore, the Figure 3 circuit is less accurate than if a resistor controls the oscillator frequency. Figure 4 shows the LTC6900 configured as a VCO. A voltage source is connected in series with an external 20k resistor. The output frequency, fOSC, will vary with VCONTROL, that is the voltage source connected between V + and the SET pin. Again, this circuit decouples the relationship between the input current and the voltage between V + and SET; the frequency accuracy will be degraded. The oscillator frequency, however, will monotonically increase with decreasing VCONTROL. > 500kHz* 182kHz TO 18MHz (TYPICALLY ±8%) 50kHz to 1MHz V+ < 100kHz *At master oscillator frequencies greater than 10MHz (R SET < 20kΩ), the LTC6900 may experience reduced accuracy with a supply voltage less than 4V. After choosing the proper divider setting, determine the correct frequency-setting resistor. Because of the linear correspondence between oscillation period and resistance, a simple equation relates resistance with frequency. 100 10MHz RSET = 20k • , N = 10 N • fOSC 1 (RSETMIN = 10k, RSETMAX = 2M) Any resistor, RSET, tolerance adds to the inaccuracy of the oscillator, fOSC. ICONTROL 1µA TO 100µA 1 0.1µF 2 3 V+ OUT LTC6900 5 GND SET DIV 4 N=1 6900 F03 ƒOSC ≅ 10MHz • 20kΩ • ICONTROL N 1.1V ICONTROL EXPRESSED IN (A) Figure 3. Current Controlled Oscillator V+ VCONTROL 0V TO 1.1V + – 1 0.1µF RSET 20k 2 3 5 OUT V+ LTC6900 GND SET 4 DIV N=1 ( 6900 F04 ƒOSC ≅ 10MHz • 20k • 1 – VCONTROL N RSET 1.1V ) TYPICAL fOSC ACCURACY ±0.5%, VCONTROL = 0V ±8%, VCONTROL = 0.5V Figure 4. Voltage Controlled Oscillator 6900f 7 LTC6900 U W U U APPLICATIO S I FOR ATIO POWER SUPPLY REJECTION START-UP TIME Low Frequency Supply Rejection (Voltage Coefficient) The start-up time and settling time to within 1% of the final value can be estimated by tSTART ≅ RSET(3.7µs/kΩ) + 10µs. Note the start-up time depends on RSET and it is independent from the setting of the divider pin. For instance with RSET = 100k, the LTC6900 will settle with 1% of its 200kHz final value (N = 10) in approximately 380µs. Figure 6 shows start-up times for various RSET resistors. Figure 5 shows the output frequency sensitivity to power supply voltage at several different temperatures. The LTC6900 has a guaranteed voltage coefficient of 0.1%/V but, as Figure 5 shows, the typical supply sensitivity is twice as low. High Frequency Power Supply Rejection The accuracy of the LTC6900 may be affected when its power supply generates significant noise with a frequency content in the vicinity of the programmed value of fOSC. If a switching power supply is used to power the LTC6900, and if the ripple of the power supply is more than 20mV, make sure the switching frequency and its harmonics are not related to the output frequency of the LTC6900. Otherwise, the oscillator may show additional frequency error. If the LTC6900 is powered by a switching regulator and the switching frequency or its harmonics coincide with the output frequency of the LTC6900, the jitter of the oscillator output may be affected. This phenomenon will become noticeable if the switching regulator exhibits ripples beyond 30mV. The start-up time and settling time of the LTC6900 with switch S1 open (or closed) is described by tSTART shown above. Once the LTC6900 starts and settles, and switch S1 closes (or opens), the LTC6900 will settle to its new output frequency within approximately 70µs. Jitter The Peak-to-Peak Jitter vs Output Frequency graph, in the Typical Performance Characteristics section, shows the typical clock jitter as a function of oscillator frequency and power supply voltage. The capacitance from the SET pin, (Pin 3), to ground must be less than 10pF. If this requirement is not met, the jitter will increase. 70 RSET = 63.2k PIN 4 = FLOATING (÷10) 0.10 25°C –40°C 0.05 TA = 25°C V+ = 5V 60 FREQUENCY ERROR (%) FREQUENCY DEVIATION (%) 0.15 Figure 7 shows an application where a second set resistor RSET2 is connected in parallel with set resistor RSET1 via switch S1. When switch S1 is open, the output frequency of the LTC6900 depends on the value of the resistor RSET1. When switch S1 is closed, the output frequency of the LTC6900 depends on the value of the parallel combination of RSET1 and RSET2. 85°C 0 50 40 30 20 400k 10 63.2k 0 –0.05 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5 –10 20k 0 200 400 800 600 TIME AFTER POWER APPLIED (µs) 6900 F05 Figure 5. Supply Sensitivity 1000 6900 F06 Figure 6. Start-Up Time 6900f 8 LTC6900 U W U U APPLICATIO S I FOR ATIO 3V OR 5V S1 RSET1 1 2 RSET2 V+ OUT 5 fOSC = 10MHz • OR LTC6900 V+ GND 3 SET DIV 4 fOSC = 10MHz • ÷100 ( ( ) 20k N • RSET1 20k N • RSET1//RSET2 ) ÷10 ÷1 6900 F07 Figure 7 A Ground Referenced Voltage Controlled Oscillator The LTC6900 output frequency can also be programmed by steering current in or out of the SET pin, as conceptually shown in Figure 8. This technique can degrade accuracy as the ratio of (V+ – VSET) / IRES is no longer uniquely dependent of the value of RSET, as shown in the LTC6900 Block Diagram. This loss of accuracy will become noticeable when the magnitude of IPROG is comparable to IRES. The frequency variation of the LTC6900 is still monotonic. When VIN = V+, the output frequency of the LTC6900 assumes the highest value and it is set by the parallel combination of RIN and RSET. Also note, the output frequency, fOSC, is independent of the value of VRES = (V+ – VSET) so the accuracy of fOSC is within the data sheet limits. When VIN is less than V+, and expecially when VIN approaches the ground potential, the oscillator frequency, fOSC, assumes its lowest value and its accuracy is affected by the change of VRES = (V+ – VSET). At 25°C VRES varies by ±8%, assuming the variation of V+ is ±5%. The temperature coefficient of VRES is 0.02%/°C. By manipulating the algebraic relation for fOSC above, a simple algorithm can be derived to set the values of external resistors RSET and RIN, as shown in Figure 9. 1. Choose the desired value of the maximum oscillator frequency, fOSC(MAX), occurring at maximum input voltage VIN(MAX) ≤ V+. Figure 9 shows how to implement the concept shown in Figure 8 by connecting a second resistor, RIN, between the SET pin and a ground referenced voltage source, VIN. 2. Set the desired value of the minimum oscillator frequency, fOSC(MIN), occurring at minimum input voltage VIN(MIN) ≥ 0. For a given power supply voltage in Figure 9, the output frequency of the LTC6900 is a function of VIN, RIN, RSET and (V+ – VSET) = VRES: 3. Choose VRES = 1.1 and calculate the ratio of RIN/RSET from the following: fOSC = RIN = RSET 10MHz 20k • • N RIN RSET VIN − V + 1 1 + • RIN VRES 1+ RSET ( ) 1 V+ 0.1µF 2 RSET V+ OUT IPR (1) 5 5V DIV 1 V+ + GND SET IRES ( fOSC(MAX) ) VRES − 1 fOSC(MIN) LTC6900 3 (MAX) + (VIN(MAX) − V + ) − ffOSC (VIN(MIN) − V ) OSC(MIN) 4 ÷100 VRES ÷10 RIN OPEN ÷1 6900 F08 Figure 8. Concept for Programming via Current Steering RSET 2 V+ VIN OUT 5 fOSC LTC6900 5V GND 3 SET + – – 0.1µF − 1 (2) DIV 4 ÷100 ÷10 OPEN ÷1 6900 F09 Figure 9. Implementation of Concept Shown in Figure 8 6900f 9 LTC6900 U W U U APPLICATIO S I FOR ATIO Example 2: Once RIN/RSET is known, calculate RSET from: RSET Vary the oscillator frequency by one octave per volt. Assume fOSC(MIN) = 1MHz and fOSC(MAX) = 2MHz, when the input voltage varies by 1V. The minimum input voltage is half supply, that is VIN(MIN) = 1.5V, VIN(MAX) = 2.5V and V+ = 3V. 10MHz 20k = • • N fOSC(MAX) RIN + VIN(MAX) − V + VRES 1 + RSET R VRES IN RSET ( ) (3) Example 1: In this example, the oscillator output frequency has small excursions. This is useful where the frequency of a system should be tuned around some nominal value. V+ = 3V, fOSC(MAX) = 2MHz for VIN(MAX) = 3V and Let fOSC(MIN) = 1.5MHz for VIN = 0V. Solve for RIN/RSET by Equation (2), yielding RIN/RSET = 9.9/1. RSET = 110.1k by Equation (4). RIN = 9.9RSET = 1.089M. For standard resistor values, use RSET = 110k (1%) and RIN = 1.1M (1%). Figure 10 shows the measured fOSC vs VIN. The 1.5MHz to 2MHz frequency excursion is quite limited, so the curve of fOSC vs VIN is linear. Equation (2) yields RIN/RSET = 1.273 and Equation (3) yields RSET = 142.8k. RIN = 1.273RSET = 181.8k. For standard resistor values, use RSET = 143k (1%) and RIN = 182k (1%). Figure 11 shows the measured fOSC vs VIN. For VIN higher than 1.5V, the VCO is quite linear; nonlinearities occur when VIN becomes smaller than 1V, although the VCO remains monotonic. Maximum VCO Modulation Bandwidth The maximum VCO modulation bandwidth is 25kHz; that is, the LTC6900 will respond to changes in VIN at a rate up to 25kHz. In lower frequency applications however, the modulation frequency may need to be limited to a lower rate to prevent an increase in output jitter. This lower limit is the master oscillator frequency divided by 20, (fOSC/20). In general, for minimum output jitter the modulation frequency should be limited to fOSC/20 or 25kHz, whichever is less. For best performance at all frequencies, the value for fOSC should be the master oscillator frequency (N␣ = 1) when VIN is at the lowest level. 2.00 3000 1.95 2500 1.90 RIN = 1.1M RSET = 110k V + = 3V N=1 1.80 2000 fOSC (kHz) fOSC (MHz) 1.85 1.75 1.70 1500 RIN = 182k RSET = 143k V + = 3v N=1 1000 1.65 1.60 500 1.55 1.50 0 0 0.5 1 1.5 VIN (V) 2 2.5 3 6900 F10 Figure 10. Output Frequency vs Input Voltage 0 0.5 1 1.5 VIN (V) 2 2.5 3 6900 F11 Figure 11. Output Frequency vs Input Voltage 6900f 10 LTC6900 U W U U APPLICATIO S I FOR ATIO Maximum modulation bandwidth is the lesser of 25kHz or fOSC(MIN)/20 calculated at N =1 (2MHz/20 = 100kHz) Example 3: V+ = 3V, fOSC(MAX) = 5MHz, fOSC(MIN) = 4MHz, N = 1 Maximum VIN modulation frequency = 25kHz VIN(MAX) = 2.5V, VIN(MIN) = 0.5V RIN/RSET = 8.5, RSET = 43.2k, RIN = 365k Table 2. Variation of VRES for Various Values of RIN || RSET RIN || RSET (VIN = V +) VRES, V + = 3V VRES, V + = 5V 20k 0.98V 1.03V 40k 1.03V 1.08V Maximum VIN modulation frequency = 25kHz 80k 1.07V 1.12V Example 4: 160k 1.1V 1.15V V+ = 3V, fOSC(MAX) = 400kHz, fOSC(MIN) = 200kHz, N = 10 320k 1.12V 1.17V Maximum modulation bandwidth is the lesser of 25kHz or fOSC(MIN)/20 (4MHz/20 = 200kHz) VRES = Voltage across RSET VIN(MAX) = 2.5V, VIN(MIN) = 0.5V Note: All of the calculations above assume VRES = 1.1V, although VRES ≈ 1.1V. For completeness, Table 2 shows the variation of VRES against various parallel combinations of RIN and RSET (VIN = V +). Calulate first with VRES ≈ 1.1V, then use Table 2 to get a better approximation of VRES, then recalculate the resistor values using the new value for VRES. RIN/RSET = 3.1, RSET = 59k, RIN = 182k U PACKAGE DESCRIPTIO S5 Package 5-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1635) 0.62 MAX 0.95 REF 2.90 BSC (NOTE 4) 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.45 TYP 5 PLCS (NOTE 3) 0.95 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 1.90 BSC S5 TSOT-23 0302 6900f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC6900 U TYPICAL APPLICATIO S Temperature-to-Frequency Converter 5V RT 100k THERMISTOR 1 C1 0.1µF 2 3 OUT V+ LTC6900 5 fOSC = 10MHz • 20k 10 RT GND SET DIV 4 6900 TA02 RT: YSI 44011 800 765-4974 Output Frequency vs Temperature 1400 MAX TYP MIN FREQUENCY (kHz) 1200 1000 800 600 400 200 0 –20 –10 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (°C) 6900 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1799 1kHz to 30MHz ThinSOT Oscillator Identical Pinout, Higher Frequency Operation 6900f 12 Linear Technology Corporation LT/TP 0902 2K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2002